Bandwidth, Rail-to-Rail Gain Bandwidth Product: (typ.) Supply Cur
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MCP6291/2/3/4/5
Bandwidth, Rail-to-Rail
Gain Bandwidth Product: (typ.) Supply Current: Supply Voltage: 2.4V 5.5V Rail-to-Rail Input/Output Extended Temperature Range: -40°C +125°C Available Single, Dual Quad Packages Single with Chip Select (CS) (MCP6293) Dual with Chip Select (CS) (MCP6295)
Description
Microchip Technology Inc. MCP6291/2/3/4/5 family operational amplifiers amps) provide wide bandwidth current. This family gain bandwidth product (GBWP) phase margin. This family also operates from single supply voltage 2.4V, while drawing (typ.) quiescent current. addition, MCP6291/2/3/4/5 supports rail-to-rail input output swing, with common mode input voltage range This family operational amplifiers designed with Microchip's advanced CMOS process. MCP6295 chip select line (CS) dual amps 8-pin package. This device manufactured cascading amps, with output being connected non-inverting input chip select line puts device Power mode. MCP6291/2/3/4/5 family operates Extended Temperature Range -40°C +125°C. also power supply range 2.4V 5.5V.
Applications
Automotive Portable Equipment Photo Diode Pre-amps Analog Filters Notebooks PDAs Battery-Powered Systems
Available Tools
SPICE Macro Model www.microchip.com) FilterLab® Software www.microchip.com)
Package Types
MCP6291 PDIP, SOIC, MSOP
Typical Application
VOUT
MCP6292 PDIP, SOIC, MSOP
VOUTA VOUTB VINB_ VINB+
VIN_
VIN+
VINA_ VOUT VINA+
MCP6293 PDIP, SOIC, MSOP
MCP6294 PDIP, SOIC, TSSOP
VOUTA VINA
MCP6295
VOUTD
VIND_
VIND+ VINC+ VOUTC
VIN+
VOUT VINA+ VINB+ VINB_ VOUTB
Second-Order Sallen-Key Low-Pass Filter with Extra Pole-Zero Pair Chip Select.
MCP6295 PDIP, SOIC, MSOP
VOUTA VINB+ VINA_ VINA+
VOUTB VINB
2004 Microchip Technology Inc.
DS21812C-page
MCP6291/2/3/4/5
ELECTRICAL CHARACTERISTICS FUNCTION TABLE
Name VIN+, VINA+, VINB+, VINC+, VIND+ VIN_, VINA_, VINB_, VINC_, VIND_ VOUT, VOUTA, VOUTB, VOUTC, VOUTD VOUTA VINB+ Function Non-inverting Inputs Inverting Inputs Positive Power Supply Negative Power Supply Outputs Internal Connection Chip Select Output non-inverting input (MCP6295)
Absolute Maximum Ratings
.7.0V Inputs Outputs -0.3V +0.3V Difference Input Voltage |VDD VSS| Output Short Circuit Current .continuous Current Input Pins Current Output Supply Pins .±30 Storage Temperature.-65°C +150°C Junction Temperature (TJ) .+150°C Protection Pins (HBM/MM) kV/400V Notice: Stresses above those listed under "Maximum Ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability.
ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, +25°C, +2.4V +5.5V, GND, VDD/2, VDD/2 VOUT VDD/2. Parameters Input Offset Input Offset Voltage Input Offset Voltage (Extended Temperature) Input Offset Temperature Drift Power Supply Rejection Input Bias Current Temperature Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode (Note Common Mode Input Range Common Mode Rejection Ratio Common Mode Rejection Ratio Open-Loop Gain Open-Loop Gain (large signal) Note VOUT 0.2V 0.2V, (Note VCMR CMRR CMRR VSS-0.3 VDD+0.3 -0.3V 2.5V, -0.3V 5.3V, VOS/TA PSRR ZDIFF -3.0 -5.0 ±1.7 ±1.0 ±1.0 1013||6 1013||3 +3.0 +5.0 µV/°C ||pF ||pF (Note -40°C +125°C, (Note -40°C +125°C, (Note (Note Note +85°C (Note +125°C (Note Note Note Note Units Conditions
Input Bias, Input Offset Current Impedance
MCP6295 VINB- bias current MCP6295 specified only. This specification does apply VOUTA/VINB+ MCP6295. common mode (VCM) range MCP6295 maximum voltage limit VOUTA/VINB+ specified VOL.
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, +25°C, +2.4V +5.5V, GND, VDD/2, VDD/2 VOUT VDD/2. Parameters Output Maximum Output Voltage Swing Output Short-Circuit Current Power Supply Supply Voltage Quiescent Current Amplifier Note -40°C +125°C VOL, Units Conditions
MCP6295 VINB- bias current MCP6295 specified only. This specification does apply VOUTA/VINB+ MCP6295. common mode (VCM) range MCP6295 maximum voltage limit VOUTA/VINB+ specified VOL.
ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, +25°C, +2.4V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Parameters Response Gain Bandwidth Product Phase Margin Unity-Gain Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density µVp-p nV/Hz fA/Hz GBWP 10.0 V/µs Units Conditions
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, +2.4V +5.5V GND. Parameters Temperature Ranges Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note: °C/W °C/W °C/W °C/W °C/W °C/W +125 +150 Note Units Conditions
Junction Temperature (TJ) must exceed Absolute Maximum specification +150°C.
2004 Microchip Technology Inc.
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MCP6291/2/3/4/5
MCP6293/MCP6295 CHIP SELECT (CS) SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, +25°C, +2.4V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Parameters Specifications Logic Threshold, Input Current, High Specifications Logic Threshold, High Input Current, High Current Amplifier Output Leakage Dynamic Specifications (Note Valid Amplifier Output, Turn-on Time High Amplifier Output High-Z Hysteresis Note VDD, V/V, VDD/2, VOUT VDD/2, 5.0V High VDD, V/V, VDD/2, VOUT VDD/2 ICSH -0.7 0.01 ICSL 0.01 Units Conditions
tOFF VHYST
0.01
input condition (VIN) specified applies both MCP6295. dynamic specification tested output (VOUTB).
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MCP6291/2/3/4/5
Note:
TYPICAL PERFORMANCE CURVES
graphs tables provided following this note statistical summary based limited number samples provided informational purposes only. performance characteristics listed herein tested guaranteed. some graphs tables, data presented outside specified operating range (e.g., outside specified power supply range) therefore outside warranted range.
Note: Unless otherwise indicated, +25°C, +2.4V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
Percentage Occurrences
Percentage Occurrences
Samples
Samples -40°C +125°C
-2.8
-2.4
-2.0
-1.6
-1.2
-0.8
-0.4
2600 2800
Input Offset Voltage (mV)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Offset Voltage Drift.
Percentage Occurrences
Percentage Occurrences
Samples
Samples +125
1000
1200
1400
1600
1800
2000
2200
2400
Input Bias Current (pA)
Input Bias Current (pA)
FIGURE 2-2:
Input Bias Current with
FIGURE 2-5: +125
Input Bias Current with
Input Offset Voltage (µV)
-0.5 -40°C +25°C +85°C +125°C
Input Offset Voltage (µV)
-0.5
+125°C +85°C +25°C -40°C
Common Mode Input Voltage
Common Mode Input Voltage
FIGURE 2-3: Input Offset Voltage Common Mode Input Voltage with 2.4V.
FIGURE 2-6: Input Offset Voltage Common Mode Input Voltage with 5.5V.
2004 Microchip Technology Inc.
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3000
MCP6291/2/3/4/5
Note: Unless otherwise indicated, +25°C, +2.4V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
10,000
Input Offset Voltage (µV)
Input Bias, Offset Currents (pA)
Representative Part
5.5V 1,000
Input Bias Current Input Offset Current
5.5V 2.4V
Output Voltage
Ambient Temperature (°C)
FIGURE 2-7: Output Voltage.
Input Offset Voltage
FIGURE 2-10: Input Bias, Input Offset Currents Ambient Temperature 5.5V.
5.0V CMRR PSRRPSRR+
CMRR, PSRR (dB)
PSRR, CMRR (dB)
CMRR PSRR
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
100k
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-8: Frequency.
CMRR, PSRR
FIGURE 2-11: Temperature.
CMRR, PSRR Ambient
Input Bias, Offset Currents (pA)
+85°C 5.5V Input Offset Current Input Bias Current
Input Bias, Offset Currents (nA)
-0.5 -1.0
+125 5.5V Input Bias Current
Input Offset Current
Common Mode Input Voltage
Common Mode Input Voltage
FIGURE 2-9: Input Bias, Input Offset Currents Common Mode Input Voltage with +85°C.
FIGURE 2-12: Input Bias, Input Offset Currents Common Mode Input Voltage with +125°C.
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
Note: Unless otherwise indicated, +25°C, +2.4V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
1000
+125°C +85°C +25°C -40°C
Ouput Voltage Headroom (mV)
Quiescent Current (mA/Amplifier)
0.01
Power Supply Voltage
Output Current Magnitude (mA)
FIGURE 2-13: Quiescent Current Power Supply Voltage.
Gain Phase
1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07
FIGURE 2-16: Output Voltage Headroom Output Current Magnitude.
GBWP, 5.5V GBWP, 2.4V
Gain Bandwidth Product (MHz)
Open-Loop Gain (dB)
5.5V 2.4V
Open-Loop Phase
-120 -150 -180 -210 100k 100M
1.E+08
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-14: Frequency.
Open-Loop Gain, Phase
FIGURE 2-17: Gain Bandwidth Product, Phase Margin Ambient Temperature.
Falling Edge, 5.5V 2.4V
Maximum Output Voltage Swing (VP-P)
Slew Rate (V/µs)
Rising Edge, 5.5V 2.4V
5.5V 2.4V
1.E+03
1.E+04
1.E+05
1.E+06
1.E+07
100k
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-15: Maximum Output Voltage Swing Frequency.
FIGURE 2-18: Temperature.
Slew Rate Ambient
2004 Microchip Technology Inc.
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Phase Margin
MCP6291/2/3/4/5
Note: Unless otherwise indicated, +25°C, +2.4V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
1,000
Input Noise Voltage Density (nV/
Input Noise Voltage Density (nV/
1.E-01
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
100k
Frequency (Hz)
Common Mode Input Voltage
FIGURE 2-19: Frequency.
Input Noise Voltage Density
FIGURE 2-22: Input Noise Voltage Density Common Mode Input Voltage kHz.
Channel-to-Channel Separation (dB)
Ouptut Short Circuit Current (mA)
+125°C +85°C +25°C -40°C
Power Supply Voltage
Frequency (kHz)
FIGURE 2-20: Output Short-Circuit Current Power Supply Voltage.
FIGURE 2-23: Channel-to-Channel Separation Frequency (MCP6292, MCP6294 MCP6295 only).
5.5V Hysteresis swept high swept high
Op-Amp shuts here
2.4V
Quiescent Current (mA)
Op-Amp turns here
Hysteresis
swept high
swept high
Quiescent Current (mA)
shuts turns
Chip Select Voltage
Chip Select Voltage
FIGURE 2-21: Quiescent Current Chip Select (CS) Voltage with 2.4V (MCP6293 MCP6295 only).
FIGURE 2-24: Quiescent Current Chip Select (CS) Voltage with 5.5V (MCP6293 MCP6295 only).
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
Note: Unless otherwise indicated, +25°C, +2.4V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
+1V/V 5.0V -1V/V 5.0V
Output Voltage
0.E+00 1.E-06 2.E-06 3.E-06 4.E-06 5.E-06 6.E-06 7.E-06 8.E-06 9.E-06 1.E-05
Output Voltage
0.E+00 1.E-06 2.E-06 3.E-06 4.E-06 5.E-06 6.E-06 7.E-06 8.E-06 9.E-06 1.E-05
Time µs/div)
Time µs/div)
FIGURE 2-25: Pulse Response.
Large Signal Non-inverting
FIGURE 2-28: Response.
Large Signal Inverting Pulse
+1V/V
-1V/V
Output Voltage mV/div)
Time (200 ns/div)
Output Voltage mV/div)
Time (200 ns/div)
FIGURE 2-26: Pulse Response.
Chip Select, Output Voltage
Small Signal Non-inverting
FIGURE 2-29: Response.
0.E+00 5.E-06 1.E-05
Small Signal Inverting Pulse
Voltage
2.4V +1V/V
Chip Select, Output Voltage
Voltage
5.5V +1V/V
VOUT
Output
VOUT
Output
Output High-Z
2.E-05 2.E-05 3.E-05 3.E-05 4.E-05 4.E-05 5.E-05 5.E-05
Output High-Z
0.E+00 5.E-06 1.E-05 2.E-05 2.E-05 3.E-05 3.E-05 4.E-05 4.E-05 5.E-05 5.E-05
Time µs/div)
Time µs/div)
FIGURE 2-27: Chip Select (CS) Amplifier Output Response Time with 2.4V (MCP6293 MCP6295 only).
FIGURE 2-30: Chip Select (CS) Amplifier Output Response Time with 5.5V (MCP6293 MCP6295 only).
2004 Microchip Technology Inc.
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MCP6291/2/3/4/5
APPLICATION INFORMATION
MCP6291 VOUT MCP6291/2/3/4/5 family amps manufactured using Microchip's state-of-the-art CMOS process, specifically designed low-cost, low-power general-purpose applications. supply voltage, quiescent current wide bandwidth makes MCP6291/2/3/4/5 ideal battery-powered applications.
Rail-to-Rail Input
Maximum expected Minimum expected
MCP6291/2/3/4/5 amps designed prevent phase reversal when input pins exceed supply voltages. Figure shows input voltage exceeding supply voltage without phase reversal.
FIGURE 3-2: Resistor (RIN).
Input Current Limiting
Input, Output Voltage
Rail-to-Rail Output
5.0V +2V/V
VOUT
output voltage range MCP6291/2/3/4/5 (min.) (max.) when connected VDD/2 5.5V. Refer Figure 2-16 more information.
MCP6293/5 Chip Select (CS)
Time ms/div)
FIGURE 3-1: MCP6291/2/3/4/5 Show Phase Reversal.
input stage MCP6291/2/3/4/5 uses differential input stages parallel. operates common mode input voltage (VCM), while other operates high VCM. With this topology, device operates with above below VSS. Input Offset Voltage measured ensure proper operation. Input voltages that exceed input voltage range (VSS 0.3V 0.3V 25°C) cause excessive current flow into input pins. Current beyond cause reliability problems. Applications that exceed this rating must externally limited with resistor, shown Figure 3-2.
MCP6293 MCP6295 single dual amps with chip select (CS), respectively. When pulled high, supply current drops (typ.) flows through VSS. When this happens, amplifier output into high-impedance state. pulling low, amplifier enabled. left floating, amplifier operate properly. Figure shows output voltage supply current response pulse.
toff Hi-Z -1.0 typ.
VOUT
Hi-Z
IVSS
-0.7 typ.
-0.7 typ. typ.
typ.
FIGURE 3-3: Timing Diagram Chip Select (CS) MCP6293 MCP6295.
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
Cascaded Dual Amps (MCP6295) Capacitive Loads
Driving large capacitive loads cause stability problems voltage feedback amps. load capacitance increases, feedback loop's phase margin decreases closed-loop bandwidth reduced. This produces gain peaking frequency response, with overshoot ringing step response. unity-gain buffer most sensitive capacitive loads, though gains show same general behavior. When driving large capacitive loads with these amps (e.g., when +1), small series resistor output (RISO Figure 3-5) improves feedback loop's phase margin (stability) making output load resistive higher frequencies. bandwidth will generally lower than bandwidth with capacitive load.
MCP6295 dual with chip select (CS). chip select line available what would non-inverting input standard dual (pin This feature provided connecting output non-inverting input shown Figure 3-4. chip select line, which connected microcontroller line, puts device Power mode. Refer Section "MCP6283/5 Chip Select (CS)". VOUTA/VINB+ VINB- VINA- VINA+
VOUTB
MCP6295
RISO VOUT
MCP6291
FIGURE 3-4:
Cascaded Gain Amplifier. FIGURE 3-5: Output Resistor, RISO stabilizes large capacitive loads.
Figure gives recommended RISO values different capacitive loads gains. x-axis normalized load capacitance (CL/GN), where circuit's noise gain. non-inverting gains, Signal Gain equal. inverting gains, 1+|Signal Gain| (e.g., gives V/V).
1,000 Recommended
issue note from this configuration that output loaded input impedance input offset current (IOS) input impedance typically 1013||6 specified specification table (Refer Section "Capacitive Loads" further details regarding capacitive loads). +85°C +125°C (VDD 5.5V) sinks into output This illustrated Figures 2-12. common mode input range these amps specified data sheet However, since output limited from rails with load), non-inverting input range limited common mode input range
1,000 10,000 Normalized Load Capacitance; (pF)
FIGURE 3-6: Recommended RISO values Capacitive Loads.
After selecting RISO your circuit, double-check resulting frequency response peaking step response overshoot. Modify RISO's value until response reasonable. Bench evaluation simulations with MCP6291/2/3/4/5 SPICE macro model very helpful.
2004 Microchip Technology Inc.
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MCP6291/2/3/4/5
Supply Bypass
3.8.1
Application Circuits
MULTIPLE FEEDBACK LOW-PASS FILTER
With this family operational amplifiers, power supply (VDD single supply) should have local bypass capacitor (i.e., 0.01 within good high-frequency performance. also needs bulk capacitor (i.e., larger) within provide large, slow currents. This bulk capacitor shared with other parts.
MCP6291/2/3/4/5 used activefilter applications. Figure shows inverting, thirdorder, multiple feedback low-pass filter that used anti-aliasing filter.
Surface Leakage
VOUT
applications where input bias current critical, printed circuit board (PCB) surface leakage effects need considered. Surface leakage caused humidity, dust other contamination board. Under humidity conditions, typical resistance between nearby traces 1012. difference would cause current-to-flow, which greater than MCP6291/2/3/4/5 family's bias current 25°C typ). easiest reduce surface leakage guard ring around sensitive pins traces). guard ring biased same voltage sensitive pin. example this type layout shown Figure 3-7. VIN- VIN+
MCP6291
VDD/2
FIGURE 3-8: Pass Filter.
Multiple Feedback Low-
This filter, others, designed using Microchip's FilterLab® software, which available site (www.microchip.com).
3.8.2
PHOTO DIODE AMPLIFIER
Figure shows photo diode biased photovoltaic mode high precision. resistor converts diode current voltage VOUT. capacitor used limit bandwidth stabilize circuit against diode's capacitance always needed). Guard Ring VOUT
FIGURE 3-7: Inverting Gain.
Example Guard Ring Layout
light
Inverting (Figure 3-7) Transimpedance Amplifiers (convert current voltage, such photo detectors): Connect guard ring non-inverting input (VIN+). This biases guard ring same reference voltage (e.g., VDD/2 ground). Connect inverting (VIN-) input with wire that does touch surface. Non-inverting Gain Unity-Gain Buffer: Connect non-inverting (VIN+) input with wire that does touch surface. Connect guard ring inverting input (VIN-). This biases guard ring common mode input voltage.
MCP6291
VDD/2
FIGURE 3-9:
Photo Diode Amplifier.
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
3.8.3 CASCADED AMPS APPLICATIONS
MCP6295 provides flexibility Power mode dual amps 8-pin package. MCP6295 eliminates added cost space battery-powered applications using single amps with chip select lines 10-pin device with chip select line each amp. only inherent limitation this device that amps internally cascaded. Therefore, this device cannot used circuits that require active passive elements between amps. However, there several applications where this configuration with chip select line becomes suitable. circuits below show possible applications this device.
VOUT
MCP6295
FIGURE 3-11: Configuration. 3.8.3.3
Cascaded Gain Circuit
3.8.3.1
Load Isolation
Difference Amplifier
With cascaded configuration, used isolate load from applications where driving capacitive resistance loads feedback loop (such integrator circuit filter circuit) have sufficient source current drive load. this case, used buffer.
Figure 3-12 shows difference amplifier with chip select. this configuration, recommended well matched resistors (0.1%) increase common mode rejection ratio (CMRR). used additional gain unity-gain buffer isolate load from difference amplifier. VIN2 VOUT
VOUTB
MCP6295
VIN1
MCP6295
FIGURE 3-10: Buffer. 3.8.3.2
Isolating Load with FIGURE 3-12:
Difference Amplifier Circuit.
Cascaded Gain
Figure 3-11 shows cascaded gain circuit configuration with chip select. amps configured non-inverting amplifier configuration. this configuration, important note that input offset voltage amplified gain shown below: Where: gain gain VOSA offset voltage VOSB offset voltage Therefore, recommended most gain with with relatively small gain, unity-gain buffer.
2004 Microchip Technology Inc.
DS21812C-page
MCP6291/2/3/4/5
3.8.3.4 Buffered Non-inverting Integrator 3.8.3.6
Figure 3-13 shows buffered non-inverting integrator with chip select. configured noninverting integrator. this configuration, matching impedance each input recommended. used provide feedback loop frequencies 1/(2RC). used isolate load from integrator.
Second-Order Low-Pass Filter with Extra Pole-Zero Pair
Figure 3-15 second-order multiple feedback lowpass filter with chip select. Filterlab® software from Microchip determine values second-order filter. used pole-zero pair using
VOUT
MCP6295
VOUT
MCP6295
FIGURE 3-13: Buffered Non-inverting Integrator with Chip Select Circuit. 3.8.3.5 Integrator with Active Compensation Chip Select
FIGURE 3-15: Second-Order Multiple Feedback Low-Pass Filter with Extra PoleZero Pair Chip Select. 3.8.3.7 Second-Order Sallen-Key Low-Pass Filter with Extra Pole-Zero Pair
Figure 3-14 uses active compensator compensate non-ideal characteristics introduced higher frequency integration. alternative passive element, such resistor, compensation. However, quality compensation would constant since characteristics amplifier varies over temperature process. This circuit uses unity-gain buffer isolate integration capacitor from drives capacitor with impedance source. Since both amplifiers matched very well, provides higher quality integration.
Figure 3-16 second-order Sallen-Key low-pass filter with chip select. Filterlab® software from Microchip determine values second-order filter. used pole-zero pair using
VOUT
VOUT
MCP6295
MCP6295
FIGURE 3-16: Second-Order Sallen-Key Low-Pass Filter with Extra Pole-Zero Pair Chip Select.
FIGURE 3-14: Compensation.
Integrator Circuit with Active
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
3.8.3.8 Capacitorless Second-Order Low-Pass filter with Chip Select
DESIGN TOOLS
low-pass filter shown Figure 3-17 does require external capacitors. uses only three external resistors. amp's GBWP sets corner frequency. used circuit gain used avoid gain peaking frequency response, needs (lower values need selected R3). Note that amplifier bandwidth varies greatly over temperature process. However, this configuration provides cost solution applications with high bandwidth. VREF MCP6295 VOUT
Microchip provides basic design tools needed MCP6291/2/3/4/5 family amps.
SPICE Macro Model
latest version SPICE Macro Model MCP6291/2/3/4/5 amps available site www.microchip.com. This model intended initial design tool that works well amp's linear region operation room temperature. model file information capabilities. Bench testing very important part design cannot replaced with simulations. Also, simulation results using this macro model need validated comparing them data sheet specifications characteristic curves.
FilterLab® Software
FIGURE 3-17: Capacitorless Second-Order Low-Pass Filter with Chip Select Circuit.
Microchip's FilterLab software innovative tool that simplifies analog active-filter (using amps) design. Available cost from site www.microchip.com, FilterLab active-filter software design tool provides full schematic diagrams filter circuit with component values. also outputs filter circuit SPICE format, which used with macro model simulate actual filter performance.
2004 Microchip Technology Inc.
DS21812C-page
MCP6291/2/3/4/5
PACKAGING INFORMATION
Package Marking Information
8-Lead MSOP XXXXXX YWWNNN Example: 6291 407256
8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW
Example: MCP6291 E/P256 0407
8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW
Example: MCP6291 E/SN0407
Legend:
XX.X
Customer specific information* Year code (last digits calendar year) Week code (week January week `01') Alphanumeric traceability code
Note:
event full Microchip part number cannot marked line, will carried over next line thus limiting number available characters customer specific information.
Standard marking consists Microchip part number, year code, week code, traceability code (facility code, mask rev#, assembly code). marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.
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MCP6291/2/3/4/5
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6294) XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN Example:
MCP6294-E/P 0407256
14-Lead SOIC (150 mil) (MCP6294)
Example:
XXXXXXXXXX XXXXXXXXXX YYWWNNN
MCP6294ESL 0407256
14-Lead TSSOP (MCP6294)
Example:
XXXXXX YYWW
6294ST 0407
2004 Microchip Technology Inc.
DS21812C-page
MCP6291/2/3/4/5
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
Number Pins .026 Pitch .043 Overall Height .030 .033 .037 Molded Package Thickness .000 .006 Standoff .193 TYP. Overall Width .118 Molded Package Width .118 Overall Length .016 .024 .031 Foot Length Footprint (Reference) .037 Foot Angle Lead Thickness .003 .006 .009 Lead Width .009 .012 .016 Mold Draft Angle Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side.
Units Dimension Limits
INCHES
MILLIMETERS* 0.65 0.75 0.85 0.00 4.90 3.00 3.00 0.40 0.60 0.95 0.08 0.22
1.10 0.95 0.15
0.80 0.23 0.40
JEDEC Equivalent: MO-187
Drawing C04-111
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
8-Lead Plastic Dual In-line (PDIP)
Number Pins Pitch Seating Plane Molded Package Thickness Base Seating Plane Shoulder Shoulder Width Molded Package Width Overall Length Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Spacing Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic
Units Dimension Limits
INCHES* .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370
.140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310
.170 .145 .325 .260 .385 .135 .015 .070 .022 .430
MILLIMETERS 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40
4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92
Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-001 Drawing C04-018
2004 Microchip Technology Inc.
DS21812C-page
MCP6291/2/3/4/5
8-Lead Plastic Small Outline (SN) Narrow, (SOIC)
Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic
Units Dimension Limits
.053 .052 .004 .228 .146 .189 .010 .019 .008 .013
INCHES* .050 .061 .056 .007 .237 .154 .193 .015 .025 .009 .017
.069 .061 .010 .244 .157 .197 .020 .030 .010 .020
MILLIMETERS 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0.20 0.23 0.33 0.42
1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 0.25 0.51
Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-012 Drawing C04-057
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
14-Lead Plastic Dual In-line (PDIP)
Number Pins Pitch Seating Plane .140 .170 Molded Package Thickness .115 .145 Base Seating Plane .015 Shoulder Shoulder Width .300 .313 .325 Molded Package Width .240 .250 .260 Overall Length .740 .750 .760 Seating Plane .125 .130 .135 Lead Thickness .008 .012 .015 Upper Lead Width .045 .058 .070 Lower Lead Width .014 .018 .022 Overall Spacing .310 .370 .430 Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-001 Drawing C04-005
Units Dimension Limits
INCHES* .100 .155 .130
MILLIMETERS 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 18.80 19.05 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40
4.32 3.68 8.26 6.60 19.30 3.43 0.38 1.78 0.56 10.92
2004 Microchip Technology Inc.
DS21812C-page
MCP6291/2/3/4/5
14-Lead Plastic Small Outline (SL) Narrow, (SOIC)
Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic
Units Dimension Limits
.053 .052 .004 .228 .150 .337 .010 .016 .008 .014
INCHES* .050 .061 .056 .007 .236 .154 .342 .015 .033 .009 .017
.069 .061 .010 .244 .157 .347 .020 .050 .010 .020
MILLIMETERS 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 5.99 3.81 3.90 8.56 8.69 0.25 0.38 0.41 0.84 0.20 0.23 0.36 0.42
1.75 1.55 0.25 6.20 3.99 8.81 0.51 1.27 0.25 0.51
Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-012 Drawing C04-065
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
14-Lead Plastic Thin Shrink Small Outline (ST) (TSSOP)
Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic
Units Dimension Limits
INCHES .026 .035 .004 .251 .173 .197 .024 .006 .010
.033 .002 .246 .169 .193 .020 .004 .007
.043 .037 .006 .256 .177 .201 .028 .008 .012
MILLIMETERS* 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0.70 0.09 0.15 0.20 0.19 0.25 0.30
Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. JEDEC Equivalent: MO-153 Drawing C04-087
2004 Microchip Technology Inc.
DS21812C-page
MCP6291/2/3/4/5
NOTES:
DS21812C-page
2004 Microchip Technology Inc.
MCP6291/2/3/4/5
PRODUCT IDENTIFICATION SYSTEM
order obtain information, e.g., pricing delivery, refer factory listed sales office. PART Device Temperature Range Package Examples:
Device: MCP6291: Single Operational Amplifier MCP6291T: Single Operational Amplifier (Tape Reel) (SOIC, MSOP) MCP6292: Dual Operational Amplifier MCP6292T: Dual Operational Amplifier (Tape Reel) (SOIC, MSOP) MCP6293: Single Operational Amplifier with Chip Select MCP6293T: Single Operational Amplifier with Chip Select (Tape Reel) (SOIC, MSOP) MCP6294: Quad Operational Amplifier MCP6294T: Quad Operational Amplifier (Tape Reel) (SOIC, TSSOP) MCP6295: Dual Operational Amplifier with Chip Select MCP6295T: Dual Operational Amplifier with Chip Select (Tape Reel) (SOIC, MSOP) MCP6291-E/SN: MCP6291-E/MS: MCP6291-E/P: MCP6291T-E/SN: Extended Temperature, SOIC package. Extended Temperature, MSOP package. Extended Temperature, PDIP package. Tape Reel, Extended Temperature, SOIC package. Extended Temperature, SOIC package. Extended Temperature, MSOP package. Extended Temperature, PDIP package. Tape Reel, Extended Temperature, SOIC package. Extended Temperature, SOIC package. Extended Temperature, MSOP package. Extended Temperature, PDIP package. Tape Reel, Extended Temperature, SOIC package. Extended Temperature, 14LD PDIP package. Tape Reel, Extended Temperature, 14LD SOIC package. Extended Temperature, 14LD SOIC package. Extended Temperature, 14LD TSSOP package. Extended Temperature, SOIC package. Extended Temperature, MSOP package. Extended Temperature, PDIP package. Tape Reel, Extended Temperature, SOIC package.
MCP6292-E/SN: MCP6292-E/MS: MCP6292-E/P: MCP6292T-E/SN:
MCP6293-E/SN: MCP6293-E/MS: MCP6293-E/P: MCP6293T-E/SN:
Temperature Range:
-40°C +125°C
Package:
Plastic MSOP, 8-lead Plastic (300 Body), 8-lead, 14-lead Plastic SOIC, (150 Body), 8-lead Plastic SOIC (150 Body), 14-lead Plastic TSSOP (4.4mm Body), 14-lead
MCP6294-E/P: MCP6294T-E/SL:
MCP6294-E/SL: MCP6294-E/ST:
MCP6295-E/SN: MCP6295-E/MS: MCP6295-E/P: MCP6295T-E/SN:
Sales Support
Data Sheets Products supported preliminary Data Sheet have errata sheet describing minor operational differences recommended workarounds. determine errata sheet exists particular device, please contact following: Your local Microchip sales office Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision silicon Data Sheet (include Literature using. Customer Notification System Register site (www.microchip.com/cn) receive most current information products.
2004 Microchip Technology Inc.
DS21812C-page
MCP6291/2/3/4/5
NOTES:
DS21812C-page
2004 Microchip Technology Inc.
Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable."
Code protection constantly evolving. Microchip committed continuously improving code protection features products. Attempts break Microchip's code protection feature violation Digital Millennium Copyright Act. such acts allow unauthorized access your software other copyrighted work, have right relief under that Act.
Information contained this publication regarding device applications like intended through suggestion only superseded updates. your responsibility ensure that your application meets with your specifications. representation warranty given liability assumed Microchip Technology Incorporated with respect accuracy such information, infringement patents other intellectual property rights arising from such otherwise. Microchip's products critical components life support systems authorized except with express written approval Microchip. licenses conveyed, implicitly otherwise, under intellectual property rights.
Trademarks Microchip name logo, Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, MATE, PowerSmart, rfPIC, SmartShunt registered trademarks Microchip Technology Incorporated U.S.A. other countries. AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel Total Endurance trademarks Microchip Technology Incorporated U.S.A. other countries. SQTP service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2004, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved. Printed recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona Mountain View, California October 2003. Company's quality system processes procedures PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory analog products. addition, Microchip's quality system design manufacture development systems 9001:2000 certified.
2004 Microchip Technology Inc.
DS21812C-page
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05/28/04
DS21812C-page
2004 Microchip Technology Inc.
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