Interface Design Guide Interfacing Level Ethernet Transceivers In

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Interface Design Guide Interfacing Level Ethernet Transceivers In

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Interface Design Guide
Interfacing Level Ethernet Transceivers Intel Controllers
General Description
This applicati note describes operation Intel 82596 coprocessor Level Ethernet transceivers IEEE 802.3 10BASE-T connections. 82596 used with variety Level devices ncluding LXT901, LXT904, LXT905, LXT907 LXT944. 82596 performs Medium Access Control (MAC) functions, while Level transceivers perform Physical (PHY) layer functi Manchester encoding/ decoding, receiver squelch transmit pulse shaping, jabber, link integrity testing, reversed polarity detection correcti drivi receiving. This note details transceiver-to-controller interface. also describes Carri Sense mode settings required compati bility between Level LXT905 LXT944 transcei vers Intel 82596 controller.
Features
Integrated filters external filters required Integrated Manchester encoders/decoders 10BASE-T compliant transceivers transcei vers Automati /Manual AUI/RJ45 Selection Automati polarity correcti enable/disable Integrated drivers Full duplex capability
Consul individual product data sheets specific product feature sets.
Application Overview
CSMA/CD Full-Duplex Ethernet
above listed Level transceivers capable duplex operation. This makes them excellent choice with Intel 82596. 82596 link management gorithms. these Carrier Sense Multi Access with Collision Detection (CSMA/CD) compliance with IEEE 802.3 standard. CSMA/CD operation, presence activity serial link data transmission until link clear. Collisions detected internally externally 82596. With external collision detection, 82596 noti fied collisions output Level transcei ver. additi CSMA/CD, 82596 capable fullduplex communication. full-duplex operation, 82596 uses output enable data transmission through input Level transceiver. order Level transceivers operate full duplex mode, transceiver collision detect circuits must disabled. Collision detecti disable performed through LEDC transceiver. half-duplex operation (for CSMA/CD), LEDC output driving collision indicator LED. Externally tying LEDC disables internal twisted-pair loopback collision detect, enabling fullduplex communicati Full-duplex operation effectively doubles bandwidth Ethernet connecti without change physical media.
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Interface Design Guide
TRANSCEIVER CONTROLLER INTERFACE
Level transceivers 8-pin interface connect with controllers. Table descri connections between Level transceivers 82596. Note that output from transceiver used with 82596 controller.
Table Transceiver Description 82596 Connections
Transceiver Name Signal Name Transmit Data Transmit Enable Transmit Clock Receive Clock Receive Data Carri Detect Collision Detect Loopback Signal Description Input signal containi data transmi tted network. connected directly transmit data output controller. Enables data transmi ssion starts watchdog mer. Synchronous TCLK. clock output. This clock signal should directl connected transmit clock input controller. Recovered clock which synchronous received data connected directly receive clock input controller. Output signal connected directly receive data input controller. Output noti controller activity network. connect when using Intel 82596 either LXT905 LXT944. Output which drives collision detect input controller. Enables internal loopback mode.1 82596 Name
TCLK RCLK
LPBK
Loopback optional connection. Both devices recognize Loopback, necessary normal operation.
Carrier Sense Mode Settings
Intel 82596 controller offers modes carri sense function: Internal External. Mode compatibility listed Table LXT901, LXT904 LXT907 used either mode. LXT905 LXT944 used with Internal Mode only. Internal Carrier Sense mode external carrier sense 82596 ignored. Instead, presence receive clock interpreted Carrier Sense active. Therefore, Carri Detect output from transceiver required should connected controller. 82596 controller Internal Carrier Sense mode, confi gure command 82596 configuration parameter CARRIER SENSE SOURCE (Byte
External Carrier Sense mode controller looks Carri Detect signal from transceiver. LXT905 LXT944, delay between frame de-asserti Carri Detect cause 82596 mis-read several bits. Selecting Internal Carrier Sense mode eliminates this condition.
Table Carrier Sense Mode Compatibility
Transceiver LXT901 LXT904 LXT905 LXT907 LXT944 Internal External
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Interface Design Guide Interfacing Level Ethernet Transceivers In

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