AN101 Title: JTAG In-System Programming (ISP) guidelines Atm

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AN101 Title: JTAG In-System Programming (ISP) guidelines Atm

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AN101
Title:
JTAG In-System Programming (ISP) guidelines Atmel ATmega FLASH Microcontroller Family
Author: John Marriott Abstract: This application note describes connections required implement In-System Programming Atmel ATmega FLASH Microcontroller Family using either JTAG Programming Interfaces. document describes physical connections required from programmer target Microcontroller also details different Header Connector pin-outs which currently available. Date: June 2007
Version Number: 1.07
rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without prior notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent other industrial intellectual property rights
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Contents
Introduction Programmers supported. Device Support. Algorithm Overview JTAG Algorithm Overview Programming Algorithm Overview Programming Interface Atmel Microcontroller Implementation. Atmel AT90S Microcontrollers. Atmel ATmega Microcontrollers 2.4.1 Overview possible ATmega pin-outs 2.4.2 ATmega Standard Pin-out 2.4.3 ATmega UART Pin-out. Header Selection Chart header) JTAG Programming Algorithm Overview Upgrading your Equinox Programmer support JTAG. 3.2.1 Purchasing JTAG License 3.2.2 enable programmer JTAG? Upgrading Epsilon5 FS2003 support JTAG Upgrading PPM3-MK2 Programmer support JTAG Entering License String upgrade your programmer. Using JTAG Port Debugging Programming JTAG Programming Schematic Atmel 10-way JTAG Header (JTAG Interface) Creating JTAG Programming Project 3.9.1 Overview 3.9.2 Creating (Development project). 3.9.3 Testing JTAG Project Development (EDS) Mode Upgrading your Programmer Firmware. Overview check your programmer firmware version upgrade from firmware version 2.xx upgrade from firmware version 3.xx
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Introduction
This application note describes connections required implement In-System Programming Atmel AT90S ATmega FLASH Microcontroller Family using either JTAG Programming Interface. document describes physical connections required from programmer target Microcontroller also details different Header Connector pin-out which currently available. Please note: Atmel ATtiny Family features both `Low Voltage' `High Voltage' Serial Programming Modes. Please refer AN104 full details.
Programmers supported
This Application Note covers Equinox programmer which capable programming Atmel microcontrollers. table below lists Equinox programmers also details whether each upgraded JTAG programming.
Fig. Equinox Programmer JTAG Support
Programmer EPSILON5 FS2000A FS2003 PPM3 PPM3 Micro-ISP Series Micro-ISP Series Activ8r(AVR) PRO101 Key:
algorithms
JTAG algorithms UPGRADE UPGRADE JTAG Module with RESET Switch UPGRADE UPGRADE IO-CON-3 JTAG Connector Module
Upgrade Order Code EPSILON5-UPG3 FS2000A-UPG7 FS2003-UPG7 PPM3A1-UPG7
Enabled standard UPGRADE Chargeable license upgrade required announced available
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Device Support
table below lists Atmel ATmega devices which currently supported Equinox range programmers. Algorithms supplied standard with programmers, where JTAG algorithms require upgrade license purchased enable JTAG Library devices. Some ATmega devices such ATmega8(L) ATmega161(L) have JTAG port cannot support JTAG programming. Device algorithm JTAG algorithm Minimum firmware version 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 3.04 programming pin-out
AT90CAN32 AT90CAN64 AT90CAN128 ATmega8(L) ATmega16(L) ATmega323(L) ATmega32(L) ATmega64(L) ATmega103(L) ATmega128(L) ATmega161(L) ATmega162(L) ATmega164P-20 ATmega164PV-10 ATmega169(L) ATmega169PV-8 ATmega324P-20 ATmega324PV-10 ATmega329V-8 ATmega3290V-8 ATmega3290-16 ATmega406 ATmega640-16 ATmega640V-8 ATmega644-10 ATmega644P ATmega644PV ATmega6490 ATmega6490V ATmega1280V-8 ATmega1280-16 ATmega1281V-8 ATmega2560-16 ATmega2560V-8
**YES **YES **YES **YES **YES **YES
JTAG port JTAG port JTAG port JTAG port JTAG port **YES **YES **YES **YES **YES **YES **YES **YES **YES **YES **YES **YES
Check datasheet Check datasheet Check datasheet MOSI MISO MOSI MISO MOSI MISO MOSI MISO MOSI MISO MOSI MISO Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet Check datasheet
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
ATmega2561-16 ATmega2561V-8
**YES **YES
**YES **YES
3.04 3.04
Please note: Devices with greater than 128kb FLASH memory require firmware upgrade version 3.01 above order support programming upper 128kb. Please section instructions updating your programmer firmware. rule thumb, only Atmel Atmega devices with bytes FLASH greater will feature JTAG Programming Interface. Please check Device support section Equinox website up-to-date Device Support List.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Algorithm Overview
algorithm simple 3-wire interface which used program most Microcontrollers. advantages disadvantages this algorithm detailed below. Advantages: algorithm supported almost Atmel microcontrollers including AT90S, AT90CANxxx, ATtiny ATmega devices. This means that same Programming Interface used products containing microcontroller. Programming Interface uses only pins (MOSI, MISO, SCK) RESET pin. pins used drive other circuitry such LED's switches Target Board well being used purposes. However, this will require careful design Target Board ensure that programming signals compromised. Mode, possible reprogram single byte EEPROM area without having perform Chip Erase first. algorithms supported standard Equinox Programmers. Disadvantages general terms, algorithm times slower than JTAG algorithm. When using algorithm, clock used during programming supplied from either Internal Oscillator from external crystal resonator. programming speed completely dependent speed this oscillator. oscillator speed slow, then maximum speed seriously limited overall programming will very slow. Clock Selection Fuses incorrectly programmed mode, then chip longer have valid oscillator will respond programmer. This render chip unprogrammable except physically removing from Target Board using either JTAG Parallel programmer resurrect correct Fuse Settings.
JTAG Algorithm Overview
JTAG algorithm provides method performing high-speed programming Atmel Atmega microcontroller. same JTAG port also used on-chip debugging code using Atmel JTAG-ICE Debugger. advantages disadvantages JTAG algorithm detailed below. Advantages: JTAG algorithm approximately times faster programming compared algorithm. programming time using JTAG EEPROM significantly faster than algorithm because JTAG mode `Page' EEPROM programmed time rather than single byte. Each byte take program mode, where whole page bytes take program JTAG mode. JTAG algorithm uses same `JTAG Port' Atmel JTAG-ICE Debugger. This means that same port used both debugging during development phase also programming during production phase product. With JTAG algorithm, programming clock supplied programmer JTAG logic inside Target device does require other clocking. This means that chip dependent settings `Clock Selection Fuses' JTAG Mode. JTAG mode possible change `Clock Selection Fuses' value still program chip. (with exception `JTAGEN' Fuse) possible JTAG port Target Microcontroller perform in-circuit testing microcontroller surrounding circuitry. This testing performed shifting Test Data through JTAG port Target Microcontroller. JTAG Test System required perform this testing. supported Equinox Programmer Atmel JTAG ICE.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
possible daisy-chain multiple JTAG devices JTAG then select program particular device. This functionality currently supported Equinox.
Disadvantages JTAG Programming Interface uses pins: TCK, TDI, TDO, RESET. JTAG pins microcontroller designed off-board should shared with other circuitry Target Board. This means that JTAG port pins must dedicated programming debugging. JTAG mode EEPROM divided into `Pages' rather than `Single Bytes'. therefore more complicated program single byte EEPROM entire page (usually bytes) must read back then single byte overlaid this data finally entire page then re-programmed back into EEPROM. JTAG Mode, possible re-program location EEPROM which 0xFF without first performing Chip Erase operation. This means that EEPROM already contains data, possible re-program this data without erasing entire chip first.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Programming Algorithm
Overview Programming Interface
Programming Interface simple synchronous 3-wire communications which commonly used control data transfer between Master Processor Slave Peripheral such external memory device figure 2.1.
2.1a Master Slave example
Chip Select
Chip Select
Master Device (MASTER)
MOSI MOSI MOSI
Peripheral Device (SLAVE)
MISO MISO
MISO
2.1b Signal names directions
Signal Name MOSI MISO Chip Select (CS)
Signal description Master OUT, Slave Master Slave Serial Clock Chip Select
Signal direction (from Master) Output Input Output Output
Data transferred from Master Slave using MOSI (Master OUT, Slave signal line. Slave transfers data back Master using MISO (Master Slave OUT) signal line. data transfer clocked signal line which generated Master bus. Slave uses signal know when sample MOSI signal valid data when output valid data MISO signal line. Most Slave devices have `Chip Select' signal which Master asserts select particular Slave device bus. example above with only Slave device, Master would still have assert Chip Select line order communicate with Slave device.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Atmel Microcontroller Implementation
Atmel have chosen interface implement fast In-System Programming (ISP) their AT90S, ATmega ATtiny Microcontroller families. This implementation allows on-chip FLASH, EEPROM, Configuration Fuses Security Fuses target Microcontroller In-System Programmed using suitable external Programmer an-board Master Controller 2.2a.
2.2a Programming Implementation Atmel Microcontrollers
RESET Control
RESET/
Device Programmer (SPI MASTER)
MOSI MOSI MOSI
Atmel Microcontroller (SPI SLAVE)
MISO MISO
MISO
2.2b Programmer Microcontroller Signal names directions
Signal Name MOSI MISO RESET
Signal description Master OUT, Slave Master Slave Serial Clock Chip Select
Signal direction (from Programmer) Output Input Output Output
Signal direction (from Microcontroller) Input Output Input Input
external Device Programmer Master Microcontroller Target System Slave. RESET control signal from programmer used force Target Microcontroller enter so-called `Serial Programming Mode'. Atmel Microcontrollers, programmer must drive RESET then send command enter programming mode. This effect resetting target Microcontroller longer running firmware (i.e. user application ceases execute). Once Target Device `Serial Programming Mode', external programmer transfer data from target device across bus. programming cycle, programmer simply creates RESET pulse then device should start firmware which been programmed into
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Atmel AT90S Microcontrollers
Atmel AT90S Microcontroller Family standard pins (MOSI, MISO, SCK) InSystem Programming (ISP) fig. 2.3.
2.3a AT90Sxxxx Connections
PROG_VCC PROG_RESET Reset Circuit
RESET
PROG_MOSI
MOSI
PROG_SCK
Atmel AT90Sxxxx Microcontroller
PROG_MISO
MISO
PROG_GND
2.3.b AT90S Microcontroller Signal names directions
Programmer Signal Name
Signal description
PROG_MOSI PROG_MISO PROG_SCK PROG_RESET
Master OUT, Slave Master Slave Serial Clock RESET
Signal direction (from Programmer) Output Input Output Output
Connect Microcontroller MOSI MISO RESET
Signal direction (from Microcontroller) Input Output Input Input
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Atmel ATmega Microcontrollers
2.4.1 Overview possible ATmega pin-outs
majority devices Atmel ATmega family conform standard pin-out InSystem Programming using MOSI, MISO pins target device. However, there also devices which MISO MOSI during In-System Programming. These derivatives referred `UART Pin-out' devices. Special care must taken route programmer MOSI MISO pins correct pins target device otherwise during In-System Programming will function. Please refer `Device Support' table section details which ATmega devices feature either `Standard' `UART' pin-out. Please look device trying program table then refer relevant section correct pin-out.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
2.4.2 ATmega Standard Pin-out
This pin-out compatible with ATmega devices which MOSI MISO pins In-System Programming.
Fig. 2.4.2a ATmega Standard Pin-out connections
PROG_VCC PROG_RESET Reset Circuit
RESET
PROG_MOSI
MOSI
PROG_SCK
PROG_MISO
MISO
Atmel ATmega Microcontroller (Standard pin-out)
PROG_GND
2.4.2b ATmega Standard Pin-out Signal names directions
Programmer Signal Name
Signal description
PROG_MOSI PROG_MISO PROG_SCK PROG_RESET
Master OUT, Slave Master Slave Serial Clock RESET
Signal direction (from Programmer) Output Input Output Output
Connect Microcontroller MOSI MISO RESET
Signal direction (from Microcontroller) Input Output Input Input
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
2.4.3 ATmega UART Pin-out
This pin-out compatible with Atmel ATmega 64(L), ATmega103(L), ATmega128(L) ATmega169(L) devices which pins during In-System Programming. standard MOSI MISO pins used during In-System Programming freely connected other devices.
2.4.3a ATmega Standard Pin-out connections
PROG_VCC PROG_RESET Reset Circuit
RESET
PROG_MOSI
PROG_SCK
PROG_MISO
Atmel ATmega Microcontroller (UART pin-out)
PROG_GND
2.4.3b ATmega Standard Pin-out Signal names directions
Signal Connect Signal direction direction (from (from Microcontroller Microcontroller) Programmer) PROG_MOSI Master OUT, Slave Output RXD* Input PROG_MISO Master Slave Input TXD* Output PROG_SCK Serial Clock Output Input PROG_RESET RESET Output RESET Input Please note pins must used instead MISO MOSI pins. Special Considerations pins must used instead MISO MOSI pins. ATmega103(L) device only, ATmega103 MISO (pin active during InSystem Programming even though this actually used programming. this used output make sure that whatever connected cope with toggling during ISP. also necessary insert current limiting resistor this line.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Programmer Signal Name
Signal description
Header Selection Chart header)
FOUR Headers featured most Equinox Programmers detailed table below. Please refer section indicated `refer section' column specific details each header. Header Description Function Atmel 6-way Header Refer section Header Pin-out
Header have THREE different pin-outs depending which Target Device programmed. (2a), (2b) (2c). J6(a) Equinox 10-way Header(a) Device support: Atmel AT90S, ATmega, ATtiny, AT89S devices
J6(b)
Equinox 10-way Header(a) Device support: Atmel ATtiny11/12/15 High Voltage (+12V Vpp) Programming Mode
J6(c)
Equinox 10-way Header(b) Device support: Atmel Wireless T89C51Rx2 Philips P89C51Rx2
Atmel 10-way Header Device support: Atmel AT90S, ATmega, ATtiny, AT89S devices
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Atmel 10-way JTAG Header Device support: Atmel ATmega32/128 devices with JTAG port
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
JTAG Programming Algorithm
Overview
JTAG Programming Interface provides method both In-System Debugging In-System Programming Atmel ATmega Microcontrollers. JTAG Interfaces uses industrystandard signals provide connection between programmer/debugger device. However, actual JTAG Header used Atmel Equinox specific Atmel JTAG programming will match JTAG connectors other manufacturer's devices. development environment, JTAG Interface used In-System Debugging code running actual Target System. This method operation requires Atmel `JTAG-ICE MK2' which In-System Debugger. Using this equipment, possible download code (firmware) Target Chip then execute this code under control. Debugger Software allows breakpoints code, read write memory locations, look register contents etc. production environment, JTAG Interface high-speed In-System Programming (ISP) Target Microcontroller. This method operation requires Equinox Programmer which been enabled support `ATmega JTAG' algorithms.
Upgrading your Equinox Programmer support JTAG
JTAG algorithms supported standard Equinox programmers. necessary purchase `License Upgrade' JTAG support from Equinox. Equinox will then send `JTAG Upgrade License String' which will upgrade your programmer support JTAG programming.
3.2.1 Purchasing JTAG License
Equinox programmers require purchase `License Upgrade' enable JTAG support. Please table section relevant upgrade your programmer.
3.2.2 enable programmer JTAG?
enable your programmer support JTAG programming, please purchase relevant JTAG Upgrade from Equinox Equinox distributor: purchase upgrade directly from Equinox Equinox will email `JTAG License String'. This string entered directly into <Enter License> screen EQTools. purchase upgrade from distributor distributor will send Upgrade Pack courier. Within Upgrade Pack will find Upgrade Form with Code String Email this Code String plus your programmer Serial Number support@equinoxtech.com Equinox will then send `JTAG License String' which keyed your programmer Serial Number. This string entered directly into <Enter License> screen EQTools.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Upgrading Epsilon5 FS2003 support JTAG
upgrade Epsilon5 FS2003 programmer support JTAG, please follow steps below: Order JTAG License from Equinox Enter `JTAG Upgrade License String' given Equinox into EQTools Make sure have required version Programmer Firmware support device wish program. Plug 10-way cable supplied with programmer into JTAG-10' Header programmer. Connect other 10-way cable JTAG port your Target Board ready program Target Chip JTAG.
Upgrading PPM3-MK2 Programmer support JTAG
upgrade PPM3-MK2 programmer support JTAG, please follow steps below: Order `PPM3-MK2 JTAG upgrade' from Equinox TechnologiesLicense from Equinox Enter `JTAG Upgrade License String' given Equinox into EQTools JTAG upgrade also includes `I/O Connector Module' PPM3-MK2 called `I/O-CON-3'. This module JTAG 10-way header which same pin-out JTAG-ICE. Make sure have required version Programmer Firmware support device wish program. Plug `I/O-CON-3' module into PPM-MK2 programmer Plug 10-way cable supplied with programmer into `JTAG' Header `I/O-CON-3' module. Connect other 10-way cable JTAG port your Target Board ready program Target Chip JTAG
EQ-IOCON-3
Connector Module (JTAG) Fast Connect Version connector module In-System Programming (ISP) Atmel microcontrollers using JTAG protocol Features: Plugs into suitable Equinox programmer e.g. PPM3 Module Atmel 10-way JTAG connector (same JTAG-ICE) Atmel 6-way Header Equinox 10-way header Single-in-line header with programmer brought wire-wrapping bed-of-nails probe wires Screw terminals power connections Target Status Link connect isolate programmer from Target Please note `Atmel JTAG License' (Order code: PPM3A1-UPG7) also required enable PPM3 program Atmel devices JTAG.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Entering License String upgrade your programmer
Once have received License String from Equinox, please follow steps below apply upgrade your programmer: Launch EQTools From menu bar, select <Programmer><Programmer Info> Programmer Information screen displayed Click <Enter License> button <Enter License Key> screen displayed.
Enter License String were sent Equinox Click <OK> EQTools should acknowledge that attached programmer been upgraded.
Click <OK> check Programmer Info screen, should find that entry `ATmega JTAG ISP' ENABLED. Your programmer upgraded support JTAG programming Atmel Microcontrollers.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Using JTAG Port Debugging Programming
JTAG port ATmega Microcontroller used both debugging programming purposes. Equinox `JTAG Header' pin-out found Equinox Programmers uses same pins Atmel `JTAG MK2' Debugger possible same connector cabling both programming debugging.
Fig. JTAG 10-way Header
RESET Microcontroller should brought Header. actually required JTAG algorithm control programming initiated JTAG command. However, programmer Atmel JTAG-ICE RESET RESET Target microcontroller ensure that JTAG port driving pins which could cause contention during programming. JTAG-ICE also needs control RESET force microcontroller execute code when debugging mode.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
JTAG Programming Schematic
diagram below details connections between Equinox Programmer JTAG connector JTAG Port Target Microcontroller. 3.7a ATmega JTAG Programming Interface connections
PROG_VCC PROG_RESET Reset Circuit
RESET
PROG_TCK
PROG_TDI
Atmel ATmega Microcontroller
PROG_TDO
PROG_TMS
PROG_GND
3.4b ATmega JTAG Programming Interface signal names directions
Programmer Signal Name
Signal description
PROG_TCK PROG_TDI PROG_TDO PROG_TMS PROG_RESET
Test Clock Test Data Input Test Data Output Test Mode Select RESET
Signal direction (from Programmer) Output Output Input Input Output
Connect Microcontroller RESET
Signal direction (from Microcontroller) Input Input Output Output Input
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Atmel 10-way JTAG Header (JTAG Interface)
This connection method suitable interfacing Equinox Programmer Target System which features following: Atmel device which features JTAG port e.g. ATmega128 Atmel 10-way JTAG Header This same header used Atmel JTAG-ICE emulator. implement this connection, simply plug 10-way cable into JTAG Header plug other cable into matching header Target System.
Figure Atmel 10-way JTAG Header viewed from above
Warning! Connecting wrong Header cause catastrophic damage Programmer Target System Programmer name PROG_TCK Programmer Input Output Connect Description Target Device JTAG Test Clock Signal Clock signal from programmer Target Device JTAG port. Ground Connection Common ground connection between Programmer Target System. JTAG Test Data Output Data signal from Target device JTAG port programmer.
PROG_GND
GROUND
PROG_TDO
PROG_VCC
TARGET_VCC Target Connection Pins physically connected inside programmer. Connects rail Target System. referred VTref Atmel JTAGICE. JTAG Test Mode Select Mode Select Signal from programmer Target Device JTAG port. Microcontroller RESET control signal This connects main RESET Target Microcontroller. This strictly needed JTAG programming, used RESET Target Device before after programming.
PROG_TMS
PROG_RESET
RESET
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
PROG_VCC
TARGET_VCC Target Connection Pins physically connected inside programmer. Connected JTAG Test Data Input Data signal from programmer Target Device JTAG port. Ground Connection Common ground connection between PROGRAMMER Target System.
PROG_TDI
PROG_GND
GROUND
Output from programmer Target Device Input programmer from Target Device Passive GROUND power rails connected
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Creating JTAG Programming Project
3.9.1 Overview
Programming Project `JTAG Device' created exactly same would `SPI Device' except that device must selected from JTAG Device Library. settings same except <Pre-Programming State Machine> <JTAG Settings>.
3.9.2 Creating (Development project)
simplest create Programming Project JTAG device (Development Mode) Wizard follows: Launch EQTools Select <Create Development (EDS) Project (Development) Wizard will launch Click <Next> <Select Device> screen will displayed.
Select click next `ATmega(JTAG) folder list JTAG devices will displayed Select required device from list then click <OK> device selected. Click <Next> then fill remaining screens Wizard Wizard, click <Test> button save project ATmega256.ppm.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
3.9.3 Testing JTAG Project Development (EDS) Mode
have clicked <Test> button Wizard, then (Development Mode) session will launch. Checking that programmer communicate with Target Chip make sure that programmer communicate Target Chip, reading back Device signature follows: Select <FLASH> Locate <Check Sig> button right-hand side screen click programmer will communicate with Target Chip JTAG Interface Target Chip responds correctly, then will report `Signature Read: Pass'. Target Chip does respond, then will report `Signature Read: Fail'. this happens, please check that JTAG connections correct between programmer Target System that there definitely power applied Target System. Programming FLASH Area Select <FLASH> Click <Write> button Select address range wish program will automatically perform Chip Erase default which will erase entire FLASH before programming data into Click <OK> program FLASH Target Chip. iii. Programming EEPROM Area Select <EEPROM> Click <Write> button Select address range wish program will automatically perform Chip Erase default which will erase entire FLASH before programming data into EEPROM address range which trying program must contain 0xFF otherwise programmer will unable program bytes. Click <OK> program EEPROM Target Chip.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
Upgrading your Programmer Firmware
Overview
Many newer device algorithms require that firmware programmer upgraded specified firmware version. your programmer firmware version less than 3.00, then will need Configit Utility upgrade firmware version 3.00. firmware upgrades after version 3.00 carried using Upload Wizard Utility.
check your programmer firmware version
Please follow steps below check what version firmware your programmer currently running: Launch EQTools Select <Programmer> <Programmer Info> firmware version should displayed. 3.00.
upgrade from firmware version 2.xx
your programmer running firmware version 2.xx, then necessary upgrade version 3.00 first using Configit Firmware Update Utility. Please follow steps below upgrade from firmware version 2.xx version 3.00: Download `Configit Firmware Update Utility' from Equinox website Unzip Configit utility into temporary directory Consult relevant instructional text file your programmer. find these files contained within file. Follow instructions file Configit will upgrade your programmer firmware version 3.00 will also install Boot Loader into programmer future upgrades carried using Upload Wizard utility instead.
upgrade from firmware version 3.xx
your programmer already running firmware version 3.xx, then Upload Wizard utility upgrade your programmer firmware. Please follow steps below upgrade from firmware version 3.xx higher version: Connect your programmer(s) port Power programmer(s) Download latest `EQTools' from Equinox website Install this EQTools software installation will install latest `Firmware Update Projects' into following directory: \program files\equinox\Firmware. Launch EQTools From `Welcome EQTools' screen, select `Upload Project Collection' programmer From EQTools menu bar, click <Upload> icon Upload Wizard will launch Click <Next> twice Detect Programmer(s) screen Click <Detect Programmer(s)> button list detected programmers displayed Click <Next>
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007
`Select Project Collection upload' screen Click <Browse> button then browse following directory: \program files\equinox\Firmware Select relevant Firmware Update Collection file your programmer click <OK> Click <Next> `Select Projects Upload' screen There should only project selected Click <Next> `The attached programmed contains following Project Collection' screen Click <Backup> wish save data already resident programmer. Click <Next> `Upload Project(s) Programmer(s) screen Click <Upload Verify> button firmware project will uploaded programmer Once uploaded, programmer GREEN YELLOW LED's will light seconds which indicates that firmware being upgraded. Once firmware upgrade finished, message will displayed tell firmware been upgraded from version x.xx y.yy. Click <OK> then <Finish> programmer firmware update finished.
Application Note JTAG In-System Programming (ISP) Implementation Atmel Microcontroller Family Version: V1.07 June 2007

AN101 Title: JTAG In-System Programming (ISP) guidelines Atm

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