Using Personal Computer Program This application note describes p

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Microcontroller
Using Personal Computer Program
This application note describes personal computer-based programmer Flash-based Microcontrollers. programmer supports flash memory microcontroller functions, including code read, code write, chip erase, signature read, lock write. When used with AT89C51/C52/ LV51/LV52, code write, chip erase, lock write performed either five twelve volts, required device. Devices sporting "-5" suffix intended operation five volts, while devices lacking suffix operate standard twelve volts. programmer connects PCcompatible host computer through host's parallel ports. Required operating voltages produced integral power supply external, wall-mounted transformer. with error message. control programs menu-driven, provide following functions:
Chip Erase
8-Bit Microcontroller with Flash Application Note
Clear code memory ones. successful operation this function automatically verified.
Program from File
Software
Software programmer available downloading from Atmel 408436-4309. programmer controlled software running host. AT89C51/C52 C1051/C2051 have dedicated control programs, which were written Microsoft Programs dedicated AT89LV51/LV52 exist; these devices supported programs AT89C51/C52, respectively. text below, references AT89C51/C52 assumed apply AT89LV51/LV52 well. programmer control programs invoked from command line entering program name followed "LPT1" "LPT2" specify parallel port two, respectively. parallel port specified, program will respond
Write contents specified file into device memory. user prompted file name, which require path extension. file expected contain binary data; files accepted. first byte file programmed into first location device. Successive bytes programmed into successive locations until last location device been programmed until data file been exhausted. Programming occurs regardless existing contents device memory; blank check automatically performed. After programming, contents device memory automatically verified against file data. Each programmed location device receives maximum programming time specified data sheet. This done because timing enforced software; programming status information provided DATA* polling RDY/BSY* utilized. control program provides visual indication that programming progress. main menu redisplayed when programming complete.
Verify against File
Compare contents code memory against contents specified file. user prompted file name, which require path extension.
0285D
file expected contain binary data; files accepted. first byte file compared first location device. Successive bytes compared successive locations until last location device been compared until data file been exhausted. Locations which fail compare displayed address, with expected actual byte contents. there compare failures, nothing displayed.
Save File
gram. granularity timer 0.838 microseconds, minimum practical delay system- software-dependent. timer code ensures that delay produced will shorter duration than requested. control programs provided AT89C1051/C2051 system independent.
Programmer
programmer circuitry (see Figures consists host interface switchable power supplies. signal sequencing timing required programming generated host under software control. 40-pin socket provided programming AT89C51/C52; 20-pin socket accommodates AT89C1051/C2051. Note that power ground connections bypass capacitors required devices shown schematic. Power programmer circuitry AT89C51/C52/ C1051/C2051 provided fixed five volt supply. second supply provides either five twelve volts, selectable, during programming. addition transistor output variable supply provides third level, ground, when programming AT89C1051/C2051. resistor values utilized variable power supply circuit were determined using equations presented LM317 voltage regulator data sheet. Power supply ramp rates accommodated host software. V-Vpp programming, devices must ordered from factory AT89CXXX-5 (not available with AT89C1051/2051). programmer connected host with 25-conductor ribbon cable. minimize effect signal integrity, length cable should short possible, preferably exceeding three feet.
Copy contents device memory specified file. user prompted file name, which require path extension. number bytes resulting file same number memory locations device.
Blank Check
Verify that contents device memory ones. Only pass fail reported; addresses contents failing locations displayed.
Read Signature
Read display contents signature bytes. number signature bytes their expected contents varies between devices. Refer device data sheet additional information.
Write Lock Write Lock Write Lock
indicated lock bit. Note that AT89C1051/C2051 contain only lock bits, while AT89C51/LV51 AT89C52/LV52 contain three lock bits. state lock bits cannot verified direct observation.
Exit
Quit programmer control program.
Parallel Interface
original parallel interface provided probably intended support bidirectional data transfers. However, which interface implemented, bidirectional transfers possible. Over years, many products have appeared which exploit this capability. Unfortunately, many system interface card manufacturers have faithfully cloned design, resulting contention when peripheral attempts drive return data into interface. Usually peripheral drivers overpower interface drivers peripheral works, though this considered good design practice. Most parallel interfaces implemented single chip, such 82C411 16C452. These chips allow their output drivers disabled under software control, providing true bidirectional operation. programmer software automatically enables bidirectional operation when used with parallel interfaces utilizing 82C411, 16C452, similar chips. Note that these chips also possess mode control which must correct level enable directional control feature. result, parallel interfaces utilizing these chips cannot assumed bidirectional.
System Dependency
control programs AT89C51 AT89C52 come flavors: host system-dependent host system-independent. System-dependency results from software timing loops enforce required delays, duration which will vary between host systems running different speeds. code provided tested 80386-based system running MHz, require modification other systems. This method chosen simplicity. Host system-independence achieved using Programmable Interval Timer embedded system hardware enforce time delays independent system speed. timer reconfigured when control program invoked restored original state before program terminates. order guarantee that program exited before timer configuration restored, CTRL-C CTRL-BREAK keys disabled. This means that program cannot aborted except specifying exit option main menu rebooting system. timer control code provided 8086 assembly language module, which linked with compiled control pro-
Microcontroller
Microcontroller
programmer writes devices, fails verify, signal levels interface don't meet specifications, parallel interface incompatible with programmer. design provided (see Figure parallel interface which supports bidirectional operation compatible with programmer. This design simple, requiring only ICs. interface strapped appear LPT1 (addresses 378-37F hex) LPT2 (278-27F hex) will recognized POST when host system powered simplicity, parallel interface cannot used printer interface.
Figure AT89C Series Programmer Interface
Note:
bypass caps ICs.
Microcontroller
Microcontroller
Figure Power Supply AT89C Series Programmer
Figure AT89C Series Programmer Socket Wiring
Microcontroller

Using Personal Computer Program This application note describes p

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