IDT7203 IDT7204 IDT7205 IDT7206 FEATURES: First-In/First-Out
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CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
IDT7203 IDT7204 IDT7205 IDT7206
FEATURES:
First-In/First-Out Dual-Port memory 2048 organization (IDT7203) 4096 organization (IDT7204) 8192 organization (IDT7205) 16384 organization (IDT7206) High-speed: 12ns access time power consumption Active: 770mW (max.) Power-down: 44mW (max.) Asynchronous simultaneous read write Fully expandable both word depth width functionally compatible with IDT720X family Status Flags: Empty, Half-Full, Full Retransmit capability High-performance CMOS technology Military product compliant MIL-STD-883, Class Standard Military Drawing #5962-88669 (IDT7203), 5962-89567 (IDT7203), 5962-89568 (IDT7204) listed this function.
DESCRIPTION:
IDT7203/7204/7205/7206 dual-port memory buffers with internal pointers that load empty data firstin/first-out basis. device uses Full Empty flags prevent data overflow underflow expansion logic allow unlimited expansion capability both word size depth. Data toggled device through Write Read pins. devices 9-bit width provides control parity user's option. also features Retransmit (RT) capability that allows read pointer reset initial position when pulsed LOW. Half-Full Flag available single device width expansion modes. IDT7203/7204/7205/7206 fabricated using IDT's high-speed CMOS technology. They designed applications requiring asynchronous simultaneous read/writes multiprocessing, rate buffering, other applications. Military grade product manufactured compliance with latest revision MIL-STD-883, Class
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
WRITE CONTROL
WRITE POINTER
ARRAY 2048 4096 8192 16384
READ POINTER
THREESTATE BUFFERS
READ CONTROL FLAG LOGIC
DATA OUTPUTS
RESET LOGIC
EXPANSION LOGIC
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logo registered trademark Integrated Device Techology, Inc.
MILITARY COMMERCIAL TEMPERATURE RANGES
©1995
AUGUST 1994
DSC-2004/7
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
CONFIGURATIONS
P28-1 P28-2 D28-1 D28-3 SO28-3
FL/RT XO/HF
INDEX
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J32-1 L32-1
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VIEW
NOTES: THINDIPs P28-2 D28-3 only available 7203/7204/ 7205. small outline package SO28-3 only available 7204. Consult factory CERPACK pinout.
PLCC/LCC VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM Rating Terminal Voltage with Respect Operating Temperature Temperature Under Bias Storage Temperature Output Current Commercial -0.5 Military -0.5 +7.0 Unit
RECOMMENDED OPERATING CONDITIONS
Symbol VCCM VCCC VIH(1) VIH(1) VIL(1) Parameter Military Supply Voltage Commercial Supply Voltage Supply Voltage Input High Voltage Commercial Input High Voltage Military Input Voltage Commercial Military Min. Typ. Max. Unit
TBIAS TSTG IOUT
+125
+125 +135 +155
NOTE: 2661 Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
NOTE: 1.5V undershoots allowed 10ns once cycle.
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5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
ELECTRICAL CHARACTERISTICS 7203 7204
(Commercial: 5.0V±10%, +70°C; Military: 5.0V±10%, -55°C +125°C)
IDT7203/7204 Commercial Symbol ILI(2) ILO(3) ICC1(4) ICC2(4) ICC3(L)(4) ICC3(S)
IDT7203/7204 Military(1) Min. Typ. Max.
Parameter Input Leakage Current (Any Input) Output Leakage Current Output Logic Voltage -2mA Output Logic Voltage Active Power Supply Current Standby Current (R=W=RS=FL/RT=VIH) Power Down Current (All Input 0.2V) Power Down Current (All Input 0.2V)
Min.
Typ.
Max.
Unit
2661
NOTES: Speed grades 120ns only available ceramic DIP. Measurements with VCC. VIH, VOUT VCC. measurements made with outputs open (only capacitive loading). Tested 20MHz.
ELECTRICAL CHARACTERISTICS 7205 7206
(Commercial: 5.0V±10%, +70°C; Military: 5.0V±10%, -55°C +125°C)
IDT7205/7206 Commercial Symbol
IDT7205/7206 Military Min. Typ. Max. 150(4) Unit
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Parameter Input Leakage Current (Any Input) Output Leakage Current Output Logic Voltage -2mA Output Logic Voltage Active Power Supply Current Standby Current (R=W=RS=FL/RT=VIH)
Min.
Typ.
Max. 120(4)
ILO(2) ICC1(3) ICC2(3) ICC3(L)
Power Down Current (All Input 0.2V)
NOTES: Measurements with VCC. VIH, VOUT VCC. measurements made with outputs open (only capacitive loading). Tested 20MHz.
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
ELECTRICAL CHARACTERISTICS(1)
(Commercial: 10%, +70°C; Military: 10%, -55°C +125°C)
Commercial 7203S/L12 7204S/L12 7203S/L15 7204S/L15 7205L15 7206L15 Com'l Mil. 7203S/L20 7204S/L20 7205L20 7206L20 Max. 33.3 Com'l 7203S/L25 7204S/L25 7205L25 7206L25 28.5 Military Com'l 7203S/L30 7203S/L35 7204S/L30 7204S/L35 7205L30 7205L35 7206L30 7206L35 22.2
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Symbol tRPW tRLZ tWLZ tRHZ tWPW tRSC tRSS tRTR tRTC tRTS tRSR tEFL tRTF tREF tRFF tRPE tWEF tWFF tWHF tRHF tWPF tXOL tXOH tXIR tXIS
Parameters Shift Frequency Read Cycle Time Access Time Read Recovery Time Read Pulse Width
Min. Max. Min. Max. Min.
Min. Max. Min. Max. Min. Max. Unit
Read Data LOW(3) Write HIGH Data Low-Z Data Valid from Read HIGH Read HIGH Data High-Z Write Cycle Time Write Pulse Width Data Set-up Time Data Hold Time Reset Cycle Time Reset Pulse Width(2) Reset Set-up Time(3) Reset Recovery Time Retransmit Cycle Time Retransmit Pulse Width(2) Retransmit Set-up Time(3) Retransmit Recovery Time Reset Retransmit Flags Valid Read Read HIGH HIGH Read Pulse Width after HIGH Write HIGH HIGH Write Write Flag Read HIGH Flag HIGH Write Pulse Width after HIGH Read/Write Read/Write HIGH HIGH
Write Recovery Time
tHFH, tFFH Reset HIGH
Pulse Width(2) Recovery Time Set-up Time
NOTES: Timings referenced Test Conditions. Pulse widths less than minimum allowed. Values guaranteed design, currently tested. Only applies read data flow-through mode.
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
ELECTRICAL CHARACTERISTICS(1) (Continued)
(Commercial: 10%, +70°C; Military: 10%, -55°C +125°C)
Military 7203S/L40 7204S/L40 Com'l Mil. 7203S/L50 7204S/L50 7205L50 7206L50 Min. 7203S/L65 7204S/L65 Military(2) 7203S/L80 7204S/L80 7203S/L120 7204S/L120
Symbol tRPW tRLZ tWLZ tRHZ tWPW tRSC tRSS tRSR tRTC tRTS tRSR tEFL tHFH, tFFH tRTF tREF tRFF tRPE tWEF tWFF tWHF tRHF tWPF tXOL tXOH tXIR tXIS
Parameters Shift Frequency Read Cycle Time Access Time Read Recovery Time Read Pulse Width
Min.
Max.
Max. Min.
Max. Min. 12.5
Max. Min.
Max.
Unit
2661
Read Data LOW(4) Write HIGH Data Low-Z Data Valid from Read HIGH Read HIGH Data High-Z(4) Write Cycle Time Write Pulse Width(3) Write Recovery Time Data Set-up Time Data Hold Time Reset Cycle Time Reset Pulse Width(3) Reset Set-up Time
Reset Recovery Time Retransmit Cycle Time Retransmit Pulse Width Retransmit Set-up Time(4) Retransmit Recovery Time Reset Reset HIGH Retransmit Flags Valid Read Flag Read HIGH HIGH Read Pulse Width after HIGH Write HIGH HIGH Write Write Read HIGH HIGH Write Pulse Width after HIGH Read/Write Read/Write HIGH HIGH
Pulse Width(3) Recovery Time Set-up Time
NOTES: Timings referenced Test Conditions. Speed grades 120ns only available ceramic DIP. Pulse widths less than minimum allowed. Values guaranteed design, currently tested. Only applies read data flow-through mode.
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load 3.0V 1.5V 1.5V Figure
2661
1.1K D.U.T. 30pF*
CAPACITANCE(1) +25°C, MHz)
Symbol CIN(1) COUT
(1,2)
Parameter Input Capacitance Output Capacitance
Condition VOUT
Max.
Unit
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2661
EQUIVALENT CIRCUIT
NOTES: This parameter sampled 100% tested. With output deselected.
Figure Output Load *Includes scope capacitances.
SIGNAL DESCRIPTIONS Inputs:
DATA (D0-D8) Data inputs 9-bit wide data.
Controls:
RESET (RS) Reset accomplished whenever Reset (RS) input taken state. During reset, both internal read write pointers first location. reset required after power-up before write operation take place. Both Read Enable Write Enable inputs must HIGH state during window shown Figure (i.e. tRSS before rising edge should change until tRSR after rising edge WRITE ENABLE write cycle initiated falling edge this input Full Flag (FF) set. Data set-up hold times must adhered-to, with respect rising edge Write Enable (W). Data stored array sequentially independently on-going read operation. After half memory filled, falling edge next write operation, Half-Full Flag (HF) will LOW, will remain until difference between write pointer read pointer less-than equal one-half total memory device. Half-Full Flag (HF) reset rising edge read operation. prevent data overflow, Full Flag (FF) will falling edge last write signal, which inhibits further write operations. Upon completion valid read operation, Full Flag (FF) will HIGH after tRFF, allowing valid write begin. When FIFO full, internal write pointer blocked from external changes will affect FIFO when full.
READ ENABLE read cycle initiated falling edge Read Enable (R), provided Empty Flag (EF) set. data accessed First-In/First-Out basis, independent ongoing write operations. After Read Enable goes HIGH, Data Outputs through will return high-impedance condition until next Read operation. When data been read from FIFO, Empty Flag (EF) will LOW, allowing "final" read cycle inhibiting further read operations, with data outputs remaining highimpedance state. Once valid write operation been accomplished, Empty Flag (EF) will HIGH after tWEF valid Read then begin. When FIFO empty, internal read pointer blocked from external changes will affect FIFO when empty. FIRST LOAD/RETRANSMIT (FL/RT) This dualpurpose input. Depth Expansion Mode, this grounded indicate that first device loaded (see Operating Modes). Single Device Mode initiated grounding Expansion (XI). IDT7203/7204/7205/7206 made retransmit data when Retransmit Enable Control (RT) input pulsed LOW. retransmit operation will internal read pointer first location will affect write pointer. status Flags will change depending relative locations read write pointers. Read Enable Write Enable must HIGH state during retransmit. This feature useful when less than 2048/4096/8192/16384 writes performed between resets. retransmit feature compatible with Depth Expansion Mode. EXPANSION (XI) This input dual-purpose pin. Expansion (XI) grounded indicate operation single device mode. Expansion (XI) connected Expansion (XO) previous device Depth Expansion Daisy-Chain Mode.
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IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
Outputs:
FULL FLAG (FF) Full Flag (FF) will LOW, inhibiting further write operations, when device full. read pointer moved after Reset (RS), Full Flag (FF) will after 2048/4096/8192/16384 writes. EMPTY FLAG (EF) Empty Flag (EF) will LOW, inhibiting further read operations, when read pointer equal write pointer, indicating that device empty. EXPANSION OUT/HALF-FULL FLAG (XO/HF) This dual-purpose output. single device mode, when Expansion (XI) grounded, this output acts indication halffull memory. After half memory filled, falling edge next write operation, Half-Full Flag (HF) will will remain until difference between write pointer
read pointer less than equal half total memory device. Half-Full Flag (HF) then reset rising edge read operation. Depth Expansion Mode, Expansion (XI) connected Expansion (XO) previous device. This output acts signal next device Daisy Chain providing pulse next device when previous device reaches last location memory. There will pulse when Write pointer reaches last location memory, additional pulse when Read pointer reaches last location memory. DATA OUTPUTS (Q0-Q8) Q0-Q8 data outputs 9bit wide data. These outputs high-impedance condition whenever Read HIGH state.
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NOTE: around rising edge Figure Reset
DATA VALID DATA VALID
DATA VALID
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DATA VALID
Figure Asynchronous Write Read Operation
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
LAST WRITE
IGNORED WRITE
FIRST READ
2661
Figure Full FlagTiming From Last Write First Read
LAST READ
IGNORED READ
FIRST WRITE
DATA VALID
2661
Figure Empty Flag Timing From Last Read First Write
FLAG VALID
2661
NOTE: change status during Retransmit, flags will valid tRTC. Figure Retransmit
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
2661
Figure Minimum Timing Empty Flag Coincident Read Pulse.
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Figure Minimum Timing Full Flag Coincident Write Pulse.
HALF-FULL LESS
MORE THAN HALF-FULL
HALF-FULL LESS
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Figure Half-Full Flag Timing
WRITE LAST PHYSICAL LOCATION READ FROM LAST PHYSICAL LOCATION
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Figure Expansion
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
WRITE FIRST PHYSICAL LOCATION
READ FROM FIRST PHYSICAL LOCATION
2661
Figure Expansion
OPERATING MODES:
Care must taken assure that appropriate flag monitored each system (i.e. monitored device where used; monitored device where used). additional information, refer Tech Note Operating FIFOs Full Empty Boundary Conditions Tech Note Designing with FIFOs. Single Device Mode single IDT7203/7204/7205/7206 used when application requirements 2048/4096/8192/16384 words less. IDT7203/7204/7205/7206 Single Device Configuration when Expansion (XI) control input grounded (see Figure 12). Depth Expansion IDT7203/7204/7205/7206 easily adapted applications when requirements greater than 2048/ 4096/8192/16384 words. Figure demonstrates Depth Expansion using three IDT7203/7204/7205/7206s. depth attained adding additional IDT7203/7204/7205/ 7206s. IDT7203/7204/7205/7206 operates Depth Expansion mode when following conditions met: first device must designated grounding First Load (FL) control input. other devices must have HIGH state. Expansion (XO) each device must tied Expansion (XI) next device. Figure External logic needed generate composite Full Flag (FF) Empty Flag (EF). This requires ORing ORing (i.e. must generate correct composite EF). Figure Retransmit (RT) function Half-Full Flag (HF) available Depth Expansion Mode. additional information, refer Tech Note Cascading FIFOs FIFO Modules.
USAGE MODES:
Width Expansion Word width increased simply connecting corresponding input control signals multiple devices. Status flags (EF, detected from device. Figure demonstrates 18-bit word width using IDT7203/7204/7205/7206s. word width attained adding additional IDT7203/7204/7205/7206s (Figure 13). Bidirectional Operation Applications which require data buffering between systems (each system capable Read Write operations) achieved pairing IDT7203/7204/7205/7206s shown Figure Both Depth Expansion Width Expansion used this mode. Data Flow-Through types flow-through modes permitted, read flow-through write flow-through mode. read flowthrough mode (Figure 17), FIFO permits reading single word after writing word data into empty FIFO. data enabled (tWEF after rising edge called first write edge, remains until line raised from LOW-to-HIGH, after which would into three-state mode after tRHZ line would have pulse showing temporary deassertion then would asserted. write flow-through mode (Figure 18), FIFO permits writing single word data immediately after reading word data from full FIFO. line causes deasserted line being causes asserted again anticipation data word. rising edge word loaded FIFO. line must toggled when asserted write data FIFO increment write pointer. Compound Expansion expansion techniques described above applied together straightforward manner achieve large FIFO arrays (see Figure 15).
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
(HALF-FULL FLAG) WRITE DATA FULL FLAG (FF) RESET (RS)
(HF) READ 7203/ 7204/ 7205/ 7206 DATA EMPTY FLAG (EF) RETRANSMIT (RT)
EXPANSION (XI)
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Figure Block Diagram 2048 9/4096 9/8192 9/16384 FIFO Used Single Device Mode
DATA WRITE FULL FLAG (FF) RESET (RS)
7203/ 7204/ 7205/ 7206
7203/ 7204/ 7205/ 7206
READ EMPTY FLAG (EF)
RETRANSMIT (RT)
DATA
2661
NOTE: Flag detection accomplished monitoring connect output signals together.
signals either (any) device used width expansion configuration.
Figure Block Diagram 2048 18/4096 18/8192 18/16384 FIFO Memory Used Width Expansion Mode
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
TRUTH TABLES TABLE RESET RETRANSMIT
SINGLE DEVICE CONFIGURATION/WIDTH EXPANSION MODE
Inputs Mode Reset Retransmit Read/Write
Internal Status Read Pointer Location Zero Location Zero Increment Write Pointer Location Zero Unchanged Increment
Outputs
2661
NOTE: Pointer will Increment flag HIGH.
TABLE RESET FIRST LOAD
DEPTH EXPANSION/COMPOUND EXPANSION MODE
Inputs Mode Reset First Device Reset Other Devices Read/Write
Internal Status Read Pointer Location Zero Location Zero Write Pointer Location Zero Location Zero
Outputs
2661 NOTES: connected previous device. Figure Reset Input, FL/RT First Load/Retransmit, Empty Flag Output, Full Flag Output, Expansion Input, Half-Full Flag Output
7203/ 7204/ 7205/ 7206
FULL
7203/ 7204/ 7205/ 7206
EMPTY
7203/ 7204/ 7205/ 7206
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Figure Block Diagram 6149 9/12298 9/24596 9/49152 FIFO Memory (Depth Expansion)
5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
IDT7203/ IDT7204/ IDT7205/ IDT7206 DEPTH EXPANSION BLOCK
NOTES: depth expansion block section Depth Expansion Figure Flag detection section Width Expansion Figure
IDT7203/ IDT7204/ IDT7205/ IDT7206 DEPTH EXPANSION BLOCK (N-8)
(N-8) (N-8) IDT7203/ IDT7204/ IDT7205/ IDT7206 DEPTH EXPANSION BLOCK (N-8)
2661
Figure Compound FIFO Expansion
7203/ 7204/ 7201A 7205/ 7206
SYSTEM
SYSTEM
7203/ 7204/ 7205/ 7206
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Figure Bidirectional FIFO Operation
DATA
DATA
Figure Read Data Flow-Through Mode
DATA VALID
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5.20
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO 2048 4096 8192 16384
MILITARY COMMERCIAL TEMPERATURE RANGES
DATA DATA DATA VALID DATA VALID
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Figure Write Data Flow-Through Mode
ORDERING INFORMATION
XXXX Device Type Power Speed Package Process/ Temperature Range Blank Commercial (0°C +70°C) Military (-55°C +125°C) Compliant MIL-STD-883, Class
7203 7204 7205 7206
Plastic Plastic THINDIP (all except 7206) Ceramic Ceramic THINDIP (all except 7206) Plastic Leaded Chip Carrier Leadless Chip Carrier (Military only) Small Outline (7204 only) Commercial 7203/04 Only Commercial Only Commercial Only Military Only Commercial Only Military 7203/04 Only Military 7203/04DB Only Standard Power (7203/7204 only) Power 2048 FIFO 4096 FIFO 8192 FIFO 16384 FIFO
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Access Time (tA) Speed
5.20
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