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16COM/40SEG Controller/Driver AUG. 2003 Version SUNPLUS TECH


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SPLC780D
16COM/40SEG Controller/Driver
AUG. 2003 Version
SUNPLUS TECHNOLOGY reserves right change this documentation without prior notice. Information provided SUNPLUS TECHNOLOGY believed accurate reliable. However, SUNPLUS TECHNOLOGY makes warranty errors which appear this document. responsibility assumed Contact SUNPLUS TECHNOLOGY obtain latest version device specifications before placing your order.
SUNPLUS TECHNOLOGY infringement patent other rights third parties which result from use. addition, SUNPLUS products authorized critical components life support devices/ systems aviation devices/systems, where malfunction failure product reasonably expected result significant injury user, without express written approval Sunplus.
SPLC780D
Table Contents
PAGE
GENERAL DESCRIPTION. FEATURES BLOCK DIAGRAM SIGNAL DESCRIPTIONS 4.1. ORDERING INFORMATION FUNCTIONAL DESCRIPTIONS. 5.1. OSCILLATOR 5.2. CONTROL DISPLAY INSTRUCTIONS 5.3. INSTRUCTION TABLE. 5.4. 8-BIT OPERATION 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET). 5.5. 4-BIT OPERATION 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET). 5.6. 8-BIT OPERATION 8-DIGIT 2-LINE DISPLAY (USING INTERNAL RESET). 5.7. RESET FUNCTION 5.8. DISPLAY DATA RAM) 5.9. TIMING GENERATION CIRCUIT. 5.10. DRIVER CIRCUIT 5.11. CHARACTER GENERATOR ROM) 5.12. CHARACTER GENERATOR RAM) 5.13. CURSOR/BLINK CONTROL CIRCUIT 5.14. INTERFACING MPU. 5.15. SUPPLY VOLTAGE DRIVE 5.16. REGISTER (INSTRUCTION REGISTER) (DATA REGISTER) 5.17. BUSY FLAG (BF) 5.18. ADDRESS COUNTER (AC). 5.19. PORT CONFIGURATION ELECTRICAL SPECIFICATIONS 6.1. ABSOLUTE MAXIMUM RATINGS 6.2. CHARACTERISTICS (VDD 2.7V 4.5V, 6.3. CHARACTERISTICS (VDD 2.7V 4.5V, 6.4. CHARACTERISTICS (VDD 4.5V 5.5V, 6.5. CHARACTERISTICS (VDD 4.5V 5.5V, APPLICATION CIRCUITS. 7.1. R-OSCILLATOR 7.2. INTERFACE MPU. 7.3. SPLC780D APPLICATION CIRCUIT 7.4. APPLICATIONS CHARACTER GENERATOR 8.1. SPLC780D 001. PACKAGE/PAD LOCATIONS 9.1. ASSIGNMENT LOCATIONS. 9.2. PACKAGE CONFIGURATION 9.3. PACKAGE INFORMATION DISCLAIMER. REVISION HISTORY
Sunplus Technology Co., Ltd. Proprietary Confidential
AUG. 2003 Preliminary Version:
SPLC780D
16COM/40SEG CONTROLLER/DRIVER
GENERAL DESCRIPTION
SPLC780D, dot-matrix controller driver from SUNPLUS, unique design displaying alpha-numeric, Japanese-Kana characters symbols. SPLC780D single provides types interfaces MPU: 4-bit 8-bit interfaces. transferring speed 8-bit twice faster than 4-bit. SPLC780D able display 8-character lines. extended. rank.
FEATURES
Character generator ROM: 10880 bits Character font dots: characters Character font dots: characters Character generator RAM: bits Character font dots: characters Character font dots: characters
cascading with SPLC100 SPLC063, display capability CMOS technology ensures power saves most efficient performance keeps highest
BLOCK DIAGRAM
OSC1 OSC2
DB0-DB3 DB4-DB7 Power Supply Drive (V1-V5)
4-bit 8-bit interfaces Direct driver LCD: COMs SEGs duty: line dots Duty factor (selected program): 1/11 duty: line dots 1/16 duty: lines dots line Built-in power automatic reset circuit Support external clock operation Power Consumption Built-in oscillator circuit (with external resistor) Package form: bare chip available
Timing Generation Circuit
CL1,CL2
Parallel Serial Data Conversion Circuit Character Generator Character Generator
Busy Flag
Cursor Blink Control Circuit
40-bit Shift Register
Buffer
Data Register
Latch Circuit
Instruction Register Instruction Decorder Display Data Bytes 16-bit Shift Register
Segments Commons Driver
COM1COM16
SEG1SEG40
Address Counter
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SPLC780D
SIGNAL DESCRIPTIONS
Mnemonic OSC1 OSC2 Type Power input Ground Both OSC1 OSC2 connected resistor internal oscillator circuit. external clock operation, clock input OSC1. Supply voltage driving. start signal reading writing data. signal selecting read write actions. Read, Write. signal selecting registers. Description
SEG1 SEG22 SEG23 SEG40 COM1 COM16
4.1. Ordering Information
SPLC780D-NnnV-C
Note1: Code number assigned customer.
SPLC780D-NnnV-PQ05
Note2: Code number 99); version
Data Register (for read write) Instruction Register (for write), 4-bit data Busy flag Address Counter (for read). High 4-bit data Clock latch serial data Clock shift serial data Switch signal convert waveform Selection, Non-selection. Segment signals LCD. Common signals LCD. Product Number Package Type Chip form Package form
Sends character pattern data corresponding each common signal serially.
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SPLC780D
FUNCTIONAL DESCRIPTIONS
5.1. Oscillator
SPLC780D oscillator supports only internal oscillator operation, also external clock operation. I/D=1 I/D=0 shifts display left shifts display right
5.2. Control Display Instructions
Control display instructions described details follows:
5.2.4. Display ON/OFF control
5.2.1. Clear display
Code
clears entire display sets Display Data Address Address Counter.
5.2.2. Return home
Code
care
sets Display Data Address Address Counter display returns original position. displayed). change. most-left side display line lines
contents Display Data
5.2.3. Entry mode
shifts display.
Code
During writing reading data, defines cursor moving direction
Code
Display Display Cursor Cursor Blinks Blinks
character font
character font
line
Cursor
11th line
cursor blink goes
5.2.5. Cursor display shift
display.
Without changing data, moves cursor shifts
Code
Blink display alternately
Increment, Decrement. display shift, display does shift.
Shift cursor left Shift cursor right Shift display left. Shift display right.
Description
Address Counter
Cursor follows display shift Cursor follows display shift
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SPLC780D
5.2.6. Function
Display data read written after this setting.
Code
one-line display (aaaaaaa)2: (00)16 (4F)16.
care sets interface data length. Data transferred with 8-bit length (DB7 Data transferred with 4-bit length (DB7 sets number display line. One-line display. Two-line display. requires times accomplish data transferring.
two-line display (aaaaaaa)2: (00)16 (27)16 first line, (aaaaaaa)2: (40)16 (67)16 second line.
sets character font.
dots character font.
dots character font.
Display Lines
cannot display lines with dots character font.
5.2.7. character generator address
Code
sets Character Generator Address (aaaaaa)2 Address Counter.
Character Generator data read written after this setting.
5.2.9. Read busy flag address
Code
When indicates system busy will accept instruction until busy same time, content Address Counter (aaaaaaa)2 read.
Character Font Duty Factor dots
dots dots
5.2.10. Write data character generator display data
Code
writes data (dddddddd)2 character generator display
data RAM.
5.2.11. Read data from character generator display data
Code
5.2.8. display data address
Code
reads data (dddddddd)2 from character generator display data RAM. read data correctly, following: address Character Generator Display Data shift cursor instruction.
sets Display Data Address (aaaaaaa)2 Address Counter.
Read instruction.
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SPLC780D
5.3. Instruction Table
Instruction Clear Display Return Home Instruction Code Description Write "20H" DDRAM DDRAM address "00H" from DDRAM address "00H" from return cursor original position shifted. changed. Entry Mode Display Control Cursor Display Shift Function contents DDRAM 38µs 38µs 38µs 1.52ms Execution time (fosc=270KHz) 1.52ms
CGRAM Address DDRAM Address Read Busy Flag Address Counter Write Data Read Data from
Note: "-": don't care
Assign cursor moving direction enable shift entire display display(D), cursor(C), blinking cursor moving display shift control cursor(B) on/off control bit. bit, direction, without changing DDRAM data. interface data length (DL: 8-bit/4-bit), numbers display line 2-line/1-line) and, display font type (F:5x10 dots/5x8 dots) CGRAM address address counter. DDRAM address counter Whether during internal operation known reading read. contents address counter also data into internal Write (DDRAM/CGRAM). data Read from internal (DDRAM/CGRAM).
38µs
38µs 38µs
38µs 38µs
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SPLC780D
5.4. 8-Bit Operation 8-Digit 1-Line Display (Using Internal Reset)
Instruction Power (SPLC780D starts initializing) Function
Display Power reset. display.
Operation
8-bit operation select 1-line display line character font.
Display control
Display Cursor appear. Increase address one.
Entry mode
Write data
Write data
Write data
Entry mode
Write data
Write data
Write data
Cursor display shift
Cursor display shift
will shift cursor right when writing RAM/CG RAM. display shift.
Write
cursor incremented shifted right. Write
cursor incremented shifted right.
WELCOME_
Write
cursor incremented shifted right. mode display shift when writing
WELCOME_
ELCOME
Write
"(space).
cursor incremented shifted right. Write
LCOME
cursor incremented shifted right.
COMPAMY_
Write
cursor incremented shifted right.
COMPAMY_
Only shift cursor's position left (Y).
COMPAMY_
Only shift cursor's position left (M).
Write data
OMPANY_
Write display moves left.
Cursor display shift
COMPAMY_
Shift display cursor's position right.
Cursor display shift
OMPANY_
Shift display cursor's position right.
Write data
COMPAMY_
Write
(space).
cursor incremented shifted right.
Return home
WELCOME_
Both display cursor return original position (address
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SPLC780D
5.5. 4-Bit Operation 8-Digit 1-Line Display (Using Internal Reset)
Power (SPLC780D starts initializing) Instruction Display Operation
Power reset. display.
Function
4-bit operation.
4-bit operation select 1-line display line character font.
5.6. 8-Bit Operation 8-Digit 2-Line Display (Using Internal Reset)
Power Function
Instruction
(SPLC780D starts initializing)
Display control
Entry mode
Write data
Display
Cursor appears.
Increase address one.
will shift cursor right when writing RAM. display shift.
Write
cursor incremented shifted right.
Display
Operation
Power reset. display.
8-bit operation select 2-line display line character font.
Display
Cursor appear.
Increase address one. RAM.
will shift cursor right when writing display shift. Write
cursor incremented shifted right.
WELCOME_
Write data
Write cursor incremented shifted right.
address
WELCOME
sets RAM's address. cursor moved beginning position line. Write cursor incremented shifted right.
Write data
WELCOME
Write data
WELCOME PART_
Write cursor incremented shifted right.
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SPLC780D
Entry mode
Instruction
Display
WELCOME PART_
Operation When writing, sets mode display shift.
Write data
ELCOME PARTY_
Write cursor incremented shifted right. Both display cursor return original position (address
Return home
WELCOME PARTY
5.7. Reset Function
follows:
power SPLC780D starts internal auto-reset circuit executes initial instructions.
time
time
8-Bit Interface
Power
initial procedures shown
time after 4.5V
time 40ms After 2.7V
cannot checked before this instruction Function Interface bits length
cannot checked before this instruction Function Interface bits length
cannot checked before this instruction Function Interface bits length
checked after following instructions Function Interface bits length Specify number display lines character font number display lines character font cannot changed afterwards Display Display clear
Initialization Ends
Entry mode
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4-Bit Interface
Power
time after 4.5V
time 40ms After 2.7V
cannot checked before this instruction Function Interface bits length
time
time
Initialization Ends
cannot checked before this instruction Function Interface bits length
cannot checked before this instruction Function Interface bits length
checked after following instructions
Function interface bits length) Interface bits length
Function Interface bits length Specify number display lines character font
number display lines character font cannot changed afterwards Display
Display clear
Entry mode
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5.8. Display Data RAM)
80-bit normally used storing display data. Those used display data used general data RAM. address configured Address Counter. relationships between Display Data Address LCDs position depicted follows.
1-line display display characters
Display position Display data address
Example 1-line display display characters
When display shift operation performed display data RAM's address moves Left shift Right shift
5.9. Timing Generation Circuit
internal circuits.
timing generating circuit able generate timing signals order prevent internal timing interface, access timing access timing generated independently.
5.10. Driver Circuit
driver circuit.
Total commons segments signal drivers valid When program specifies character fonts line numbers, corresponding common signals output drive-waveforms others still output unselected waveforms.
Display position Display data address
5.11. Character Generator ROM)
dots character patterns.
Using 8-bit character code, character generator generates dots dots character patterns. also generate 192's dots character patterns 64's
5.12. Character Generator RAM)
generator through program.
Users easily change character patterns character written dots, 8-character patterns dots 4-character patterns.
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following diagram shows SPLC780D character patterns: Correspondence between Character Codes Character Patterns.
Higher 4-bit Character Code (Hexadecimal)
Lower 4-bit Character Code (Hexadecimal)
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relationships between Character Generator Addresses, Character Generator Data (character patterns), Character Codes depicted follows:
5.12.1. character patterns
Character Code Data
Address
Character Patterns Data
Note1:
means that bit0~2 character code correspond bit3~5 address.
Note2:
These areas used display, used general data RAM.
Note3: When bit4-7 character code character patterns selected. Note4: Selected, selected care
Character Pattern Example
Cursor Position
Character Pattern Example
Note5: example (1), character code b7-b4 display display character. Note6: bits character code character pattern line position. with cursor.
That means character code (00) 16,and (08)
line cursor position display formed logical
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5.12.2. character patterns
Character Code Data
Address
Character Patterns Data Character Pattern Example
Note1:
means that bit1~2 character code correspond bit4~5 address.
Note2:
These areas used display, used general data RAM.
Note3: When bit4-7 character code character patterns selected. Note4: Selected, selected, care (08) 16,and (09) display character. with cursor.
Note5: example (1), character code b7-b4 display Note6: bits character code character pattern line position.
Cursor Position
That means character codes (00) (01)
11th line cursor position display formed logical
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5.13. Cursor/Blink Control Circuit
This circuit generates cursor blink cursor blink control circuit. cursor blink appears digit Display Data Address defined Address Counter. When Address Counter (07) cursor position shown belows:
1-line display digit
2-line display digit line line
5.14. Interfacing
There types data operations: 4-bit 8-bit operations. Using 4-bit MPU, interfacing 4-bit data transferred 4-busline (DB4 DB7). used. transferring. Thus, lines Using 4-bit interface 8-bit data requires times
First, higher 4-bit data transferred
4-busline (for 8-bit operation, DB4). DB0).
4-bit data transferred 4-busline (for 8-bit operation, 8-bit MPU, 8-bit data transferred 8-buslines (DB0 DB7).
Display position Display data address Hexadecimal cursor position Display position Display data address Hexadecimal cursor position
5.15. Supply Voltage Drive
obtaining drive-waveform.
Different voltages supplied SPLC780D's pins relationships between bias, duty factor supply voltages shown belows:
Duty Factor
1/8, 1/11
1/16
Secondly, lower
Supply
Voltage
VLCD VLCD VLCD VLCD VLCD
VLCD VLCD VLCD VLCD VLCD
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5.15.1. power connections (1/4 Bias, Bias) shown belows:
+5.0V VLCD VLCD +5.0V
Bias
(1/8,1/11 Duty)
bypass-capacitor improves display quality.
Bias (1/16 Duty)
VDD( +5.0V
VDD( +5.0V
Bias (1/8,1/11 Duty) Bias
(1/16 Duty)
bias voltage must have following relations:
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5.15.2. relationship between frames frequency oscillators frequency.
(Assume oscillation frequency 250KHz, clock cycle time 4.0µs)
5.15.2.1. Duty, TYPE-B waveform
clocks COM1 V2(V3)
frame 4(µs) 12800(µs) 12.8ms Frame frequency 78.1(Hz) 12.8(ms)
5.15.2.2. 1/11 Duty, TYPE-B waveform
COM1 V2(V3)
frame 4(µs) 17600(µs) 17.6ms Frame frequency 17.6(ms) .8(Hz)
5.15.2.3. 1/16 Duty, TYPE-B waveform
Frame Frame
clocks Frame Frame
clocks COM1 Frame frame 4(µs) 12800(µs) 12.8ms Frame frequency 78.1(Hz) 12.8(ms) Frame
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5.16. REGISTER (Instruction Register) (Data Register)
SPLC780D contains 8-bit registers: Instruction Register (IR) Data Register (DR). Using combinations
5.19. Port Configuration 5.19.1. Input port:
selects below:
PMOS
Operation
NMOS
write (Display clear, etc.) Read busy flag (DB7) Address Counter (DB0 DB6) write Display data Character generator RAM) generator
read (Display data Character
written MPU, cannot read MPU.
5.17. Busy Flag (BF)
When busy flag output DB7. instruction until busy flag
busy flag SPLC780D busy state does accept
5.18. Address Counter (AC)
Character Generator RAM.
Address Counter assigns addresses Display Data When instruction address
written address information sent from After writing to/reading from Display Data Character Generator RAM, automatically incremented when
decremented one). contents output
5.19.4. Input Output port:
5.19.2. Input port: R/W,
PMOS
PMOS
NMOS
5.19.3. Output port: CL1, CL2,
PMOS
NMOS
Enable
PMOS
PMOS
NMOS
Data
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ELECTRICAL SPECIFICATIONS
6.1. Absolute Maximum Ratings
Characteristics Symbol Ratings
Operating Voltage Driver Supply Voltage Input Voltage Range Operating Temperature Storage Temperature
VLCD TSTO
-0.3V +7.0V 0.3V -0.3V 0.3V +125
Note: Stresses beyond those given Absolute Maximum Rating table cause operational errors damage device. normal operational conditions AC/DC Electrical Characteristics.
6.2. Characteristics (VDD 2.7V 4.5V,
Characteristics Symbol
Operating Current Input High Voltage Input Voltage Input High Voltage Input Voltage Input High Current Input Current Output High Voltage (TTL) Output Voltage (TTL) Output High Voltage (CMOS) Output Voltage (CMOS) (COM) (SEG) Voltage
Driver Resistance Driver Resistance
Limit Typ. Min. Max. Unit Test Condition
External clock (Note)
VIH1 VIL1
0.7VDD -0.3
0.55
Pins:(E, R/W, DB7)
VIH2 VIL2
0.7VDD -0.2 -1.0 -5.0
0.2VDD
OSC1
Pins: (RS, R/W, DB7) 3.0V
VOH1 VOL1
0.75VDD
0.1mA
Pins:
0.2VDD
0.1mA
Pins:
VOH2 VOL2
0.8VDD
40µA,
Pins: CL1, CL2,
0.2VDD
40µA, Pins: CL1, CL2,
RCOM RSEG VLCD
±50µA, VLCD 4.0V ±50µA, VLCD 4.0V
Pins: COM1 COM16 Pins: SEG1 SEG40
VDD-V5, bias bias
Note: FOSC 250KHz, 3.0V, "L", R/W, open, outputs loads.
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6.3. Characteristics (VDD 2.7V 4.5V, 6.3.1. Internal clock operation
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Frequency
FOSC1
3.0V, 75K±2%
6.3.2. External clock operation
Characteristics
External Frequency Duty Cycle Rise/Fall Time
6.3.3. Write mode (Writing data from SPLC780D)
Characteristics Symbol
Cycle Time Pulse Width Rise/Fall Time
Address Setup Time Address Hold Time Data Setup Time Data Hold Time
6.3.4. Read mode (Reading data from SPLC780D MPU)
Characteristics Symbol
Cycle Time Pulse Width Rise/Fall Time Address Setup Time Address Hold Time
Symbol Limit Typ. Min. Max. Unit Test Condition
FOSC2
Limit Typ.
Min.
Max.
Unit
Test Condition
1000
tSP1
Pins: R/W, Pins: R/W,
tHD1 tSP2
Pins:
tHD2
Pins:
Limit Typ.
Min.
Max.
Unit
Test Condition
1000
tSP1
Pins: R/W, Pins: R/W,
tHD1 tHD2
Data Output Delay Time Data hold time
Pins:
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6.4. Characteristics (VDD 4.5V 5.5V,
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Operating Current Input High Voltage Input Voltage Input High Voltage Input Voltage Input High Current Input Current Output High Voltage (TTL) Output Voltage (TTL) Output High Voltage (CMOS) Output Voltage (CMOS) (COM) (SEG) Voltage
VIH1 VIL1 VIH2 VIL2
-0.3 VDD-1 -0.2 -2.0
0.55
External clock (Note) Pins:(E, R/W, DB7)
OSC1 OSC1
Driver Resistance Driver Resistance
Note: FOSC 250KHz, 5.0V, "L", R/W, open, outputs loads.
6.5. Characteristics (VDD 4.5V 5.5V, 6.5.1. Internal clock operation
Characteristics
Frequency
Pins: (RS, R/W, DB7) 5.0V
-100
VOH1 VOL1
0.1mA
Pins:
0.1mA
Pins:
VOH2 VOL2
0.9VDD
40µA,
Pins: CL1, CL2,
0.1VDD
40µA, Pins: CL1, CL2,
RCOM RSEG VLCD
±50µA, VLCD 4.0V ±50µA, VLCD 4.0V
Pins: COM1 COM16 Pins: SEG1 SEG40
VDD-V5, bias bias
Symbol
Limit Typ.
Min.
Max.
Unit
Test Condition
FOSC1
5.0V, 91K±2%
6.5.2. External clock operation
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
External Frequency Duty Cycle Rise/Fall Time
FOSC2
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6.5.3. Write mode (Writing Data from SPLC780D)
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Cycle Time Pulse Width Rise/Fall Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time
tSP1 tHD1 tSP2
Pins: R/W, Pins: R/W,
6.5.4. Read mode (Reading Data from SPLC780D MPU)
Characteristics Symbol Limit Typ.
Cycle Time Pulse Width Rise/Fall Time
Address Setup Time Address Hold Time
Data Output Delay Time Data hold time
6.5.5. Interface mode with Driver (SPLC100A1)
Characteristics Symbol
Clock pulse width high Clock pulse width Clock setup time Data setup time Data hold time delay time
Pins: Pins: tHD2
Min. Max. Unit Test Condition
tSP1
Pins: R/W, Pins: R/W,
tHD1
Pins:
tHD2
Limit Typ.
Min.
Max.
Unit
Test Condition
tPWH tPWL tCSP
Pins: CL1, Pins: CL1, Pins: CL1,
tDSP
Pins: Pins:
-1000
1000
Pins:
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6.5.6. Write mode timing diagram (Writing Data from SPLC780D)
tSP1
tHD1
6.5.7. Read mode timing diagram (Reading Data from SPLC780D MPU)
6.5.8. Interface mode with SPLC100A1 timing diagram
0.9VDD
tSP2
tHD1
tHD2
Valid Data
tSP1
tHD1
tHD1
tHD2
Valid Data
tPWH tCSP
0.9VDD
tPWH
0.9VDD 0.1VDD 0.1VDD
tCSP
0.9VDD 0.1VDD
tPWL
0.9VDD 0.1VDD
tDSP
0.1VDD
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APPLICATION CIRCUITS
7.1. R-Oscillator
oscillation resistor used only internal oscillator operation mode.
OSC1 75.0K±2% when 3.0V) 91K± when 5.0V) Since oscillation frequency varies depending OSC1 OSC2 capacitance, wiring length these pins should minimized.
7.2. Interface
7.2.1. Interface 8-bit (6805)
Fosc Rosc Kohms Rosc Kohms
OSC2
Fosc
3.0V
5.0V
COM1 COM16
PANEL
6805
SPLC780D
COMMONS
SEG1 SEG40
SEGMENTS
7.2.2. Interface 8-bit (Z80)
COM1 COM16
PANEL COMMONS
SPLC780D
IORQ
SEG1 SEG40
SEGMENTS
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7.3. SPLC780D Application Circuit
MATRIX PANEL
COM16 (COM8) COM1
SEG40 SEG1
Y1-Y40 SHL1 SHL2
SPLC100A1
SHL1 SHL2
SPLC100A1
SPLC100A1
SPLC780D
V1V2V3V4V5V6 V1V2V3V4V5V6 V1V2V3V4V5V6
Y1-Y40
Y1-Y40 SHL1 SHL2
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7.4. Applications
SPLC780D COM1 Panel COM8 SEG1 characters line
SEG40
Example dots characters line Bias Duty
SPLC780D COM1
COM11 SEG1
SEG40
Example dots characters line Bias Duty
SPLC780D COM1 COM8 COM9 COM16 SEG1
Panel
Panel
characters line
characters lines
SEG40 Example dots characters lines Bias Duty
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SPLC780D COM1 COM8 SEG1 SEG40 COM9 COM16
Example dots characters line Bias Duty
SPLC780D
SEG1 SEG20 COM1 COM8
Panel
characters lines
SEG21 SEG40 Example dots characters lines Bias Duty
Sunplus Technology Co., Ltd. Proprietary Confidential
AUG. 2003 Preliminary Version:
SPLC780D
CHARACTER GENERATOR
8.1. SPLC780D
Sunplus Technology Co., Ltd. Proprietary Confidential
AUG. 2003 Preliminary Version:
SPLC780D
PACKAGE/PAD LOCATIONS
9.1. Assignment Locations
Please contact Sunplus sales representatives more information.
Sunplus Technology Co., Ltd. Proprietary Confidential
AUG. 2003 Preliminary Version:
SPLC780D
9.2. Package Configuration
View
SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38
SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG09 SEG08 SEG07 SEG06 SEG05 SEG04 SEG03 SEG02 SEG01 OSC1
SPLC780DC
OSC2
SEG39 SEG40
COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1
Sunplus Technology Co., Ltd. Proprietary Confidential
AUG. 2003 Preliminary Version:
SPLC780D
9.3. Package Information
Outline Dimensions Unit: Millimeter
Symbol
SUNPLUS SPLC780D YYWW
Min.
Nom.
Max.
Unit
23.20
Millimeter Millimeter
20.00
17.20
Millimeter Millimeter Millimeter
14.00 0.80 0.35 2.72 0.15 1.60
0.30 0.25 2.50 0.11
0.45 3.40 2.90 0.23
Millimeter Millimeter Millimeter Millimeter Millimeter Millimeter
Sunplus Technology Co., Ltd. Proprietary Confidential
AUG. 2003 Preliminary Version:
SPLC780D
DISCLAIMER
information appearing this publication believed accurate. Integrated circuits sold Sunplus Technology covered warranty patent indemnification provisions stipulated terms sale only. SUNPLUS makes warranty, express, statutory implied description regarding information this publication FURTHER, SUNPLUS MAKES WARRANTY SUNPLUS reserves right halt production alter specifications regarding freedom described chip(s) from patent infringement. MERCHANTABILITY FITNESS PURPOSE. prices time without notice. publication current before placing orders.
Accordingly, reader cautioned verify that data sheets other information this Products described herein intended normal commercial applications.
Applications involving unusual environmental reliability requirements, e.g. military equipment medical life support equipment, specifically recommended without additional processing SUNPLUS such applications. Please note that application circuits illustrated this document reference purposes only.
Sunplus Technology Co., Ltd. Proprietary Confidential
AUG. 2003 Preliminary Version:
SPLC780D
REVISION HISTORY
Date Revision Description Page
AUG. 2003
Original
Sunplus Technology Co., Ltd. Proprietary Confidential
AUG. 2003 Preliminary Version:

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