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Linear Mode Operation Radiation Hardened MOSFETS Michael Thompson


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Application Note AN-1155
Linear Mode Operation Radiation Hardened MOSFETS
Michael Thompson
Page
INTRODUCTION Review Linear Mode Operation Problems.2 Evolution Device Gain Zero Temperature Crossover Point Proposed Solutions.5 Curves Based Test Results.6 Conclusion
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AN-1155
INTRODUCTION
NTERNATIONAL Rectifier would like present this document explain approach linear mode operation high reliability (hi-rel) MOSFETS. will review definition this mode operation associated problems. problems unique this mode operation have been widely discussed literature over decade, this document will cover areas interest particular products. These areas include -First, problems that particular designers MOSFET circuits that implement linear mode operation. -Second, description gain hi-rel MOSFETS representative zero temperature gate threshold crossovers. -Third, brief history proposed solutions various sources. -Fourth, proposed solution method involving curves safe operating area based test results.
REVIEW LINEAR MODE OPERATION PROBLEMS Definition Linear Mode linear mode MOSFET operation confused with linear region, where MOSFET drain current linear function drain voltage. Linear mode operation defined operation MOSFET where small changes results linear changes drain source current. non-saturated region MOSFET operation drain current defined
labeled various similar terms, refer same basic problem. MOSFET susceptible this failure mode, this been very well described [1]-[4]. summarize problem discussion this work, failure mode described qualitatively examining drain current (Id) versus gate source voltage (Vgs) graphs given MOSFET. Figure II-1 shows transfer curve IR1405, part from commercial MOSFET trench technology product line. graphs this type that discussed this paper, important note cross-over point where gain device equal regardless MOSFET temperature. This called gain zero temperature crossover point, which approximately 5.8V this example. values above this point, gain device less higher temperature. Cells MOSFET structure that hotter will channel less current than surrounding, cooler cells. local spot initially caused number non-idealities such small local solder voids under packaged parts small nonuniformities silicon structure. This example positive temperature coefficient Rds(on), which allows hotter cells reduce their drain current on-state conduction losses such that they cool off. Below this zero temperature crossover point, increase cell temperature results more drain current, which allows cell pull current from neighbors. Having more current conducted through cell makes temperature rise on-state losses, gain will then increase further, until device temperature maximum reached part fails spectacular manner spot.
[2(V
)VDS
where termed device transconductance parameter such that
saturation, drain current described equation
(VGS
Problem Operation MOSFET linear mode create what been called "thermal current focusing" [1], "electrothermal instability" [3], "thermal runaway", been
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AN-1155
Figure II-1: Transfer Curve IRF1405. This figure shows relationship between applied gate voltage resulting drain current through transconductance gain device. trouble with linear mode operation begins when designer operates region below zero temperature crossover (defined point where device's gain same temperatures). this case that approximately 5.8V from gate source.
example part failure linear mode shown Figure II-2 Figure II-3. This MOSFET from commercial product line date, have confirmed cases hi-rel MOSFET failure linear mode operation customers' production hardware). This part failed 4.2A.
Figure II-2: Thermal image failure IRF1405Z. picture shows hotspot that develops when problem linear mode operation manifests itself. temperature uniform severe gradient forms where gain local MOSFET cells have started draw current from neighboring cells.
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AN-1155
1000
25°C
150°C
Figure II-3: Visual Image IRF1405Z failure. This type visual pattern more attractive when observed surface moon, instead surface parts that trying land there.
Figure III-1: Transfer Curve IRHM9260 (Generation channel device). This figure shows relationship between applied gate voltage resulting drain current through transconductance gain device. trouble with linear mode operation begins when designer operates region below zero temperature crossover (defined point where device's gain same temperatures). this case that approximately 3.9V from gate source.
PSPICE models that available from that obtained browsing predict this failure they assume uniform temperature simulate MOSFET behavior. III. EVOLUTION DEVICE GAIN ZERO TEMPERATURE CROSSOVER POINT radiation hardened MOSFETs were optimized used switching applications, linear applications. switching power devices, desired improve device gain technology introduced. Older devices therefore have lower gains than devices. Unfortunately designers circuits that implemented linear mode, that means that this problem gets worse with newer parts (and could reason this been much widespread problem past). Figure III-1 through Figure III-4 show improvement gain various generations radiation hardened (rad hard) MOSFETs offered from figures also show zero temperature crossover point representative parts from each generation design. slope curves show gain increased each generation, crossover points give some idea range gate voltages which would concern linear mode operation.
1000
25°C 150°C
Figure III-2: Transfer Curve IRHMS597260 (R5, channel device). Note increased slope curve versus previous Generation device, showing greater potential instability with respect device gain, along with higher zero temperature crossover voltage.
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AN-1155
1000
commercial grade parts, hi-rel components best method curve derived from test data. Placing Knee Curves failure some types MOSFETs would lend conclusion that "knee" could artificially inserted into curve order prevent incorrect linear mode operation MOSFETs, perhaps even placing guard banded version line would sufficient. Figure IV-1 shows typical curve from seen would tempted modify boundaries with lines inserting knee curve. However, accuracy either these approaches would depend overall sample size and/or accuracy data point extreme Vds. mention that straight-line guard band would also large area unnecessarily, could create false perceptions application problems that exist. certain parts where parts fail even lower levels than shown Figure IV-1, curve would loss unacceptably large percentage area.
25°C 150°C
Figure III-3: Transfer Curve IRHNJ67130 (R6). Note significantly larger zero temperature crossover voltage compared previous generations. There increase gain well. However some this inherently larger gain channel over channel devices, higher mobility electrons compared holes.
1000
25°C 150°C
Figure IV-1: Generic MOSFET SOA. Observed failures parts plotted against standard curve. Possible guard-banded versions curve also shown.
Figure III-4: Transfer Curve IRHLNA77064 (R7). This logic-leveldriven device, gain shifts even higher this generation devices. Note that gain zero temperature crossover point order magnitude higher than Generation devices.
PROPOSED SOLUTIONS There have been number proposed solutions this problem. first been shown fairly ineffective [5], thermal instability method been
Spirito Curves device, thermal instability occur when electrically generated power exceeds thermally dissipated power [6]. Spirito used this basis their approach augmented safe operating area (SOA) curve. condition instability defined this approach
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AN-1155
where thermal impedance part from junction case. This approach, while useful certain MOSFET designs, universally applicable. does provide boundary, case IR's hi-rel radiation hardened MOSFETS device structure such that this good application. Spirito curves would, some cases, generate curves that conservative would remove much effective hi-rel applications. This would lead some customers incorrect conclusion that their circuit applications will create failure part. determined that test method best generating curves hard parts. following section will discuss Spirito Curves test-based curves with specific examples. Testing third method proposed predicting safe operating area given device, most basic perhaps most reliable one: test results. characterizing product family through actual testing, curves generated. been experience International Rectifier Hi-Rel division that most accurate characterize parts through individual testing instead applying representative curve across entire product family. CURVES BASED TEST RESULTS method creating curves hard MOSFETs based testing actual parts. device failure mechanism tied gain device, which variability across lots produced. Random samples MOSFET were chosen from particular part deign, then assembled into package with then tested. parts were tested applying specific increasing steps until either junction temperature reaches degrees Celsius instability detected. power dissipation device increased, measure temperature watch signs non-linear temperature increases. high drain biases, this would usually happen well short maximum rated temperatures parts. This data served basis curves. first parts tested, created curve plotted with existing curves Spirito Curve, sake comparison.
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Figure V-1: IRHM9260 Preliminary Curve. This shows P-channel device, with existing curves shorter pulse widths, Spirito curve, measured curve derived from test results. important note things this figure. First, device relatively unaffected Linear Mode operation, noted both Spirito Curve Measured Curve. Second, Spirito Curve this case removed from Measured Curve. Finally, updated curve approved available site.
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AN-1155
Figure V-2: IRHM597260 Preliminary Curve. This shows P-channel device, with existing curves shorter pulse widths, Spirito curve, measured curve derived from test results. This figure shows generation would seem more affected Spirito Curve. test data shows otherwise. updated curve approved available site.
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AN-1155
Figure V-3: IRHNJ 67130 Preliminary Curve. This shows N-channel device, with existing curves shorter pulse widths, Spirito curve, measured curve derived from test results. This figure shows generation would seem more affected Spirito Curve. Again test data shows otherwise. updated curve approved available site.
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AN-1155
Figure V-4: IRHLNA77064 Preliminary Curve. This shows N-channel device, with existing curves shorter pulse widths, Spirito curve, measured curve derived from test results. This figure shows generation would seem more affected Spirito Curve. Again test data shows otherwise. updated curve approved available site.
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AN-1155
CONCLUSION hi-rel MOSFETs, while designed switching applications, used other application proper curves followed. most applicable method creating curve test characterization packaged part. Spirito method, while does yield conservative curve SOA, does accurately enough reflect performance IR's hard MOSFETs. time this publication (August 2009), completed curves approximately hard MOSFETs., continues publish curves original industry alert found there, well latest compilation curves. ACKNOWLEDGMENT would like thank Milt Boden, Sandra Liu, Zafrani, Lala Dhaimade (all whom employed providing many answers questions uncovered this problem being investigated, particularly imparting some their considerable knowledge MOSFET technology. REFERENCES
J.P. Uyemura (1988). Fundamentals Integrated Circuits, 2324 Ronan, "MOSFET SOA: Thermal current focusing affects power MOSFET operation", PCIM August 1998, pp.51-55. Breglio, Frisina, Magri, Spirito, "Electro-thermal Instability voltage Power MOS: experimental characterization", IEEE ISPSD 1999, 233-236. Spirito, Breglio, d'Alessandro, "Modeling Onset Thermal Instability Voltage Power MOS: Experimental Validation", IEEE ISPSD 2005, 159-162 Kwan, Teasdale, Nguyen, Ambrus, McDonald, "Improved analysis trench MOSFETs using Spirito approach", Annual Automotive Electronics Reliability Workshop, Nashville, April 2004 Hower, Tsai, Merchant, Efland, Pendharkar, Steinhoff, Brodsky, "Avalanche-induced thermal instability LDMOS transistors", IEEE ISPSD Osaka 2001,
Michael Thompson (IEEE M'05-SM'07) became Member IEEE 2005, Senior Member (SM) 2007. Born Pittsburgh, 1972, author received Bachelor Science degree from University Pennsylvania Philadelphia, 1994, Master Science degree (with specialty power electronics controls) from State University York 1998. worked Lockheed Martin Northrop Grumman. design experience covers AC-DC, DC-AC, DC-DC power conversion power levels that range from milliwatts megawatts. familiar with construction characteristics energy storage devices complexities digital controls power systems. noise output ripple designs distributed power systems interest him. presently working International Rectifier Hi-Rel Field Application Engineer Eastern United States based office Maryland.
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AN-1155

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