Control endpoint fixed USBHS-DEV High Speed Device Controlle

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Control endpoint fixed USBHS-DEV High Speed Device Controlle

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Control endpoint fixed
USBHS-DEV
High Speed Device Controller Core
USBHS-DEV core implements complete high/full-speed (480/12 Mbps) peripheral controller that interfaces UTMI port transceiver side system's microprocessor other. user-configurable endpoints, includes power management remote wake-up functions. Options include protocol aware controller, support variety widely used interfaces, UTMI Interface (ULPI). Designed easy reuse ASIC FPGA implementations, microcode-free design strictly synchronous with positive-edge clocking, internal tri-states synchronous reset; therefore scan insertion straightforward.
Bytes size
Configurable
endpoints Configurable/programmable number size endpoints Configurable/programmable single, double, triple quad buffering Programmable type endpoints
UTMI Transceiver Macrocell
terface; Optional UTMI Interface (ULPI)
Choice different microproces-
interfaces: AMBA® PVCI Generic
Applications
USBHS-DEV utilized variety serial interface applications including: Embedded microcontroller systems Communication networking systems Digital Media controllers
Configurable 16-, 32-bit
microprocessor interface Easy integration with wide range microprocessors architectures Interrupt request signals application microprocessor Interrupt vector autovectored interrupts
Direct access endpoint
Software
complete software stack configurable most popular device class available. been designed portability variety embedded applications. includes intuitive Application Programming Interface (API) application development.
buffers configurable 16-, 32-bit Slave FIFO interface Ready external module
Synchronous interface
Block Diagram
FIFOs
Optional protocol-aware
controller with configurable number channels
Suspend resume power
management functions
Remote Wake-Up function Optional software stack Sophisticated self-checking
Testbench (Verilog versions Verilog 2001)
Customer products using this core have received USB-IF certification
September 2009
Customization
Options available upon request before delivery: Microprocessor Interface ULPI transceiver interface Protocol-aware controller
Deliverables
core available ASIC (synthesizable HDL) FPGA (netlist) forms, includes everything required successful implementation. Synplicity version includes: source code Sophisticated self-checking Testbench (Verilog versions Verilog 2001) including external FIFOs, buffers, models interfaces, vectors testing core, core Simulation script, vectors, expected results, comparison utility Synthesis script Comprehensive user documentation, including detailed specifications system integration guide Spirit IP-XACT model System Designer files
Support
Evaluation License, support installation clarification software functionality available email weeks after core downloaded. commercial version with full support also available; contact CAST Sales.
Verification
core been verified through extensive simulation rigorous code coverage measurements.
CAST, Inc. Stonewall Court Woodcliff Lake, 07677 201-391-8300 201-391-8694 Copyright CAST, Inc. 2009, Rights Reserved. Contents subject change without notice. Trademarks property their respective owners.

Control endpoint fixed USBHS-DEV High Speed Device Controlle

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