Order Number: 298645-001 January 2002 Intel® XeonProcessor with C

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Order Number: 298645-001 January 2002 Intel® XeonProcessor with C

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Intel® XeonProcessor with Cache System Compatibility Guidelines
Order Number: 298645-001 January 2002
Intel® XeonProcessor with Cache System Compatibility Guidelines
Information this document provided connection with Intel products. license, express implied, estoppel otherwise, intellectual property rights granted this document. Except provided Intel's Terms Conditions Sale such products, Intel assumes liability whatsoever, Intel disclaims express implied warranty, relating sale and/or Intel products including liability warranties relating fitness particular purpose, merchantability, infringement patent, copyright other intellectual property right. Intel products intended medical, life saving, life sustaining applications. Intel make changes specifications product descriptions time, without notice. Designers must rely absence characteristics features instructions marked "reserved" "undefined." Intel reserves these future definition shall have responsibility whatsoever conflicts incompatibilities arising from future changes them. This document contains information products design phase development. finalize design with this information. Revised information will published when product available. Verify with your local sales office that have latest datasheet before finalizing design. Intel® Xeonprocessor contain design defects errors known errata which cause product deviate from published specifications. Current characterized errata available request. Contact your local Intel sales office your distributor obtain latest specifications before placing your product order. Copies documents which have order number referenced this document, other Intel literature, obtained calling 1-800-548-4725, visiting Intel's website http://www.intel.com. Intel, Intel logo, Pentium, Intel NetBurst, Intel Xeon trademarks registered trademarks Intel Corporation subsidiaries United States other countries.
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Intel® XeonProcessor with Cache System Compatibility Guidelines
Table Contents
Revision History Introduction Audience. References Compatibility SM_VCC 603-Pin Socket Definition Changes Power Sequencing Power Signal Levels Core Frequency System Ratio Determination
Intel® XeonProcessor with Cache System Compatibility Guidelines
Revision History
Revision -001 Date January 2002 Changes Initial Release
Intel® XeonProcessor with Cache System Compatibility Guidelines
Introduction
This document describes required changes Intel® Xeonprocessor-based platforms order provide Intel® Xeonprocessor with cache compatibility. information this document should used conjunction with specifications presented latest version Intel® XeonProcessor with Cache 1.80 GHz, GHz, 2.20 Datasheet Intel® XeonProcessor 1.40 GHz, 1.50 GHz, 1.70 Datasheet, well information provided other processor related design guides listed References section below. Design decisions should always based information contained latest applicable processor datasheet. proper reliable processor operation, designer must ensure that requirements this guideline fully satisfied.
Audience
This document targeted following audience:
Intel Xeon processor-based system developers want ensure system
compatibility with Intel Xeon processor with cache.
References
Material concepts available following documents beneficial when reading this document:
Intel® XeonProcessor with Cache 1.80 GHz, GHz, 2.20
Datasheet
Intel® XeonProcessor 1.40 GHz, 1.50 GHz, 1.70 Datasheet Intel® XeonProcessor Intel® Chipset Platform Design Guidelines DC-DC Converter Design Guidelines DC-DC Converter Design Guidelines Dual Intel® XeonProcessor Voltage Regulator Down (VRD) Design Guidelines Intel® XeonProcessor Thermal Design Guidelines ATX/ATX12V Power Supply Design Guide (available http://www.formfactors.org) Power Supply: Server System Infrastructure (SSI) Specification Midrange Chassis Power Supplies (available http://www.ssiforum.org)
Intel® XeonProcessor with Cache System Compatibility Guidelines
Compatibility
Implementing changes outlined this document will help assure that Intel® Xeonprocessor-based system design will compatible with Intel Xeon processor with cache. Compatibility likely ultimately limited ability system supply required current adequately cool processor.
SM_VCC
SM_VCC must connected system volt power supply since Intel® Xeonprocessor with cache drives voltage identification (VID) outputs using core circuitry powered SM_VCC supply. Refer Section further considerations involving power sequencing requirements SM_VCC
603-Pin Socket Definition Changes
Intel® Xeonprocessor with cache mechanically electrically compatible with same 603-pin socket used Intel Xeon processor. However, order support increased frequencies offered Intel Xeon processor with cache, "Reserved" "N.C." pins from original Intel Xeon processor definition have been designated either VSS. Intel Xeon processor-based platforms need redefine 603-pin socket listed "New Name" column Table allow compatibility with Intel Xeon processor with cache.
Table
603-Pin Socket Pin-Map Change
Name RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD Name Comment Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground
Intel® XeonProcessor with Cache System Compatibility Guidelines
Table
603-Pin Socket Pin-Map Change
Name RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD Name Comment Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power
Intel® XeonProcessor with Cache System Compatibility Guidelines
Table
AA30 AA31 AB30 AB31 AC30 AC31 AD30 AD31
603-Pin Socket Pin-Map Change
Name RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD Name Comment Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Power Processor Ground Processor Ground Processor Power Processor Power Processor Ground
Power Sequencing
outlined Section 4.0, volt power supply must connected Intel® Xeonprocessor with cache SM_VCC pins (AE28 AE29). SM_VCC supply voltage used SMBus functions output signal circuits. signals programmed Intel during manufacturing process that output voltage will correctly. indicated Figure outputs will valid within milliseconds after time which volt supply reaches nominal value. power supply that adheres ATX12V power supply design guidelines, PWR_OK will generated less than milliseconds after outputs reach their respective values (please refer document ATX/ATX12V Power Supply Design Guide). Similarly, power supply that adheres Server System Infrastructure (SSI) power supply specification, PWR_OK will generated less than milliseconds after outputs within their respective regulation limits (please refer document Power Supply: Server System Infrastructure (SSI) Specification Midrange Chassis Power Supplies). PWR_OK used enable output (VCC) using OUTEN signal. PWRGD output, conjunction with rest system's powergood logic, used generate
Intel® XeonProcessor with Cache System Compatibility Guidelines
PWRGOOD input processor. PWR_OK will deasserted when output ATX12V-compliant SSI-compliant power supply falls below regulation limits. important maintain SM_VCC time output enabled. Driving VRM's OUTEN with PWR_OK signal will ensure correct sequencing both power power down. Figure Voltage Sequence Timing Requirements
volt level VDC/SM_VCC PWR_OK OUTEN VID_OUT PWRGD Processor PWRGOOD Processor RESET
Power
valid voltages 10mS
<10ms PWRGD VID[4:0]
OUTEN
System PWRGD Logic
PWRGOOD
Processor
SM_VCC PWR_OK
Power Supply
SM_VCC regulation VDC/SM_VCC
Power Down
PWROK Power Down Warning
OUTEN
Intel® XeonProcessor with Cache System Compatibility Guidelines
Power Signal Levels
Intel® Xeonprocessor with cache 1.500 volts compared level 1.700 volts Intel Xeon processor. Intel Xeon processor with cache still uses single core voltage supply (VCC) supply termination voltage (VTT). Table outlines changes AGTL+ signal level specifications defined Intel Xeon processor with cache. Intel Xeon processor with cache defines specifications based percentage GTLREF level instead fixed voltage offset level. Table value GTLREF 2/3*VCC both processors. important simulate system ensure that these levels met. Other electrical characteristics expected compatible with Intel® Xeonprocessor specifications. Refer processor datasheets given Section complete details regarding processor specifications referenced this section. Table
Symbol
AGTL+ Signal Changes
Intel® XeonProcessor GTLREF 0.100 GTLREF 0.100 Intel® XeonProcessor with Cache 0.90*GTLREF 1.10*GTLREF
NOTE: These values reference only. latest processor datasheet contains actual specifications processor. specifications this table conflict with specifications found datasheet, datasheet supersedes.
Voltage regulator designs Intel® Xeonprocessor-based platforms were initially based Intel's DC-DC Converter Design Guidelines. However, provide additional high current capability platforms, Intel created updated voltage regulator design guide entitled DC-DC Converter Design Guidelines. Intel Xeon processor platforms intending support Intel Xeon processor with cache required upgrade continue voltage regulator solutions. However, platforms should consider implementing since provides most recent voltage regulator design guidelines Intel Xeon processor with cache.
Core Frequency System Ratio Determination
core frequency system ratio Intel® Xeonprocessor configured driving ratio select signals (LINT[1]/NMI, A20M#, IGNNE#, LINT[0]/INTR) with appropriate ratio encoding values during processor power-on reset. Intel Xeon processor with cache implements method setting core frequency system ratio will ignore ratio select signals power-on reset. Intel
Intel® XeonProcessor with Cache System Compatibility Guidelines
Xeon processor with cache operates tested frequency initial power-on. processor needs lower core frequency, must done when higher speed processor added system that contains lower frequency processor, system BIOS able effect change core system ratio.

Order Number: 298645-001 January 2002 Intel® XeonProcessor with C

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