Programmable Huffman Tables JPEG-E Baseline JPEG Encoder Cor

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Programmable Huffman Tables JPEG-E Baseline JPEG Encoder Cor

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Baseline ISO/IEC 10918-1 JPEG Compliance
Programmable Huffman Tables
JPEG-E
Baseline JPEG Encoder Core
Implements high-performance image encoder that complies with baseline ISO/IEC 10918-1 JPEG standard. fastest available JPEG cores, JPEG-E provides high-performance solution variety image video compression applications. can, example, encode over frames/sec HDTV, 1440x1152, 4:2:0, even FPGA devices. typical 0.18µ process ASIC, core requires just gates operates MHz. addition processing baseline JPEG streams, core compress non-standard motion JPEG streams. also enhanced with optional add-on bit-rate control block, which benefit applications that have tight bandwidth constraints. core includes FIFO-like pixel stream input/output interfaces. Other standard interfaces (e.g. AMBA) available. core designed reliability ease integration, been proven number ASIC FPGA designs. deliverables include software bit-accurate model that facilitates system chip verification.
(two
Programmable quantization
tables (four)
four color components
(optionally extendable components)
Supports possible scan confi-
gurations JPEG formats input/output data
Supports image size
Supports restart mark-
Additional Image Processing Capabilities
Motion JPEG encoding/decoding Rate Control (optional)
Designed Easy Integration
Single clock input sample
encoding
Fully programmable through
standard JPEG stream marker segments
Automatic headers generation Automatic program-once
Applications
high-performance JPEG-E core suitable implementing variety multimedia applications, including: Digital cameras camcorders Office automation equipment (multifunction printers, scanners, digital copiers etc) Medical imaging systems Video production suites Video conference display-projection systems Surveillance systems
code-many operation
Designed High Quality
Robust verification environment
includes bit-accurate software model
ASIC FPGA proven mul-
tiple designs
Scan-ready design architecture
Block Diagram
Control Unit JPEG Stream Image Data
Stream Syntaxer
FIFO
Huffman Encoder
DIFF
Zig-Zag Scan Quant.
Register File Configuration Memory Parser Huffman Tables Tables Buffer
JPEG-E
March 2009
Functional Description
JPEG-E configured feeding with JPEG headers, which contain table specification, image format, encoding options data. core's configuration modified after encoding multiple frames. Image samples color space format input JPEG-E block block, raster scan order. Consuming single clock cycle image sample, JPEG-E address most demanding frame-based video compression applications. JPEG-E outputs complete JPEG-compliant data stream, including JPEG headers, size which dynamically controlled optional rate-control block used.
Deliverables
core available ASIC (synthesizable HDL) FPGA (netlist) forms, includes everything required successful implementation. Actel version includes: Post-synthesis EDIF netlist Sophisticated self-checking Testbench (Verilog versions Verilog 2001) Simulation script, vectors, expected results, comparison utility Software (C++) Bit-Accurate Model Place route script Comprehensive user documentation, including detailed specifications system integration guide
Implementation Results
JPEG-E reference designs have been evaluated variety technologies. following sample Actel results optimized speed.
Actel Device Axcelerator AX1000-2 Axcelerator RTAX1000S-1 Proasic Plus APA1000-STD Proasic3 A3P1000-2 Cells 11,943 11,947 22,457 17,214 3,805 3,801 3,783 3,677 Comb 8,183 8,146 18,674 13,537 Frequency Special Features
Related Cores
SVE-JPEG-E SpeedView Enabled JPEG Encoder that produces SpeedView enabled JPEG data streams.
Support
core delivered warranted against defects ninety days from purchase. Thirty days phone email technical support included, starting with first interaction. Additional maintenance support options available.
Verification
core been verified through extensive simulation rigorous code coverage measurements. also been embedded several products, proven both ASIC FPGA technologies.
CAST, Inc. Stonewall Court Woodcliff Lake, 07677 201-391-8300 201-391-8694 Copyright CAST, Inc. 2009, Rights Reserved. Contents subject change without notice. Trademarks property their respective owners.
This core developed multimedia experts Alma Technologies S.A.

Programmable Huffman Tables JPEG-E Baseline JPEG Encoder Cor

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