Output 0.5A Less High-efficiency Step-down Switching Regulator with Bu

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Output 0.5A Less High-efficiency Step-down Switching Regulator with Bu

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Single-chip Type with Built-in Switching Regulator Series
Output 0.5A Less High-efficiency Step-down Switching Regulator with Built-in Power MOSFET
BD9180GUL
No.09027EAT28
Description BD9180GUL step-down Switching regulator designed produce voltage from 1-cell Li-Ion batteries. BD9180GUL suitable power application,and internally 2MHz switching frequency allows small inductors capacitors achieve small application.Offers high efficiency with original pulse skip control technology synchronous rectifier. Employs current mode control system provide faster transient response sudden change load. Features Offers fast transient response with current mode control system. Offers highly efficiency load range with synchronous rectifier (Nch/Pch FET) SLLM (Simple Light Load Mode) Input voltage range 2.3V 5.5V Output current max. 300mA 2MHz Fixed frequency Operation Incorporates soft-start function Incorporates thermal protection, ULVO short-current protection circuit with time delay function. Incorporates shutdown function. Employs WL-CSP small Mobile Phone, Smart-phone, PDAS Digital Still Cameras Portable Media Players Wireless-LAN Absolute Maximum Rating(Ta=25) Parameter Supply Voltage Voltage Voltage Output Current Power Dissipation Operating Temperature Range Storage Temperature Range Maximum Junction Temperature
Symbol Topr Tstg Tjmax
Limit -0.3+7 -0.3+7 -0.3+7 -30+85 -55+150 +150
Unit
ASO, Tjmax=150 should exceeded. Derating 4.08 temperatures above Ta=25(when mounted glass epoxy which layers).
Operating Conditions(Ta=-30+85) Parameter Supply Voltage Voltage Average Output Current
Symbol
Min.
Typ.
Max. 300*3,4
Unit
case output current 300mA, VccMin.=2.7V. should exceeded. This product designed protection against radioactive rays. *Status this document Japanese version this document formal specification. This translated version exclusively intended reference, only used auxiliary reading formal version. there differences between Japanese translated versions this document, formal version takes priority.
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2009.05 Rev.A
BD9180GUL
Electrical Characteristics (Unless otherwise specified, Ta=25, =3.3V, EN=VCC) Parameter Standby Current Bias Current Voltage High Voltage Input Current Oscillation Frequency Resistance Resistance Output Voltage UVLO Threshold Voltage UVLO Release Voltage Soft Start Time Timer Latch Time Output Short circuit Threshold Voltage Symbol ISTB VENL VENH FOSC RONP RONN VOUT VUVLO1 VUVLO2 TLATCH VSCP Limit Min. 0.95 1.846 2.02 0.25 Typ. 1.875 2.15 0.93 Max. 1.903 1.31 Unit EN=0V
Technical Note
Condition
Standby Mode Active Mode VEN=2V Vcc=3.3V Vcc=3.3V ±1.5% Vcc=3.30V Vcc=03.3V SCP/TSD Operational Mode VOUT=1.8750V
Block Diagram
VOUT
Current Comp
Current
Sense/ Protect Driver
Slope
Soft Start
Logic
VREF
SCP/
UVLO
Fig.1 Block Diagram
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2009.05 Rev.A
BD9180GUL
Distribution
Technical Note
Lot.
N.C.A1
VOUT
View VCSP50L1 Fig.2 Distribution
VCSP50L1 Fig.3 Physical Dimension
name
name N.C. VOUT N.C. Enable pin(Active High)
function
power supply input /Pch source Output voltage Pch/Nch drain output Ground pin/ source
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3/14
2009.05 Rev.A
BD9180GUL
Characteristics data(Reference data)
Technical Note
Ta=25 Io=0mA
VOUT=1.875V
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
VCC=3.3V Ta=25 Io=0mA
VOUT=1.875V
VOUT=1.875V
VCC=3.3V Ta=25
INPUT VOLTAGE:VCC[V]
VOLTAGE:VEN[V]
OUTPUT CURRENT:IOUT
Fig.4 Vcc-VOUT
1.94 1.92
OUTPUT VOLTAGE:VOUT2[V]
Fig.5 EN-VOUT
Fig.6 IOUT-VOUT
FREQUENCY:FOSC[MHz]
VCC=3.3V
VCC=3.3V, VOUT=1.875V, Io=0mA
EFFICIENCY:[%]
1.90 1.88 1.86 1.84 1.82 TEMPERATURE:Ta[]
VOUT=1.875V
VCC=3.6V Ta=25
OUTPUT CURRENT:IOUT[mA] 1000
TEMPERATURE:Ta[]
Fig.7 Ta-VOUT
0.70
Fig.8 Efficiency
Fig.9 Ta-Fosc
Ta=25
VCC=3.3V
0.60
VCC=3.3V
VOLTAGE:VEN[V]
FREQUENCY:FOSC[MHz]
RESISTANCE:R
PMOS
0.50 0.40 0.30 0.20 0.10
NMOS
INPUT VOLTAGE:VCC[V]
0.00
TEMPERATURE:Ta
TEMPERATURE:Ta[]
Fig.10 Vcc-Fosc
Fig.11 Ta-NMOS-PMOS
Fig.12 Ta-VEN
VCC=3.3V
CIRCUIT CURRENT:ICC[A]
OUTPUT CURRENT [mA]
TEMPERATURE:Ta[]
SLLM
Ta=25
INPUT VOLTAGE:VCC
Fig.13 Ta-Icc
Fig.14 Input Voltage Output Current mode change point
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4/14
2009.05 Rev.A
BD9180GUL
Characteristics data(Reference data) Continued
Technical Note
VCC=3.3V, Ta=25
VOUT
VCC=3.3V Ta=25
VOUT
VCC=3.3V Ta=25
VOUT
Fig.15 Soft start waveform (Io=0mA)
Fig.16 Soft start waveform (Io=300mA)
Fig.17 start waveform (Io=0mA)
VCC=3.3V, VOUT=1.875V, Ta=25
VCC=3.3V, VOUT=1.875V, Ta=25
VOUT VOUT
VOUT
VCC=3.3V Ta=25 VCC=3.3V, Ta=25 IOUT IOUT
Fig.18 start waveform (Io=300mA)
Fig.19 Transient Response Io=150mA/s
Fig.20 Transient Response Io=501mA/s
VCC=3.3V, VOUT=1.875V, Ta=25
VCC=3.3V, VOUT=1.875V, Ta=25
VOUT
VOUT
IOUT
IOUT
Fig.21 Transient Response Io=50200mA/s
Fig.22 Transient Response Io=20050mA/s
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5/14
2009.05 Rev.A
BD9180GUL
Information advantages Advantage 1Offers fast transient response with current mode control system. BD9180GUL(transient response IO=1mA50mA/s)
VCC=3.3V, VOUT1=1.2V, Ta=25 VCC=3.3V, VOUT1=1.2V, Ta=25
Technical Note
VOUT1
VOUT1
IOUT1
IOUT1
Io=150mA
Io=501mA
Fig.23 Comparison transient response Advantage Offers high efficiency load range. lighter load: Utilizes current mode control mode called SLLM lighter load, which reduces various dissipation such switching dissipation (PSW), gate charge/discharge dissipation, dissipation output capacitor (PESR) on-resistance dissipation (PRON) that otherwise cause degradation efficiency lighter load.
Achieves efficiency improvement lighter load. heavier load: Utilizes synchronous rectifying mode on-resistance FETs incorporated power transistor. resistance P-channel 0.6(Typ.) resistance N-channel 0.5(Typ.)
Efficiency
SLLM
inprovement SLLM
system
improvement synchronous rectifier
Achieves efficiency improvement heavier load. Offers high efficiency load range with improvements mentioned above.
0.001
0.01 Output current Io[A]
Fig.24 Efficiency
Advantage 3Supplied smaller package small-sized power incorporated. Output capacitor required current mode control: ceramic capacitor. Inductance required operating frequency MHz: 2.2H inductor. Reduces mounting area required.
4.0mm
DC/DC Convertor Controller
VOUT
2.7mm
Fig.25 Example application
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2009.05 Rev.A
BD9180GUL
Technical Note
Operation BD9180GUL synchronous rectifying dual step-down switching regulator that achieves faster transient response employing current mode control system. utilizes switching operation (Pulse Width Modulation) mode heavier load, while utilizes SLLM (Simple Light Load Mode) operation lighter load improve efficiency. Synchronous rectifier does require power dissipated rectifier externally connected conventional DC/DC converter junction shoot-through protection circuit limits shoot-through current during operation, which power dissipation reduced. Current mode control Synthesizes control signal with inductor current feedback loop added voltage feedback. (Pulse Width Modulation) control oscillation frequency MHz. signal form turns P-channel (while N-channel turned OFF), inductor current increases. current comparator (Current Comp) receives signals, current feedback control signal (SENSE: Voltage converted from voltage feedback control signal (FB), issues RESET signal both input signals identical each other, turns P-channel (while N-channel turned rest fixed period. control repeat this operation.
SLLM (Simple Light Load Mode) control When control mode shifted from heavier load lighter load vise versa, switching pulse designed turn with device held operated normal control loop, which allows linear operation without voltage drop deterioration transient response during mode switching from light load heavy load vise versa. Although control loop continues operate with signal from RESET signal from Current Comp, designed that RESET signal held issued shifted light load mode, with which switching tuned switching pulses thinned under control. Activating switching intermittently reduces switching dissipation improves efficiency.
SENSE Current Comp RESET Level Shift Amp. Driver Logic Load VOUT
VOUT
Fig.26 Diagram current mode control
PVCC SENSE IL(AVE) PVCC SENSE
Current Comp
Current Comp
RESET
RESET
VOUT switching
VOUT(AVE) VOUT
VOUT(AVE)
Fig.27 switching timing chart
Fig.28 SLLMswitching timing chart
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2009.05 Rev.A
BD9180GUL
Technical Note
Description operations Shutdown function device separate esch converter start each converter independently. Low(<0.3V), circuits device Stand mode.(ISTB=0uA typ). High(>0.95V), thus Active mode. Soft-start function terminal shifted "High" activates soft-starter gradually establish output voltage with current limited during startup, which possible prevent overshoot output voltage inrush current.
UVLO function Detects whether input voltage sufficient secure output voltage this supplied. hysteresis width (Typ.) provided prevent output chattering.
Hysteresis 50mV
VOUT1
(1.875V)
Soft start Standby mode Operating mode
Standby mode
Standby mode Operating mode
Operating mode
UVLO
UVLO
UVLO
Fig.29 Soft start, Shutdown, UVLO timing chart Short-current protection circuit with time delay function Turns output protect from breakdown when incorporated current limiter other converter activated continuously fixed time(TLATCH) more. output thus held tuned recovered restarting re-unlocking UVLO.
EN1EN2 Output Short circuit Threshold Voltage VOUT1 Output Latch VOUT2
Limit
Standby mode
t1<TLATCH Operating mode
t2=TLATCH
Standby mode
Operating mode
Timer latch
Fig.30 Short-current protection circuit with time delay timing chart
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8/14
2009.05 Rev.A
BD9180GUL
Switching regulator efficiency Efficiency expressed equation shown below: POUT POUT POUT+PD
Technical Note
Efficiency improved reducing switching regulator power dissipation factors follows: Dissipation factors: resistance dissipation inductor FETPD(I Gate charge/discharge dissipationPD(Gate) Switching dissipationPD(SW) dissipation capacitorPD(ESR) Operating current dissipation ICPD(IC)
1)PD(I R)=IOUT (RCOIL[]DC resistance inductor, RON[]ON resistance FET, IOUT[A]Output current.) (Cgs[F]Gate capacitance FET,f[H]Switching frequency,V[V]Gate driving voltage FET) 3)PD(SW)= (CRSS[F]Reverse transfer capacitance FET,IDRIVE[A]Peak current gate.) IDRIVE 4)PD(ESR)=IRMS (IRMS[A]Ripple current capacitor,ESR[]Equivalent series resistance.) (ICC[A]Circuit current.)
Consideration permissible dissipation heat generation this functions with high efficiency without significant heat generation most applications, special consideration needed permissible dissipation heat generation. case extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, permissible dissipation and/or heat generation must carefully considered. dissipation, only conduction losses resistance inductor resistance considered. Because conduction losses considered play leading role among other dissipation mentioned above including gate charge/discharge dissipation switching dissipation.
ROHM standard layer board Board j-a=245.0/W
Power dissipation:Pd
duty (=VOUT/VCC) RCOILDC resistance coil RONPON resistance P-channel RONNON resistance N-channel IOUTOutput current
0.51W
Ambient temperature:Ta
Fig.31 Thermal derating curve (VCSP50L1) VCC=3.3V, VOUT=1.875V, RONP=0.6, RONN=0.5 IOUT=0.3A, example, D=VOUT/VCC=1.875/3.3=0.57 =0.342+0.215 =0.557[] P=0.3 RONP greater than RONN this dissipation increases duty becomes greater. With consideration dissipation above, thermal design must carried with sufficient margin allowed.
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9/14
2009.05 Rev.A
BD9180GUL
Selection components externally connected Selection inductor
Technical Note
inductance significantly depends output ripple current. seen equation (1), ripple current decreases inductor and/or switching frequency increases. [A](1)
VOUT
Appropriate ripple current output should more less maximum output current. [A](2) [H](3)
Fig.32 Output ripple current
(IL: Output ripple current, Switching frequency) VCC=3.3V, VOUT=1.875V, f=2MHz, IOUTmax=0.3A 4.5[uH]
1to4.7uH inductor recommended steady operation achieve small application. Current exceeding current rating inductor results magnetic saturation inductor, which decreases efficiency. inductor must selected allowing sufficient margin with which peak current exceed current rating. Select inductor resistance component (such ACR) minimize dissipation inductor better efficiency. Selection output capacitor (CO)
Output capacitor should selected with consideration stability region equivalent series resistance required smooth ripple voltage.
VOUT
Output ripple voltage determined equation [V](4) (IL: Output ripple current, ESR: Equivalent series resistance output capacitor) *Rating capacitor should determined allowing sufficient margin against output voltage. Less allows reduction output ripple voltage.
Fig.33 Output capacitor
output rise time must designed fall within soft-start time, capacitance output capacitor should determined with consideration requirements equation (5): VOUT VOUT=1.8V, IOUT=0.3A, TSS=0.2ms, 1.875 33.3 ceramic capacitor recommended. Tss: Soft-start time Ilimit: Over current detection level, 0.6A(Typ)
Inappropriate capacitance cause problem startup.
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10/14
2009.05 Rev.A
BD9180GUL
Selection input capacitor (Cin)
Technical Note
Input capacitor select must capacitor capacitance sufficient cope with high ripple current prevent high transient voltage. ripple current IRMS given equation (5):
VOUT
OUT(VCC-VOUT)
[A](5) IOUT
Worst case IRMS(max.) VCC=3.3V, VOUT=1.V, IOUTmax.=0.3A 1.875(3.3-1.875) =0.15[ARMS] When twice VOUT, IRMS=
Fig.34 Input capacitor
4.7F/10V ceramic capacitor recommended reduce dissipation input capacitor better efficiency.
VOUT
VOUT
Fig.35 Typical application Cautions Board layout
VOUT
VOUT
Fig.36 Layout diagram sections drawn with heavy line, thick conductor pattern short possible. input ceramic capacitor closer pins GND, output capacitor Co1,Co2 closer GND.
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11/14
2009.05 Rev.A
BD9180GUL
Recommended components Lists above application Symbol Part Coil Ceramic capacitor Ceramic capacitor Value 2.2uH 10uF 10uF Manufacturer muRata muRata Kyocera muRata Kyocera
Technical Note
Series LQM21PN2R2MC0 GRM21BB30J106K CM21B106M06A GRM21BB30J106K CM21B106M06A
parts list presented above example recommended parts. Although parts sound, actual circuit characteristics should checked your application carefully before use. sure allow sufficient margins accommodate variations between external devices this when employing depicted circuit with other circuit constants modified. Both static transient characteristics should considered establishing these margins. When switching noise substantial impact system, schottky barrier diode established between pins. equivalent circuit
VOUT
Fig.37 equivalent circuit
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12/14
2009.05 Rev.A
BD9180GUL
Technical Note
Cautions Absolute Maximum Ratings While utmost care taken quality control this product, application that exceed some absolute maximum ratings including voltage applied operating temperature range result breakage. broken, short-mode open-mode identified. expected encounter with special mode that exceed absolute maximum ratings, requested take necessary safety measures physically including insertion fuses. Electrical potential must designed have lowest electrical potential operating conditions. Short-circuiting between terminals, mismounting When mounting board, care must taken avoid mistake orientation alignment. Failure result breakdown. Short-circuiting foreign matters entered between output terminals, between output power supply also cause breakdown. 4.Operation Strong electromagnetic field noted that using strong electromagnetic radiation cause operation failures. Thermal shutdown protection circuit Thermal shutdown protection circuit circuit designed isolate from thermal runaway, intended protect guarantee thermal shutdown protection circuit which once activated should used thereafter operation originally intended. Inspection with board capacitor must connected lower impedance during inspection with board, capacitor must discharged after each process avoid stress electrostatic protection, provide proper grounding assembling processes with special care taken handling storage. When connecting jigs inspection process, sure turn power supply before connected removed. Input terminals This monolithic with isolation between P-substrate each element illustrated below. This P-layer N-layer each element form junction, various parasitic element formed. resistor joined transistor terminal shown junction works parasitic diode following relationship satisfied; GND>Terminal resistor side), GND>Terminal transistor side); GND>Terminal transistor side), parasitic transistor activated N-layer other element adjacent above-mentioned parasitic diode. structure inevitably forms parasitic elements, activation which cause interference among circuits, and/or malfunctions contributing breakdown. therefore requested take care device such manner that voltage lower than P-substrate) applied input terminal, which result activation parasitic elements.
Resistor
Transistor (NPN)
Parasitic element
substrate Parasitic element
substrate Parasitic element
Parasitic element
Other adjacent elements
Fig.38 Simplified structure monorisic Ground wiring pattern small-signal large-current provided, will recommended separate large-current pattern from small-signal pattern establish single ground reference point that resistance wiring pattern voltage fluctuations large current will cause fluctuations voltages small-signal GND. attention cause fluctuations wiring pattern external parts well.
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13/14
2009.05 Rev.A
BD9180GUL
Ordering part number
Technical Note
Part
Part
Package VCSP50L1
Packaging forming specification Embossed tape reel (VCSP50L1)
VCSP50L1
<Dimension>
1PIN MARK 1.6±0.05
<Tape Reel information>
Tape View
Embossed carrier tape
3000pcs
(The direction 1pin product upper left when hold reel left hand pull tape right hand)
Quantity Direction feed
1.1±0.05
0.1±0.05
0.55MAX
0.08
Side View
0.3±0.05
0.25±0.05 0.05
1234
1234
1234
1234
1234
1234
0.15)INDEX POST
Bottom View
(Unit:mm)
Reel
1Pin
Direction feed
0.3±0.05
When order please order times amount package quantity.
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14/14
2009.05 Rev.A
Notice
Notes
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Output 0.5A Less High-efficiency Step-down Switching Regulator with Bu

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