Output 1.5A Less High Efficiency Step-down Switching Regulator with Bu

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Output 1.5A Less High Efficiency Step-down Switching Regulator with Bu

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Single-chip Type with Built-in Switching Regulator Series
Output 1.5A Less High Efficiency Step-down Switching Regulator with Built-in Power MOSFET
BD9153MUV
No.09027EAT40
Description ROHM's high efficiency dual step-down switching regulators Linear Regulator Controller, BD9153MUV power supply designed produce voltage including 3.3,0.8 volts from 5.5/4.5 volts power supply line. Offers high efficiency with original pulse skip control technology synchronous rectifier. Employs current mode control system provide faster transient response sudden change load. Features Offers fast transient response with current mode control system. Offers highly efficiency load range with synchronous rectifier (Pch/Nch FET) SLLM(Simple Light Load Mode) Incorporates controller Linear Regulator. Incorporates reset function with 50ms counter. Incorporates soft-start fanction, thermal protection ULVO functions. Incorporates short-current protection circuit with time delay function. Incorporates shutdown function Icc=0µA(Typ.) Employs small surface mount package VQFN024V4040 Applications Power supply including DSP, Micro computer ASIC Absolute Maximum Rating (Ta=25) Parameter Symbol Vcc,PVcc Voltage VCC,PVCC FB1,FB2,FB3,VS Voltage VFB1, VFB2, VFB3, SW1,SW2,ITH1,ITH2 Voltage VSW1, VSW2, VITH1, ITH2 EN,RST,DET,GATE Voltage RST, DET, GATE Power Dissipation Operating Temperature Range Topr Storage Temperature Range Tstg Maximum Junction Temperature Tjmax
Limit -0.3+7*1 -0.3+7 -0.3+7 -0.3+7 0.34* 0.69 2.20 3.56*5 -40+85 -55+150 +150
Unit
should exceeded.
only
1-layer. mounted glass-epoxy board, occupied area copper foil 10.29mm2 4-layer. mounted glass-epoxy board, occupied area copper foil 10.29mm2 layer, 5505mm2 layer 4-layer. mounted glass-epoxy board, occupied area copper foil 5505mm2, each layers
Operating Conditions (Ta=-40+85) Parameter Voltage Voltage Output Voltage range Average Output Current
Symbol VOUT1 VOUT2 VOUT3 ISW1 ISW2
Min.
Typ.
Max. 1.5*6 1.5*6
Unit
should exceeded.
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1/18
2009.08 Rev.A
BD9153MUV
Electrical Characteristics (Ta=25 VCC=5V, EN=VCC ,unless otherwise specified.) Parameter Standby Current Bias Current Voltage High Voltage Input Current Oscillation Frequency Resistance Resistance Reference Voltage sink curren1 source current sink curren2 source current UVLO Threshold Voltage1 UVLO Release Voltage1 UVLO Threshold Voltage2 UVLO Release Voltage2 Discharge Resistance Soft Start Time Timer Latch Time Output Short circuit Threshold Voltage Release Voltage threshold Voltage Delay Reststance GATE Source Current GATE Sink Current Symbol ISTB VENL VENH FOSC RONP1 RONP2 RONN1 RONN2 VFB1,2 VFB3 VFB3 ITHSI1 ITHSO1 ITHSI2 ITHSO2 VUVLOL1 VUVLOH1 VUVLOL2 VUVLOH2 TLATCH VSCP1 VSCP2 VSCP3 VRST1 VRST2 TRST RONRST IGSO IGSI Min. 0.788 0.784 0.780 3.65 2.425 0.691 0.668 Limit Typ. 0.17 0.17 0.13 0.13 2.55 0.720 0.696 Max. 1000 0.812 0.816 0.820 0.56 0.56 0.56 0.749 0.724 Unit
Technical Note
Condition EN=0V Standby Mode Active Mode EN=2V Vcc=5V Vcc=5V Vcc=5V Vcc=5V ±1.5% ±2.0%(Ta=25) ±2.5%(Ta=-40~+85) VFB1=1.0V VFB1=0.6V VFB2=1.0V VFB2=0.6V Vcc=50V Vcc=05V Vcc=50V Vcc=05V Vcc=5V SCP/TSD FB1=0.80V FB2=0.80V FB3=0.80V DET=0V0.8V DET=0.8V0V
VFB3=0.6V VGATE=2.5V VFB3=1.0V VGATE=2.5V
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2/18
2009.08 Rev.A
BD9153MUV
Block Diagram, Application Circuit
Technical Note
4.0±0.1
4.0±0.1
D9153
OUT1
PVCC
Current Comp Slope1
Current Sense/ Protect Driver Logic
OUT1
ITH1
Soft Start1
1.0Max.
PGND1
SCP1
0.02 +0.03 -0.02 (0.22)
CLK1
0.08
VREF
CLK2
SCP/
UVLO1 UVLO2
C0.2 2.4±0.1
SCP2
PVCC
Current
0.4±0.1
2.4±0.1
OUT2
Current Comp Slope2
Sense/ Protect Driver Logic
OUT2
0.75
0.25 +0.05 -0.04
ITH2
Soft Start2
CLK2
PGND2
(Unit Fig.1 BD9153MUV View
Soft Start1
OUT1 GATE
SCP3
OUT3
Timer
ITH1
SCP/TSD UVLO1
AGND
PGND1
Fig.2 BD9153MUV Block Diagram
function table name PGND2 PVCC2 PVCC2 PVCC1 PVCC1 PGND1 PGND1 ITH1
Function
name GATE AVCC AGND ITH2 PGND2 Gate drive
Function Output Voltage3 detector AVCC power supply input Voltage detector signal output Ground GmAmp2 output Output Voltage2 detector Enable (High Active) (2ch) (2ch) Source (2ch)
Source (2CH) Source (2CH) Source (2CH) Source (1CH) Source (1CH) Source (1CH) Source (1CH) (1ch) (1ch) Discharge function Output Voltage1 detector GmAmp1output
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3/18
2009.08 Rev.A
BD9153MUV
Characteristics dataBD9153MUV
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
Technical Note
VOUT1=3.3V
OUTPUT VOLTAGE:VOUT[V]
Ta=25 Io=1.5A VOUT1=3.3V VOUT2=1.2V
VOUT1=3.3V
VCC=5V VOUT2=1.2V Ta=25 Io=0A
VOLTAGE:VEN[V]
VOUT2=1.2V
VCC=5V Ta=25
INPUT VOLTAGE:VCC[V]
OUTPUT CURRENT:IOUT
Fig.3 VOUT1,VOUT2
3.40
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
Fig.4 VOUT
1.25
Fig.5 IOUT VOUT
VOUT1=3.3V
3.35
1.23
VOUT2=1.2V VOUT2=1.2V
EFFICIENCY:[%]
3.30
1.20
VOUT1=3.3V
VOUT2=1.2V
3.25
1.18
VCC=5V Io=0A
3.20 TEMPERATURE:Ta[]
VCC=5V Io=0A
TEMPERATURE:Ta[]
VCC=5V Ta=25
1.15
1000 OUTPUT CURRENT:IOUT[mA] 10000
Fig. Ta-VOUT1
FREQUENCY:FOSC[MHz]
Fig. Ta-VOUT2
Fig.8 Efficiency
VCC=5V PMOS
FREQUENCY:FOSC[MHz]
RESISTANCE:RON[m]
NMOS
VCC=5V
Ta=25
TEMPERATURE:Ta[]
4.75 5.25 INPUT VOLTAGE:VCC[V]
TEMPERATURE:Ta[]
Fig.9 Fosc
VOLTAGE:VEN[V]
Fig.10 VCC-Fosc
CIRCUIT CURRENT:ICC[A]
Fig.11 RONN, RONP
VCC=5V,Ta=25
VOUT1
EN1=E2 VOUT1
VCC=5V
VOUT2
VCC=5V
VOUT3
TEMPERATURE:Ta[]
VOUT2
VCC=5.0V Ta=25
TEMPERATURE:Ta[]
Fig.12 TaEN
Fig.13 TaIcc
Fig.14 Soft start wave form (Io1=0mA, Io2=0mA, Io3=0mA)
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4/18
2009.08 Rev.A
BD9153MUV
Technical Note
VOUT1
VOUT2
VOUT1
VOUT1
VOUT3
VCC=5.0V Ta=25
VCC=5.0V,Vout1=3.3V Ta=25
VCC=5.0V,Vout1=3.3V Ta=25
Fig.15 Soft start wave form (Io1=1.5A, Io2=1.5A, Io3=1.0A)
Fig.16 wave form (Io1=0mA)
Fig.17 wave form (Io1=1.5A)
VOUT1
VOUT2
VOUT2
IOUT1
VCC=5.0V,Vout2=1.2V Ta=25
VCC=5.0V,Vout2=1.2V Ta=25
VCC=5.0V,Vout1=3.3V Ta=25
Fig.18 wave form (Io2=0mA)
Fig.19 wave form (Io2=1.5A)
Fig.20 VOUT1 transient responce (Io10.5A1.5A 10usec)
VOUT1
VOUT2
VOUT2
IOUT1
IOUT2
IOUT2
VCC=5.0V,Vout1=3.3V Ta=25
VCC=5.0V,Vout2=1.2V Ta=25
VCC=5.0V,Vout2=1.2V Ta=25
Fig.21 VOUT1 transient responce (Io11.5A0.5A/ 10usec)
Fig.22 VOUT2 transient responce (Io20.5A1.5A/ 10usec)
Fig.23 VOUT2 transient responce (Io21.5A0.5A/ 10usec)
VOUT3
VOUT3
IOUT3
IOUT3
VCC=5.0V,Vout3=2.5V Ta=25
VCC=5.0V,Vout3=2.5V Ta=25
Fig.24 VOUT3 transient responce (Io30.5A1A/ 10usec)
Fig.25 VOUT3 transient responce (Io3500mA1A/ 10usec)
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5/18
2009.08 Rev.A
BD9153MUV
Information advantages Advantage 1Offers fast transient response with current mode control system. BD9153MUV (Load response IO=0.5A1.5A usec)
Technical Note
BD9153MUV (Load response IO=1.5A0.5A usec)
VOUT1
VOUT1
Fig.26 Advantage Offers high efficiency load range. lighter load: Utilizes current mode control mode called SLLM lighter load, which reduces various dissipation such switching dissipation (PSW), gate charge/discharge dissipation, dissipation output capacitor (PESR) on-resistance dissipation (PRON) that otherwise cause degradation efficiency lighter load.
Achieves efficiency improvement lighter load. heavier load: Utilizes synchronous rectifying mode on-resistance FETs incorporated power transistor. resistance Highside 170m(Typ.) resistance Lowside 130m(Typ.)
Efficiency SLLM
inprovement SLLM system improvement synchronous rectifier
Achieves efficiency improvement heavier load. Offers high efficiency load range with improvements mentioned above.
0.001
0.01 Output current Io[A]
Fig.27 Efficiency
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6/18
2009.08 Rev.A
BD9153MUV
Technical Note
Advantage 3Supplied smaller package small-sized power incorporated. Output capacitor required current mode control: ceramic capacitor Inductance required operating frequency MHz: 2.2H inductor Incorporates Boot strap diode Reduces mounting area required.
50mm
COUT1 CIN1 CIN2
COUT2
CITH2 RITH2 RITH1 CITH1
AGND ITH2
AVCC
GATE ITH1
50mm
RITH1
RITH2
PGND2 PGND1
CITH1
PGND2 PVCC2 PVCC2 PVCC1 PVCC1 PGND1
COUT3
CIN2
CIN1
Fig.28
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7/18
2009.08 Rev.A
BD9153MUV
Technical Note
Operation BD9153MUV synchronous rectifying step-down switching regulator that achieves faster transient response employing current mode control system. utilizes switching operation (Pulse Width Modulation) mode heavier load, while utilizes SLLM (Simple Light Load Mode) operation lighter load improve efficiency. Synchronous rectifier does require power dissipated rectifier externally connected conventional DC/DC converter junction shoot-through protection circuit limits shoot-through current during operation, which power dissipation reduced. Current mode control Synthesizes control signal with inductor current feedback loop added voltage feedback. (Pulse Width Modulation) control oscillation frequency MHz. signal form turns highside (while lowside turned OFF), inductor current increases. current comparator (Current Comp) receives signals, current feedback control signal (SENSE: Voltage converted from voltage feedback control signal (FB), issues RESET signal both input signals identical each other, turns highside (while lowside turned rest fixed period. control repeat this operation.
SLLM (Simple Light Load Mode) control When control mode shifted from heavier load lighter load vise versa, switching pulse designed turn with device held operated normal control loop, which allows linear operation without voltage drop deterioration transient response during mode switching from light load heavy load vise versa. Although control loop continues operate with signal from RESET signal from Current Comp, designed that RESET signal held issued shifted light load mode, with which switching tuned switching pulses thinned under control. Activating switching intermittently reduces switching dissipation improves efficiency.
SENSE Current Comp RESET Level Shift Amp. Driver Logic Load VOUT
VOUT
Fig.29 Diagram current mode control
SENSE PVCC Current Comp RESET IL(AVE) RESET Current Comp
PVCC SENSE
VOUT
VOUT(AVE)
VOUT
VOUT(AVE)
switching
Fig.30 switching timing chart
Fig.31 SLLM
switching timing chart
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8/18
2009.08 Rev.A
BD9153MUV
Technical Note
Description operations Soft-start function terminal shifted "High" activates soft-starter gradually establish output voltage with current limited during startup, which possible prevent overshoot output voltage inrush current. Shutdown function With terminal shifted "Low", device turns Standby Mode, function blocks including reference voltage circuit, internal oscillator drivers turned OFF. Circuit current during standby (Typ.).
function voltage over 0.72V(Typ.), terminal shifted "High" after 50ms(Typ.) delay. hysteresis width 24mV (Typ.) provided prevent output chattering. UVLO function Detects whether input voltage sufficient secure output voltage BU9153MUV supplied. hysteresis width 100mV (UVLO1 Typ.) ,50mV(UVLO2 Typ.) provided prevent output chattering. Each outputs have UVLO. possible output sequence easy.
4.5V detect (RST Release voltage 3.9V detect (UVLO Release voltage 2.55V detect (UVLO Release voltage2)
4.35V (RST Threshold Voltage 3.8V (UVLO Threshold Voltage 2.5V (UVLO Threshold Voltage
VCCEN 3.3V Output (DC/DC 2.5V Output (LDO) 1.2V Output (DC/DC
discharge
Output
0.8ms Soft-start 50ms (RST Delay)
Natural discharge
Fig.32 Soft-start, Shutdown, Delay, UVLO, timing chart
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9/18
2009.08 Rev.A
BD9153MUV
Technical Note
Short-current protection circuit with time delay function Turns output protect from breakdown when incorporated current limiter activated continuously fixed time(TLATCH) more. output thus held tuned recovered restarting re-unlocking UVLO.
Output Short circuit Threshold Voltage OUT1 Output Latch OUT2 OUT3
Limit
t1<TLATCH Standby mode Operating mode
t2<TLATCH
t3=TLATCH Standby mode Operating mode
Timer latch
Fig.33 Short-current protection circuit with time delay timing chart Switching regulator efficiency Efficiency expressed equation shown below: POUT POUT POUT+PD
Efficiency improved reducing switching regulator power dissipation factors follows: Dissipation factors: resistance dissipation inductor FETPD(I Gate charge/discharge dissipationPD(Gate) Switching dissipationPD(SW) dissipation capacitorPD(ESR) Operating current dissipation ICPD(IC)
1)PD(I R)=IOUT (RCOIL[]DC resistance inductor, RON[]ON resistance FET, IOUT[A]Output current.) (Cgs[F]Gate capacitance FET, f[H]Switching frequency, V[V]Gate driving voltage FET)
3)PD(SW)=
IDRIVE
(CRSS[F]Reverse transfer capacitance FET, IDRIVE[A]Peak current gate.)
4)PD(ESR)=IRMS (IRMS[A]Ripple current capacitor, ESR[]Equivalent series resistance.) (ICC[A]Circuit current.)
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10/18
2009.08 Rev.A
BD9153MUV
Technical Note
Consideration permissible dissipation heat generation BU9153MUV functions with high efficiency without significant heat generation most applications, special consideration needed permissible dissipation heat generation. case extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, permissible dissipation and/or heat generation must carefully considered. dissipation, only conduction losses resistance inductor resistance considered. Because conduction losses considered play leading role among other dissipation mentioned above including gate charge/discharge dissipation switching dissipation.
3.56W
layers (copper foil area 5505mm (Copper foil each layers) j-a=35.1/W layers (copper foil area 10.29mm (Copper foil layers) j-a=56.8/W layer (Copper foil area j-a=181.2/W only j-a=367.6/W
duty (=VOUT/VCC) RONHON resistance Highside RONLON resistance Lowside IOUTOutput current
Power dissipation
2.2W
0.69W 0.34W
Ambient temperature
Fig.34 Thermal derating curve (VQFN024V4040) (Example) VCC=5V, VOUT1=3.3V, VOUT2=1.2V, RONH=170m, RONL=130m IOUT=1.5A, example, D1=VOUT1/VCC=3.3/5=0.66 D2=VOUT2/VCC=1.2/5=0.24 =0.1122+0.0442 =0.1564[] =0.0408+0.0988 =0.1397[]
P=1.5
RONH greater than RONL BU9153MUV, dissipation increases duty becomes greater. With consideration dissipation above, thermal design must carried with sufficient margin allowed.
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11/18
2009.08 Rev.A
BD9153MUV
Selection components externally connected Selection inductor
Technical Note
inductance significantly depends output ripple current. seen equation (1), ripple current decreases inductor and/or switching frequency increases.
[A](1)
VOUT
Appropriate ripple current output should more less maximum output current. [A](2) [H](3)
Fig.35 Output ripple current
(IL: Output ripple current, Switching frequency)
Current exceeding current rating inductor results magnetic saturation inductor, which decreases efficiency. inductor must selected allowing sufficient margin with which peak current exceed current rating. VCC=5.0V, VOUT=1.2V, f=1.0MHz, example,(BD9153MUV)
=2.02 2.2[H]
Select inductor resistance component (such ACR) minimize dissipation inductor better efficiency.
Selection output capacitor (CO)
Output capacitor should selected with consideration stability region equivalent series resistance required smooth ripple voltage.
VOUT
Output ripple voltage determined equation [V](4) (IL: Output ripple current, ESR: Equivalent series resistance output capacitor) Rating capacitor should determined allowing sufficient margin against output voltage. 22µF 100F ceramic capacitor recommended. Less allows reduction output ripple voltage.
Fig.36 Output capacitor
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12/18
2009.08 Rev.A
BD9153MUV
Selection input capacitor (Cin)
Technical Note
Input capacitor select must capacitor capacitance sufficient cope with high ripple current prevent high transient voltage. ripple current IRMS given equation (5):
VOUT
OUT(VCC-VOUT)
[A](5)
Worst case IRMS(max.) VCC=5.0V, VOUT=1.8V, IOUTmax.=1.5A, (BD9153MUV) 1.8(5.0-1.8) 0.48[ARMS] When IRMS IOUT
Fig.37 Input capacitor
22µF/10V ceramic capacitor recommended reduce dissipation input capacitor better efficiency. Determination RITH, CITH that works phase compensator Current Mode Control designed limit inductor current, pole (phase lag) appears frequency area filter consisting output capacitor load resistance, while zero (phase lead) appears high frequency area output capacitor ESR. phases easily compensated adding zero power amplifier output with described below cancel pole power amplifier.
fp(Min.) Gain [dB] fp(Max.) fz(ESR) IOUTMin. IOUTMax.
fz(ESR)=
Phase [deg]
Pole power amplifier When output current decreases, load resistance increases pole frequency lowers. fp(Min.)= [Hz]with lighter load [Hz] with heavier load
Fig.38 Open loop gain characteristics fp(Max.)=
Gain [dB] Phase [deg]
fz(Amp.)
Zero power amplifier Increasing capacitance output capacitor lowers pole frequency while zero frequency does change. (This because when capacitance doubled, capacitor reduces half.) fz(Amp.)=
Fig.39 Error phase compensation characteristics
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13/18
2009.08 Rev.A
BD9153MUV
Technical Note
AVCC GATE ITH1 RITH1 CITH1
CITH2
RITH2
AGND ITH2
PGND2
PGND1 PVCC2 PVCC2 PVCC1 PVCC1 PGND1
PGND2
CIN2
CIN1
Fig.40 Typical application Stable feedback loop achieved canceling pole (Min.) produced output capacitor load resistance with zero correction error amplifier. fz(Amp.)= fp(Min.)
Determination VOUT1~3 output voltage output voltage VOUT1~3 determined equation (6)~(8): VFB1: Voltage terminal (0.8V Typ.) VFB2: Voltage terminal (0.8V Typ.) VFB3: Voltage terminal (0.8V Typ.) With R1~R6 adjusted, output voltage determined required.
VOUT1 Cout1
Fig.41 Determination output voltage k100 resistor resistor resistance higher than used, check assembled carefully ripple voltage etc.
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14/18
2009.08 Rev.A
BD9153MUV
BD9153MUV Cautions Board layout Silk screen Layer
Technical Note
Bottom Layer
Fig.42 Layout diagram
input ceramic capacitor closer pins PVCC PGND, output capacitor closer PGND. CITH RITH between pins neat possible with least necessary wiring. VQFN024V4040 (BD9153MUV) thermal reverse package. package thermal performance enhanced bonding plane which take large area PCB.
Recommended components Lists above application Symbol L1,2 CIN1,CIN2 Cout1,Cout2 CITH1 RITH1 CITH2 RITH2 Coil Ceramic capacitor Ceramic capacitor Ceramic capacitor Resistance Ceramic capacitor Resistance Ceramic capacitor Part Value 2.2µH 22µF 22µF VOUT1=3.3V VOUT1=3.3V VOUT2=1.2V VOUT2=1.2V 56pF 680pF 680pF Manufacturer Murata Murata Murata Rohm Murata Rohm Murata Rohm Series LTF5022-2R2N3R2 GRM32EB11A226KE20 GRM31CB30J226KE18 GRM18 Series MCR03 Series GRM18 Series MCR03 Series GRM18 Series RTF015N03
parts list presented above example recommended parts. Although parts sound, actual circuit characteristics should checked your application carefully before use. sure allow sufficient margins accommodate variations between external devices BU9153MUV when employing depicted circuit with other circuit constants modified. Both static transient characteristics should considered establishing these margins. When switching noise substantial impact system, pass filter should inserted between PVCC pins, schottky barrier diode snubber established between PGND pins.
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15/18
2009.08 Rev.A
BD9153MUV
equivalence circuit
SW1,SW2
PVCC PVCC PVCC
Technical Note
SW1,SW2
FB1,FB2,FB3,DET
FB1,FB2,FB3,DET
ITH1,ITH2
AVCC
ITH1,ITH2
RST,
RST,VS
GATE
AVCC
GATE
Fig.43 equivalence circuit
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16/18
2009.08 Rev.A
BD9153MUV
Technical Note
Notes Absolute Maximum Ratings While utmost care taken quality control this product, application that exceed some absolute maximum ratings including voltage applied operating temperature range result breakage. broken, short-mode open-mode identified. expected encounter with special mode that exceed absolute maximum ratings, requested take necessary safety measures physically including insertion fuses. Electrical potential must designed have lowest electrical potential operating conditions. Short-circuiting between terminals, mismounting When mounting board, care must taken avoid mistake orientation alignment. Failure result breakdown. Short-circuiting foreign matters entered between output terminals, between output power supply also cause breakdown. Thermal shutdown protection circuit Thermal shutdown protection circuit circuit designed isolate from thermal runaway, intended protect guarantee thermal shutdown protection circuit which once activated should used thereafter operation originally intended. Inspection with board capacitor must connected lower impedance during inspection with board, capacitor must discharged after each process avoid stress electrostatic protection, provide proper grounding assembling processes with special care taken handling storage. When connecting jigs inspection process, sure turn power supply before connected removed. Input terminals This monolithic with isolation between P-substrate each element illustrated below. This P-layer N-layer each element form junction, various parasitic element formed. resistor joined transistor terminal shown junction works parasitic diode following relationship satisfied; GND>Terminal resistor side), GND>Terminal transistor side); GND>Terminal transistor side), parasitic transistor activated N-layer other element adjacent above-mentioned parasitic diode. structure inevitably forms parasitic elements, activation which cause interference among circuits, and/or malfunctions contributing breakdown. therefore requested take care device such manner that voltage lower than P-substrate) applied input terminal, which result activation parasitic elements.
Resistor
Transistor (NPN)
substrate
Parasitic element
substrate
Parasitic element
Parasitic element
Parasitic element
Other adjacent elements
Fig.44 Simplified structure monorisic Ground wiring pattern small-signal large-current provided, will recommended separate large-current pattern from small-signal pattern establish single ground reference point that resistance wiring pattern voltage fluctuations large current will cause fluctuations voltages small-signal GND. attention cause fluctuations wiring pattern external parts well. Selection inductor recommended inductor with series resistance element (DCR) 0.15 less. Note that high inductor will cause inductor loss, resulting decreased output voltage. Should this condition continue specified period (soft start time timer latch time), output short circuit protection will activated output will latched OFF. When using inductor over 0.15, careful ensure adequate margins variation between external devices BU9153MUV, including transient well static characteristics.
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17/18
2009.08 Rev.A
BD9153MUV
Ordering part number
Technical Note
Part
Part
Package MUV: VQFN24V4040
Packaging forming specification Embossed tape reel (VQFN24V4040)
VQFN024V4040
4.0±0.1
4.0±0.1
<Tape Reel information>
Tape Quantity Embossed carrier tape 2500pcs
direction 1pin product upper left when hold
1.0MAX
1PIN MARK
+0.03 0.02 -0.02 (0.22)
Direction feed
reel left hand pull tape right hand
0.08 C0.2
2.4±0.1
0.4±0.1
0.75
2.4±0.1
+0.05 0.25 -0.04
1pin
Direction feed
(Unit
Reel
Order quantity needs multiple minimum quantity.
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18/18
2009.08 Rev.A
Notice
Notes
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R0039A

Output 1.5A Less High Efficiency Step-down Switching Regulator with Bu

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