TLE7269G Twin Transceiver Automotive Power TLE7269G

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TLE7269G Twin Transceiver Automotive Power TLE7269G

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Data Sheet, Rev. 1.2, Nov. 2007
TLE7269G
Twin Transceiver
Automotive Power
TLE7269G
Table Contents
Table Contents
4.2.1 4.2.2 4.2.3 4.10 4.11 4.12 4.13 4.14 4.15 Overview Block Diagram Configuration Assignment Definitions Functions Functional Description Operating Modes Normal Operation Mode Normal Slope Mode Slope Mode Flash Mode Stand-By Mode Sleep Mode Wake-Up Events Wake-Up Bus2 Wake-Up Local Wake-Up Mode Transition Power-On Reset Time function Over Temperature protection Logic Capability Short Feature Specifications 1.2, 1.3, General Product Characteristics Absolute Maximum Ratings Functional Range Thermal Characteristics
Electrical Characteristics Functional Device Characteristics Diagrams Application Information Robustness according IEC61000-4-2 Compatibility Single Transceivers Master Termination External Capacitors Application Example
Package Outlines Revision History
Data Sheet
Rev. 1.2, 2007-11-13
Twin Transceiver
TLE7269G
Features
Overview
stand-alone transceivers kBaud transmission rate compatible single Transceivers (e.g TLE7259-2GE/GU) Compliant specification 1.3, 2.0, J2602 Very high robustness, according IEC61000-4-2 Optimized electromagnetic emission (EME) Optimized high immunity against electromagnetic interference (EMI) Very current consumption sleep mode with Wake-Up functions Wake-Up source detection Wake-Up disable function Very leakage current output Control output voltage regulator Digital levels compatible microcontrollers short VBAT protection short handling Over-temperature Under-voltage protection Flash mode Low-Slope Mode Green Product (RoHs compliant) compliant
PG-DSO-14
Description TLE7269G transceiver Local Interconnect Network (LIN) with integrated Wake-Up protection features. designed in-vehicle networks using data transmission rates from kBaud kBaud. TLE7269G functions driver between protocol controller physical inside network. Compliant standards with wide operational supply range TLE7269G used automotive applications. stand-alone transceivers integrated monolithic circuit inside TLE7269G. Both transceivers offer different operation modes separate outputs control external circuitry, like voltage regulators. Sleep-mode TLE7269G draws less than quiescent current both integrated Transceivers, while both transceivers still able wake traffic local Wake-Up input. very leakage current pins makes TLE7269G especially suitable partially supplied networks supports quiescent current requirements network. Based Infineon Smart Power Technology SPT®, TLE7269G provides excellent robustness together with very high electromagnetic immunity (EMI). TLE7269G reaches very level electromagnetic emission (EME) within broad frequency range independent from battery voltage. Infineon Smart Power Technology SPT® allows bipolar CMOS control circuitry accordance with DMOS power devices exist same monolithic circuit. TLE7269G Infineon SPT® technology qualified tailored withstand harsh conditions Automotive Environment. Type TLE7269G Data Sheet Package PG-DSO-14 Marking 7269G Rev. 1.2, 2007-11-13
TLE7269G
Block Diagram
Block Diagram
INH1 INH2
RBUS
Output Stage
Driver
Input
Bus1
Current Limit
Timeout
TxD1
Receiver Filter
RxD1
Temp Sensor
Wake Comparators
Mode Control
Filter
RW2O
Receiver Filter
RxD2 Bus2
RBUS Output Stage
Driver
Input
TxD2
Current Limit
Timeout
Figure Data Sheet
Functional Block Diagram Rev. 1.2, 2007-11-13
TLE7269G
Configuration
Configuration
Assignment
RxD1 TxD1 TxD2 RxD2
INH1 BUS1 BUS2 INH2
Figure
Configuration (top view)
Note: configuration TLE7269G compatible devices TLE7259G TLE7259-2GE/GU. comparison TLE7259G 7259-2GE/GU, pull resistors pins required TLE7269G. Details found inside "Pin Compatibility Single Transceivers" Page
Table
Definitions Functions
Definitions Functions Symbol RxD1 TxD1 TxD2 RxD2 Function Receive data output dominant state, active after Wake-Up event BUS1 Enable input; integrated pull-down, device normal operation mode when HIGH Wake input; active LOW, negative edge triggered, internal pull-up Transmit data input integrated pull-down, dominant state; active after Wake-Up Transmit data input integrated pull-down, dominant state Logic Voltage supply input; 3.3V supply pins Receive data output dominant state, active after Wake-Up event BUS2 Rev. 1.2, 2007-11-13
Data Sheet
TLE7269G
Configuration Table Definitions Functions (cont'd) Symbol INH2 Function Inhibit output battery supply related output HIGH (VS) Normal Stand-By operation mode used control external voltage regulator used control external termination resistor when device will used Master node Wake OFF; switch Wake-Up feature active HIGH, integrated pull-down input output; line input/output dominant state Internal termination pull-up current source Ground input output; line input/output dominant state Internal termination pull-up current source Battery supply input Inhibit output battery supply related output HIGH (VS) Normal Stand-By operation mode used control external voltage regulator used control external termination resistor when device will used Master node
INH1
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Functional Description
Functional Description
single wire, bi-directional bus, used in-vehicle networks. Transceiver TLE7269G interface between microcontroller physical (see Figure Figure 18). logical values microcontroller driven inputs TLE7269G. transmit data stream input converted signal with optimized slew rate minimize level network. outputs read back information from microcontroller. receiver integrated filter network suppress noise increase (Electro Magnetic Immunity) level transceiver. logical states possible according Specification (see Figure dominant state, voltage level. recessive state, voltage supply voltage setting TxD1, TxD2 inputs TLE7269G "Low" transceiver generates dominant level BUS1, BUS2 interface pins. RxD1, RxD2 outputs read back signal indicate dominant signal with logical "Low" microcontroller. Setting TXD1, TxD2 pins "High" transceiver TLE7269G sets BUS1, BUS2 interface pins recessive level, same time recessive level indicated logical "High" RxD1, RxD2 outputs. Every network consists master node more slave nodes. configure TLE7269G master node applications, resistor range reverse diode must connected between power supply between TLE7269G (see Figure Figure 18). Both integrated transceivers operate independent from each other several operation modes WakeUp functions implemented. Wake-Up function transceiver turned pin.
Recessive Dominant Recessive
TxD1 TxD2
Recessive
Dominant
Recessive
BUS1 BUS2
RxD1 RxD2 Recessive Dominant Recessive
Figure
signals
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Functional Description
Operating Modes
Start-Up Power-Up
Strong Pull Down after Wake-Up Weak Pull Down after Power-Up Wake-Up BUS1 BUS2
Note
TxD1: TxD1:
Note
RxD1: RxD1: logical ,,High" after Power-Up logical ,,Low" after Wake-Up BUS1 BUS2 after Wake-Up logical ,,Low" after Wake-Up BUS2
Stand-By Mode
INH1, INH2 HIGH TxD1 (see Note RxD1, RxD2 (see Note
RxD2:
Normal Operation Mode
HIGH
Status TxD1?
TxD1 High Normal Operation Mode
Slope Mode
(Transceiver Transceiver INH1 HIGH INH2 HIGH HIGH TxD1
TxD1 High
Flash Mode
(Transceiver Transceiver INH1 High INH2 High High
Normal Slope Mode
TxD1 (Transceiver Transceiver INH1 HIGH INH2 HIGH HIGH
Sleep Mode
Status
HIGH
Sleep Mode
INH1/INH2 Float RxD1/RxD2 Float
Sleep Mode
INH1/INH2 Float RxD1/RxD2 Float
Wake-Up feature BUS2 turned off!
Wake-Up
BUS1 BUS2
Wake-Up
BUS1 only
Figure Data Sheet
Operation Mode State Diagram Rev. 1.2, 2007-11-13
TLE7269G
Functional Description TLE7269G major operation modes: Stand-By mode Normal Operation mode Sleep mode
Normal Operation mode contains sub-operation modes, which differentiate slew rate control signal (see Figure Sub-operation modes with different slew rates BUS1,BUS2 pins: Slope mode, data transmission rates 10.4 kBaud Normal Slope mode, data transmission rates kBaud Flash mode, programming external microcontroller
TLE7269G contains separate transceivers, which able operate independent networks with different data transmission rates. operation mode TLE7269G selected TxD1 pin. Selecting operation mode applies whole device. Transceiver1 transceiver2 always same operation mode sub-operation mode (see Figure Table Mode Sleep Stand-By Operating modes INH1 INH2 TxD1 TXD2 RxD1 RxD2 Comments Termination Wake-Up request detected RxD1 "Low" after local Wake-Up (BUS RxD2 "Low" after Wake-Up Bus2. RxD2 "High" other Wake-Up Power-Up events. RxD1 "High" after Power-Up TxD1 strong pull down after local Wake-Up pin)2) TxD1 weak pull down after Wake-Up (BUS1, BUS2) Power-Up2) RxD1, RxD2 reflects signal BUS1, BUS2 TxD1,TxD2 driven microcontroller
Floating High High2)
High High resistive Impedance High (typical)
Normal High Operation
High
High
High
(typical)
indicate Wake-Up sources pins power supply present TxD1 input needs external termination indicate "High" "Low" signal. external termination could pull-up resistor active microcontroller output.
Normal Operation Mode
TLE7269G enters Normal Operation mode after microcontroller sets "High" (see Figure Normal Operation mode both receivers both transmitters active. Data from microcontroller transmitted bus1 bus2 TxD1 TxD2 pin, receiver detects data stream bus1 bus2 forwards RxD1 RxD2 output pins. Normal Operation mode, INH1 INH2 "High" (set termination both integrated transceivers. Normal Slope mode, Slope mode Flash mode Normal Operation modes these sub-modes behavior termination same. device into these sub-modes TxD1 used sub-operation mode selection. order avoid disturbance during mode change, output stages TLE7269G disabled recessive state during mode change procedure. release TLE7269G data communication bus1 bus2, TxD1 TxD2 pins need "High" time tto,rec. Data Sheet Rev. 1.2, 2007-11-13
TLE7269G
Functional Description
4.2.1
Normal Slope Mode
Normal Slope mode data transmission rates kBauds possible. Setting "High" starts transition Normal Operation mode. Depending signal TxD1 pin, TLE7269G changes either into Normal Slope mode Slope mode (see Figure mode change Normal Slope mode defined time tMODE time tTXD,SET. time tMODE specifies delay time between threshold, where detects "High" input signal, actual mode change TLE7269G into Normal Slope mode. time tTXD,SET defines setup time which TxD1 "High". After time tTXD,SET expires, logical "High" signal TxD1 stable part into Normal Slope mode. time window tMODE tTXD,SET TLE7269G makes transition Normal Slope mode remains StandBy mode until time tMODE expires. Finally release data communication required TxD1 TxD2 "High" time tto,rec.
VEN,ON
Mode Transition TxD1 tTxD,SET
Data transmission tto,rec
tMODE
Stand-By Mode Sleep Mode
Normal Slope Mode
Figure
Timing enter Normal Slope Mode
4.2.2
Slope Mode
Slope mode data transmission rates 10.4 kBauds possible. Setting "High" starts transition Normal Operation mode. Depending signal TxD1 TLE7269G changes either into Normal Slope mode Slope mode (see Figure mode change Slope mode defined time tMODE time tTXD,SET. time tMODE specifies delay time between threshold, where detects "High" input signal, actual mode change TLE7269G Slope mode. time tTXD,SET defines setup time which TxD1 "Low". After time tTXD,SET expires, logical "Low" signal TxD1 stable part into Slope mode. time window tMODE tTXD,SET TLE7269G makes transition into Slope mode remains StandBy mode until time tMODE expires. Finally release data communication required TxD1 TxD2 "High" time tto,rec.
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Functional Description
VEN,ON
Data transmission TxD1 Mode Transition tMODE
tTxD,SET
tto,rec
Stand-By Mode Sleep Mode
Slope Mode
Figure
Timing enter Slope Mode
4.2.3
Flash Mode
Flash mode possible transmit receive messages bus. slew rate control mechanism signal disabled. This allows higher data transmission rates, disregarding limitations network. Flash mode intended used during production programming microcontroller interface. TLE7269G Flash mode either from Normal Slope mode from Slope mode (see Figure Flash mode entered setting "Low" time tfl1 generating falling rising edge TxD1 with timing tfl2, tfl3 tfl4 (see Figure Leaving Flash mode same sequence, sets TLE7269G back previous state, that either Normal Slope mode Slope mode. Finally release data transmission required TxD1 TxD2 "High" time tto,rec. TLE7269G from Flash mode directly Sleep mode switching "Low". Setting "High" again, device will return Flash mode.
Normal Slope Mode Slope Mode
Flash Mode
Normal Slope Mode Slope Mode
tfl1
tfl1
TxD1 tfl2
Figure
Data transmission
Data transm.
tfl3
tfl4
ttorec
tfl2
tfl3
tfl4
ttorec
Timing enter exit Flash Mode
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Functional Description
Stand-By Mode
Stand-By mode entered automatically after: Power-Up event supply Wake-Up event BUS1 BUS2. local Wake-Up event power reset caused power supply power supply Stand-By mode Wake-Up sources monitored TxD1, RxD1 RxD2 pins.
Stand-By mode communication possible. output stages disabled termination remains activated both integrated transceivers. Only RxD1, RxD2 TxD1 used indicate Wake-Up source. TxD2 remains inactive. RxD1 remains "Low" after local WakeUp event Wake-Up event either RxD2 remains "Low" only after Wake-Up event Power-Up event indicated logical "High" RxD1 pin. signal TxD1 indicates Wake-Up source, weak pull-down signals Wake-Up event strong pull-down signals local Wake-Up event caused (see Table Table order detect Wake-Up event TxD1 pin, external microcontroller output needs provide logical "High" signal. Wake-Up flags indicating Wake-Up source pins TxD1, RxD1 RxD2 reset changing operation mode Normal Operation mode. signal remains "Low" internal pull-down resistor. Setting "High", microcontroller returns TLE7269G Normal Operation mode. Stand-By mode INH1 INH2 outputs switching outputs used control external device like voltage regulator. Table power Logic table wake monitoring
Inputs
BUS1 BUS2 WakeUp4) RxD1
Outputs
RxD2
TxD1
Remarks Wake-Up, Power-Up event Wake wake Wake BUS1 Wake BUS2
Wake- Up3) WakeUp4)
indicate Wake-Up Power-Up event pin, supply present TxD1 input needs external termination indicate "High" "Low" signal. external termination could pull-up resistor active microcontroller output. local Wake-Up event considered after signal (see Chapter 4.8). Wake-Up event considered after high transition (see Chapter 4.7).
Note: case sequence Wake-Up events only first Wake-Up event will monitored TxD1, RxD1 RxD2. Subsequent Wake-Up events ignored.
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Functional Description
Sleep Mode
order reduce current consumption TLE7269G offers Sleep mode. Sleep mode quiescent current leakage current pins BUS1 BUS2 back minimum. switch TLE7269G from Normal Operation mode Sleep mode, "Low". Conversely logical "High" sets device directly back Normal Operation mode (see Figure While TLE7269G Sleep mode following functions available: output stages disabled internal terminations switched (High Impedance pins BUS1 BUS2). Internal current sources pins ensure that levels pins BUS1 BUS2 remain recessive protect network against accidental Wake-Up events. receiver stages turned off. RxD1, RxD2 output pins inactive "High resistive". TxD1, TxD2 pins disabled. logical state TxD1 TxD2 "Low" internal pull-down resistors. INH1 INH2 outputs switched floating. Wake-Up comparator active turns TLE7269G Stand-By mode case Wake-Up event. active turns TLE7269G Stand-By mode case local Wake-Up. remains active, switching "High" changes operation mode Normal Operation mode.
Wake-Up Events
Wake-Up event changes operation mode TLE7269G from Sleep mode Stand-By mode. Both integrated transceivers changing mode. There different ways Wake-Up TLE7269G from Sleep mode. also called remote Wake-Up dominant signal BUS1. also called remote Wake-Up dominant signal BUS2. Local Wake-Up minimum dominant time (tWK) pin. Mode change from Sleep mode Normal Operation mode, setting logical "High".
Wake-Up Bus2
Wake-Up event bus1 bus2 wakes TLE7269G sets Stand-By mode. applications where Wake-Up bus1 required Wake-Up bus2 wanted, Wake-Up event BUS2 disabled. This done setting "High". During mode change from Normal Operation mode Sleep mode TLE7269G checks status W2O. case "High", Wake-Up feature transceiver will disabled. TLE7269G still wake Wake-Up event bus1 local Wake-Up event Wake-Up event won't recognized device remains Sleep mode (see Figure case Wake-Up Bus2 feature used, left open, internal pull-down resistor, connected logical "Low". function remain unchanged.
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Functional Description
Wake-Up
BUS1 BUS2 Signal VBUS1
VBUS,wk VBUS,dom tWK,bus
Sleep Mode
Stand-By Mode
INH1/ INH2
Figure
Wake-Up behavior
Wake-Up event, often called remote Wake-Up, changes operation mode from Sleep mode StandBy mode. TLE7269G wakes-up Wake-Up event either BUS1 BUS2. WakeUp behavior identical both pins. falling edge bus, followed dominant signal tWK,bus results Wake-Up event. mode change Stand-By mode becomes active with following rising edge bus. TLE7269G remains Sleep mode until detects change from dominant recessive (see Figure Stand-By mode TxD1 indicates source Wake-Up event, TxD2 remains inactive. weak pull-down TxD1 indicates Wake-Up event (see Figure Table RxD1 signals Wake-Up event occurred power-up event. "Low" signal RxD1 reports local Wake-Up event, logical "High" signal RxD1 indicates power-up event. "Low" signal RxD2 indicates Wake-Up event BUS2.
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Functional Description
Local Wake-Up
Signal
VWK,L
Sleep Mode
Stand-By Mode
INH1/ INH2
Figure Local Wake-Up behavior
Beside remote Wake-Up, Wake-Up TLE7269G possible. This type Wake-Up event called "Local Wake Up". falling edge followed "Low" signal results local Wake-Up (see Figure changes operation mode Stand-By mode. Stand-By mode TxD1 indicates source Wake-Up event, TxD2 remains inactive. strong pull-down TxD1 indicates Wake-Up event (see Figure RxD1 signals WakeUp event Power-Up event occurred. "Low" signal RxD1 reports local Wake-Up event, logical "High" signal RxD1 indicates Power-Up event. "Low" signal RxD2 indicates Wake-Up event BUS2.
Mode Transition
Signal
VEN,ON Hysteresis VEN,OFF tMODE
Sleep Mode Stand-By Mode
tMODE
Normal Operation Mode
Sleep Mode
Figure
Mode Transition
also possible change from Sleep mode Normal Operation mode setting logical "High".This feature useful external microcontroller continuously powered connected INH1 INH2 pin. integrated pull-down resistor ensure device remains Sleep Stand-By mode even voltage floating. integrated hysteresis avoid toggling operation modes during transition signal (see Figure 10).
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Functional Description transition from logical "High" logical "Low" changes operation mode from Normal Operation mode Sleep mode. TLE7269G already Sleep mode, changing from "Low" "High" results into mode change from Sleep mode Normal Operation mode. device Stand-By mode change from "Low" "High" changes mode Normal Operation mode (see Figure
4.10
Power-On Reset
Supply voltage
Power reset level VS,UV,PON
Power reset
Normal Operation Mode Reset Communication blocked
Blanking time tblank,UV
Stand-By Mode
Supply voltage
Undervoltage level VS,UV,BLK
Under Voltage Detection
Power reset level VS,UV,PON
Blanking time tblank,UV Normal Operation Mode Communication blocked Normal Operation Mode
Supply voltage
Undervoltage level VIO,UV
Under Voltage Detection
Normal Operation Mode Communication blocked
Blanking time tblank,UV Normal Operation Mode
Figure
Power-on reset Under-Voltage situation
dropping power supply dropping microcontroller supply local effect communication whole network. avoid blocking network local TLE7269G integrated Power-On reset supply Under-Voltage detection supply supply VIO. case supply voltage dropping below Power-On reset level VS,UV,PON, TLE7269G changes operation mode Stand-By mode. Stand-By mode output stage TLE7269G disabled communication possible. internal termination remains active well pins (see Figure Figure Data Sheet Rev. 1.2, 2007-11-13
TLE7269G
Functional Description Stand-By mode RxD1 signals power supply condition with "High" signal. logical "High" changes operation mode back Normal Operation mode. case supply voltage dropping below specified operation range (see Table TLE7269G disables output receiver stages. This feature secures communication bus. power supply reaches higher level Under-Voltage level VS,UV,BLK TLE7269G continues with normal operation. mode change only applies power supply drops below power reset level VS,UV,PON). power supply drops below Under-Voltage level VIO,UV output receiver stages will disabled well. When reaches higher level Under-Voltage VIO,UV level TLE7269G continues with normal operation data transmission.
4.11
Time function
TxD1 TxD2 signal dominant time ttimeout time-out function deactivates transmission signal disables both, output stage output stage This realized prevent from being blocked permanent "Low" signal TxD1 TxD2 pin, caused error external microcontroller (see Figure 12). transmission released again, after rising edge TxD1 TxD2 been detected.
Recovery microcontroller error Release after Time-out Normal Communication
Time-Out microcontroller error Normal Communication
ttimeout
ttorec
TxD1
BUS1
Time-Out microcontroller error Normal Communication Recovery microcontroller error Release after Time-out Normal Communication
ttimeout
ttorec
TxD2
BUS2
Figure Data Sheet
Time-Out function
Rev. 1.2, 2007-11-13
TLE7269G
Functional Description
4.12
Over Temperature protection
TLE7269G integrated over temperature sensor protect device against thermal overstress output stage output stage case over temperature event, temperature sensor will disable both output stages (see Figure over temperature event will cause mode change will signaled either pins pins. When junction temperature falls below thermal shut down level TjSD, output stages re-enabled data communication start again BUS1 BUS2. 10°C hysteresis avoids toggling during temperature shut down.
4.13
Logic Capability
TLE7269G used microcontrollers. inputs outputs capable operate with both voltage levels. logic level defined suppling 3.3V VIO. inputs (TxD1, TxD2) take reference voltage from pin. RxD1 output RxD2 output push-pull outputs, they work voltage given pin. external pull-up resistors required. works without voltage microcontroller supply VIO. TLE7269G from Sleep mode Normal Operation mode setting "High", without supplying VIO.
4.14
Short Feature
TLE7269G feature implemented protect battery from running charge case short failure. this failure case normal master termination, resistor diode between power supply would cause constantly drawn current even sleep mode. resulting resistance this short range avoid this current during generator state, like parked car, TLE7269G short feature implemented, which activated Sleep mode. This feature only applicable, master termination BUS1 connected INH1 master termination BUS2 connected INH2 pin, instead being connected power supply (see Figure Figure 18). Internally, path also switched from power supply (see Figure separate Master Termination Switch implemented pins BUS1 BUS2, avoid voltage drop recessive level bus, case dominant level short ground bus.
4.15
Specifications 1.2, 1.3,
device fulfills Physical Layer Specification 1.2, 1.3, 2.1. differences between specification mainly physical layer specification. reason improve compatibility between nodes. specification super version. version offers features. However, possible slave node node cluster, long features used. Vice versa possible node cluster without using features. terms physical layer Specification doesn't include changes fully compliant Specification 2.0. latest version specification, released December 2006.
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
General Product Characteristics
Table
General Product Characteristics
Absolute Maximum Ratings
Absolute Maximum Ratings1)
voltages with respect ground; positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Voltages 5.1.1 5.1.2 5.1.3 Battery supply voltage Logic supply voltage input voltage versus versus Max.
VINH,G VINH,Vs IINH
Unit
Remarks
VBUS,G VBUS,Vs
-0.3 -0.3 -0.3
Spec Param.
5.1.4 5.1.5
Logic voltages W2O, Vlogic TxD1, TxD2, RxD1, RxD2 INH1, INH2 voltage versus versus Output current INH1, INH2 Junction temperature Storage temperature
-0.3 -150
Currents 5.1.6
Temperatures 5.1.7 5.1.8 5.1.9
Human Body Model (100pF k)3) Human Body Model (100pF k)3) Human Body Model (100pF k)3)
Resistivity Electrostatic discharge VESD voltage BUS1, BUS2, versus
VESD
5.1.10 Electrostatic discharge voltage versus
5.1.11 Electrostatic discharge VESD voltage pins except versus
subject production test, specified design Output current internally limited -150 susceptibility according JESD 22-A
Note: Stresses above ones listed here cause permanent damage device. Exposure absolute maximum rating conditions extended periods affect device reliability. Note: Integrated protection functions designed prevent destruction under fault conditions described data sheet. Fault conditions considered "outside" normal operating range. Protection functions designed continuous repetitive operation.
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
General Product Characteristics
Table Pos.
Functional Range
Operating Range Parameter Symbol Limit Values Min. Typ. Max. Spec Param. Parameter deviations possible
Unit
Remarks
Supply voltages 5.2.1 5.2.2 5.2.3 5.2.4 Supply Voltage Range VS(nor) Normal Operation Extended Supply Voltage range operation Supply voltage Junction temperature
VS(ext)
Thermal parameters
subject production test, specified design
Note: Within functional range operates described circuit description. electrical characteristics specified within conditions given related electrical characteristics table.
Table Pos.
Thermal Characteristics
Thermal Characteristics1) Parameter Symbol Limit Values Min. Typ. Max. measured
Unit
Remarks
Thermal Resistance 5.3.5 5.3.6 5.3.7 5.3.8 Junction Soldering Point Junction Ambient
RthJSP RthJA
Thermal Shutdown Junction Temperature Thermal shutdown temp. TjSD Thermal shutdown hyst.
subject production test, specified design JESD 51-2, 51-3, FRA4 76,2 114,3 minimal footprint, 27°C
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Electrical Characteristics
Table
Electrical Characteristics
Functional Device Characteristics
Electrical Characteristics
voltages with respect ground; positive current flowing into pin; unless otherwise specified. Pos. Parameter Symbol Limit Values Min. Current Consumption 6.1.1 Current consumption VS(both channels recessive) Current consumption normal mode Current consumption (both channels dominant) Current consumption sleep mode Current consumption sleep mode
IS,rec
Unit Remarks Max. recessive state, without 13.5 VTxD Normal Operation mode. VIO=5 dominant state, without 13.5 VTxD Sleep mode, VIO=5 Sleep mode, VBUS= Sleep mode, 13.5 VWK= VBUS; Communication blocked reset (see Figure Device reset Stand-ByMode 1)(see Figure Communication blocked reset (see Figure
Typ.
6.1.2 6.1.3
IVIO,norm IS,dom
6.1.4 6.1.5
IVIO,Sleep IS,Sleep
6.1.6
Current consumption sleep IS,Sleep,typ mode
Under Voltage Detection 6.1.7 Blocking under voltage detection falling edge) Power under voltage detection Vs,UV,BLK
6.1.8 6.1.9
Vs,UV,PON
Under voltage detection VIO,UV tblankUV
IRD,H IRD,L
6.1.10 Under voltage blanking time Receiver Outputs: RxD1, RxD2 6.1.11 HIGH level output current 6.1.12 level output current
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Electrical Characteristics Table Electrical Characteristics (cont'd)
voltages with respect ground; positive current flowing into pin; unless otherwise specified. Pos. Parameter Symbol Limit Values Min. Transmission Inputs: TxD1, TxD2 6.1.13 HIGH level input voltage range 6.1.14 Input hysteresis
VTD,H VTD,hys
Unit Remarks Max.
Typ.
Recessive state
0.12
Dominant state
VTxD VTxD VTxD 13.5 Only valid
6.1.15 level input voltage range VTD,L 6.1.16 Pull-down resistance 6.1.17 level leakage current 6.1.18 Dominant current standby mode after Wake-Up 6.1.19 Input capacitance Input 6.1.20 HIGH level input voltage range
VW2O,H ITD,L
6.1.21 level input voltage range VW2O,L 6.1.22 Input hysteresis 6.1.23 Pull-down resistance 6.1.24 Input Capacitance Enable Input: 6.1.25 HIGH level input voltage range
VEN,on VW2O,hys RW2O
0.12
-150 -5.0
Normal Operation Mode Sleep Mode Stand-By Mode
6.1.26 level input voltage range VEN,off 6.1.27 Input hysteresis 6.1.28 Pull-down resistance 6.1.29 Input capacitance 6.1.30 Inhibit resistance 6.1.31 Maximum output current 6.1.32 Leakage current
VEN,hys
RINH,on IINH IINH,lk
Inhibit, Master Termination Outputs: INH1, INH2
IINH VINH
Sleep Mode; VINH
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Electrical Characteristics Table Electrical Characteristics (cont'd)
voltages with respect ground; positive current flowing into pin; unless otherwise specified. Pos. Parameter Symbol Limit Values Min. Wake Input: 6.1.33 High level input voltage 6.1.34 level input voltage 6.1.35 Pull-up current 6.1.36 High level leakage current 6.1.37 Dominant time wake-up 6.1.38 Input Capacitance Receiver: BUS1, BUS2 6.1.39 Receiver threshold voltage, recessive dominant edge 6.1.40 Receiver dominant state 6.1.41 Receiver threshold voltage, dominant recessive edge 6.1.42 Receiver recessive state 6.1.43 Receiver center voltage 6.1.44 Receiver hysteresis 6.1.45 Wake-up threshold voltage 6.1.46 Dominant time wakeup Transmitter: BUS1, BUS2 6.1.47 recessive output voltage 6.1.48 dominant output voltage maximum load
VBUS,ro VBUS,do Vth_dom VBUSdom Vth_rec VBUSrec VBUS_CNT VHYS VBUS,wk tWK,bus VWK,H VWK,L IWK,PU IWK,H,leak
Unit Remarks Max.
Typ.
13.5 13.5
-0.3
0.48
Spec (Par. Spec (Par. Spec (Par. Spec (Par.
0.52 1.15
0.475 0.02 0.40
0.525
0.04 0.175
-450
VTxD high Level VTxD (see Figure VBUS 13.5 Spec (Par. 12); VBUS Spec (Par. VBUS Spec (Par.
6.1.49 short circuit current 6.1.50 Leakage current
IBUS_LIM
IBUS_NO_GND -1000
6.1.51 Leakage current
IBUS_NO_BAT
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Electrical Characteristics Table Electrical Characteristics (cont'd)
voltages with respect ground; positive current flowing into pin; unless otherwise specified. Pos. Parameter Symbol
IBUS_PAS_dom
Limit Values Min. Typ. Max.
Unit Remarks
VBUS Spec (Par. VBUS Spec (Par.
6.1.52 Leakage current
6.1.53 Leakage current
IBUS_PAS_rec
6.1.54 pull-up resistance 6.1.55 output current
Rslave IBUS
Normal mode Spec (Par. Sleep mode
13.5
6.1.56 Input Capacitance 6.1.57 Propagation delay Dominant Recessive High 6.1.58 Receiver delay symmetry
Dynamic Transceiver Characteristics: BUS1, BUS2 Spec (Par. CRxD Spec (Par. trx_sym trx_pdf- trx_pdr; CRxD
trx_pdf trx_pdr trx_sym
6.1.59 Delay time mode Change 6.1.60 TxD1 Setup time mode selection 6.1.61 dominant time 6.1.62 dominant time recovery time
tMODE tTXD,SET ttimeout ttorec
Figure Figure Figure Figure
VTxD
6.1.63 toggling enter flash tfl1 mode 6.1.64 TxD1 time flash activation tfl2 tfl3 tfl4
Figure Figure
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Electrical Characteristics Table Electrical Characteristics (cont'd)
voltages with respect ground; positive current flowing into pin; unless otherwise specified. Pos. Parameter Symbol Limit Values Min. 6.1.65 Duty cycle (for worst case kBit/s) 0.396 Typ. Max. duty cycle THRec(max) 0.744 THDom(max) =0.581 tbit tbus_rec(min)/2 tbit; Spec (Par. duty cycle THRec(min)= 0.422 THDom(min)= 0.284 tbit tbus_rec(max)/2 tbit; Spec (Par. duty cycle THRec(max) 0.778 THDom(max) =0.616 tbit 96µs; tbus_rec(min)/2 tbit; Spec (Par. duty cycle THRec(min) 0.389 THDom(min) =0.251 tbit 96µs; tbus_rec(max)/2 tbit; Spec (Par. Unit Remarks
6.1.66 Duty cycle (for worst case kBit/s)
0.581
6.1.67 Duty cycle (for worst case 10.4 kBit/s) Slope Mode
0.417
6.1.68 Duty cycle (for worst case 10.4 kBit/s) Slope Mode
0.590
subject production test, specified design Minimum limit specified design Maximum limit specified design
VBUS_CNT (Vth_dom rec)/2; VHYS VBUSrec VBUSdom
load concerning Spec 2.1: Load CBUS RBUS Load CBUS RBUS Load CBUS RBUS
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Electrical Characteristics
Diagrams
INH1 TxD1
RBus
RxD1
CRxD
Bus1 INH2
CBus
RBus
TxD2 Bus2 RxD2
CBus
CRxD
Figure
Simplified test circuit dynamic characteristics
INH1 TxD1 RxD1
RBus
Bus1 INH2
CRxD
CBus
RBus
TxD2 Bus2 RxD2
CBus
CRxD
Figure
Simplified test circuit static characteristics
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Electrical Characteristics
(input transmitting node)
tBit
tBit
tBit
tBus_dom(max)
tBus_rec(min)
VSUP
THRec(max) THDom(max) THRec(min) THDom(min)
Thresholds receiving node Thresholds receiving node
(Transceiver supply transmitting node)
tBus_dom(min)
tBus_rec(max)
(output receiving node
trx_pdf(1)
trx_pdr(1)
(output receiving node
trx_pdr(2)
trx_pdf(2)
Duty Cycle tBUS_rec(min) tBIT) Duty Cycle tBUS_rec(max) tBIT)
Figure Timing diagram dynamic characteristics
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Application Information
Application Information
Robustness according IEC61000-4-2
Test robustness according IEC61000-4-2 "Gun test" (150 have been performed. results test conditions available separate test report. Table Robustness according IEC61000-4-2 Result Unit Remarks
Performed Test Electrostatic discharge voltage BUS1 BUS2 versus Electrostatic discharge voltage BUS1 BUS2 versus
Positive pulse Negative pulse Positive pulse Negative pulse
Electrostatic discharge voltage versus Electrostatic discharge voltage versus
susceptibility "ESD GUN" according Test Specification, Section 4.3. (IEC 61000-4-2) -Tested external test house (IBEE Zwickau, Testreport 05-06-06).
Compatibility Single Transceivers
Twin Transceiver TLE7269G function compatible Single Transceivers like TLE7259G, TLE7259-2GE derivative TLE7259-2GU. TLE7269G supply. This supply usually connected power supply external microcontroller. TLE7259G TLE7259-2GE/U don't have pin. order provide same functions TLE7259G TLE72592GE/GU, these transceiver need external pull-up resistor between microcontroller supply.
RxD1 TxD1 TxD2 RxD2
INH1 BUS1 BUS2 INH2
TLE7269G
Figure Data Sheet
TLE7259G TLE7259-2GE TLE7259-2GU other single transceivers
configuration TLE7269G TLE7259G, TLE7259-2GE/GU Rev. 1.2, 2007-11-13
TLE7269G
Application Information
Master Termination
achieve required timings dominant recessive transition signal additional external termination resistor mandatory. recommended place this resistor master node. avoid reverse currents from line into battery supply line recommended place diode series with external pull-up. small systems (low capacitance) performance system supported additional capacitor least master node (see Figure Figure 18).The values Master Termination resistor capacitance influence performance network. They depend number nodes inside network parasitic cable capacitances wiring.
External Capacitors
capacitor supply voltage input buffers input voltage. combination with required reverse polarity diode this prevents device from detecting power down conditions case negative transients supply line (see Figure Figure 18). capacitor close capacitor close TLE7269G required best performance.
Data Sheet
Rev. 1.2, 2007-11-13
TLE7269G
Application Information
VBat
Application Example
BUS1 BUS2
Master Node Bus1 Bus2
e.g. TLE4678
TLE7269G
INH1 INH2
3.3V
RxD1 TxD1 RxD2 TxD2 Micro Controller XC22xx
BUS1 BUS2
ECU1
Slave Node Bus1 Bus2
e.g. TLE4678
TLE7269G
INH1 INH2
3.3V
N.C.
RxD1 TxD1 RxD2 TxD2 Micro Controller XC22xx
BUS1 BUS2
Figure Data Sheet
Simplified Application Circuit with Short Feature applied Rev. 1.2, 2007-11-13
TLE7269G
Application Information
VBat
Master Node Bus1 Bus2
BUS1 BUS2 N.C.
e.g. TLE4678
TLE7269G
INH1 INH2
3.3V
RxD1 TxD1 RxD2 TxD2 Micro Controller XC22xx
BUS1 BUS2
ECU1
Slave Node Bus1 Bus2
e.g. TLE4678
TLE7269G
INH1
3.3V
N.C.
INH2
RxD1 TxD1 RxD2 TxD2 Micro Controller XC22xx
BUS1 BUS2
Figure Data Sheet
Simplified application Circuit without Short Feature Rev. 1.2, 2007-11-13
TLE7269G
Package Outlines
Package Outlines
GPS09032
Figure
PG-DSO-14 (Plastic Dual Small Outline PG-DSO-14-24)
Green Product (RoHS compliant) meet world-wide customer requirements environmentally friendly products compliant with government regulations device available green product. Green products RoHS-Compliant (i.e Pb-free finish leads suitable Pb-free soldering according IPC/JEDEC J-STD-020).
further information alternative packages, please visit website: Data Sheet
Dimensions Rev. 1.2, 2007-11-13
Edition 2007-11-13 Published Infineon Technologies 81726 Munich, Germany 2007 Infineon Technologies Rights Reserved. Legal Disclaimer information given this document shall event regarded guarantee conditions characteristics. With respect examples hints given herein, typical values stated herein and/or information regarding application device, Infineon Technologies hereby disclaims warranties liabilities kind, including without limitation, warranties non-infringement intellectual property rights third party. Information further information technology, delivery terms conditions prices, please contact nearest Infineon Technologies Office (www.infineon.com). Warnings technical requirements, components contain dangerous substances. information types question, please contact nearest Infineon Technologies Office. Infineon Technologies components used life-support devices systems only with express written approval Infineon Technologies, failure such components reasonably expected cause failure that life-support device system affect safety effectiveness that device system. Life support devices systems intended implanted human body support and/or maintain sustain and/or protect human life. they fail, reasonable assume that health user other persons endangered.
TLE7269G
Revision History
Revision
Revision History
Date 2007-10-02 Changes Data Sheet created
Data Sheet
Rev. 1.2, 2007-11-13

TLE7269G Twin Transceiver Automotive Power TLE7269G

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