minimum output clamp voltage output current (all outputs simultaneousl

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minimum output clamp voltage output current (all outputs simultaneousl

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A6B595 8-Bit Serial-Input DMOS Power Driver
minimum output clamp voltage output current (all outputs simultaneously) typical rDS(on) power consumption Replacement TPIC6B595N TPIC6B595DW
A6B595 combines 8-bit CMOS shift register accompanying data latches, control circuitry, DMOS power driver outputs. Power driver applications include relays, solenoids, other medium-current high-voltage peripheral power loads. serial-data input, CMOS shift register latches allow direct interfacing with microprocessor-based systems. Serialdata input rates over MHz. with require appropriate pull-up resistors ensure input logic high.
Packages:
CMOS serial-data output enables cascade connections applications requiring additional drive lines. Similar devices with reduced rDS(on) available A6595. A6B595 DMOS open-drain outputs capable sinking output drivers disabled (the DMOS sink drivers turned off) OUTPUT ENABLE input high. Copper lead frames, reduced supply current requirements, on-state resistance allow both devices sink from outputs continuously, ambient temperatures over 85°C. A6B595 furnished 20-pin dual in-line plastic package 20-pin wide-body, small-outline plastic package (SOICW) with gull-wing leads. (lead) free versions (suffix have 100% matte leadframe plating.
18-pin package)
20-pin SOICW package)
scale
Functional Block Diagram
Grounds (terminals must connected together externally.
26185.122G
A6B595
Selection Guide
Part Number
A6B595KA-T A6B595KLWTR-T
8-Bit Serial-Input DMOS Power Driver
Package
18-pin 20-pin SOICW
Packing
pieces tube 1000 pieces reel
Absolute Maximum Ratings
Characteristic Logic Supply Voltage Output Voltage Input Voltage Range Output Drain Current Single-Pulse Avalanche Energy Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Symbol TJ(max) Tstg Range Continuous; each output, outputs Peak; pulse duration duty cycle Notes Rating -0.3 Units
Caution: These CMOS devices have input static protection (Class still susceptible damage exposed extremely high static electrical charges.
Thermal Characteristics
Characteristic
Package Thermal Resistance
Symbol
Test Conditions*
Package 1-layer with copper limited solder pads Package 1-layer with copper limited solder pads
Value Units
*Additional thermal information available Allegro website
ALLOWABLE PACKAGE POWER DISSIPATION WATTS
AMBIENT TEMPERATURE
Dwg. GS-004A
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A6B595
8-Bit Serial-Input DMOS Power Driver
PIN-OUT DIAGRAM
CONNECTION LOGIC SUPPLY SERIAL DATA REGISTER CLEAR OUTPUT ENABLE GROUND CONNECTION GROUND SERIAL DATA CLOCK STROBE GROUND
Dwg. PP-029-12
Note that package (DIP) package (SOIC) electrically identical share common terminal number assignment.
TERMINAL DESCRIPTIONS
Terminal 14-17 Terminal Name LOGIC SUPPLY SERIAL DATA OUT0-3 CLEAR OUTPUT ENABLE GROUND GROUND STROBE CLOCK OUT4-7 SERIAL DATA GROUND Function internal connection. (VDD) logic supply voltage (typically Serial-data input shift-register. Current-sinking, open-drain DMOS output terminals. When (active) low, registers cleared (set low). When (active) low, output drivers enabled; when high, output drivers turned (blanked). Reference terminal output voltage measurements (OUT0-3). Reference terminal output voltage measurements (OUT0-7). Data strobe input terminal; shift register data latched rising edge. Clock input terminal data shift rising edge. Current-sinking, open-drain DMOS output terminals. CMOS serial-data output following shift register. Reference terminal input voltage measurements. internal connection.
NOTE Grounds (terminals must connected together externally.
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A6B595
LOGIC INPUTS
8-Bit Serial-Input DMOS Power Driver
DMOS POWER DRIVER OUTPUT
SERIAL DATA
RECOMMENDED OPERATING CONDITIONS
over operating temperature range Logic Supply Voltage Range, High-Level Input Voltage, 0.85VDD Low-level input voltage, 0.15VDD
TRUTH TABLE
Shift Register Contents Data Clock Input Input Serial Data Output Strobe Logic Level High Logic Level Irrelevant Latch Contents Output Enable Output Contents
Present State
Previous State
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A6B595
8-Bit Serial-Input DMOS Power Driver
ELECTRICAL CHARACTERISTICS +25°C, (unless otherwise specified).
Limits Characteristic Output Breakdown Voltage Off-State Output Current Static Drain-Source On-State Resistance Symbol V(BR)DSX IDSX Test Conditions 125°C 125°C (see note) Nominal Output Current Logic Input Current SERIAL-DATA Output Voltage Prop. Delay Time Output Rise Time Output Fall Time Supply Current tPLH tPHL IDD(OFF) IDD(ON) IDD(fclk) VDS(on) 85°C Outputs Outputs fclk MHz, Outputs Min. Typ. 0.15 4.49 0.005 Max. -1.0 Units
rDS(on)
Typical Data design information only. NOTE Pulse test, duration duty cycle
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A6B595
8-Bit Serial-Input DMOS Power Driver
TIMING REQUIREMENTS SPECIFICATIONS
(Logic Levels Ground)
Data Active Time Before Clock Pulse (Data Set-Up Time), tsu(D) Data Active Time After Clock Pulse (Data Hold Time), th(D) Clock Pulse Width, tw(CLK) Time Between Clock Activation Strobe, tsu(ST) Strobe Pulse Width, tw(ST) Output Enable Pulse Width, tw(OE) NOTE Timing representative 12.5 clock. Higher speeds attainable.
Serial data present input transferred shift register rising edge CLOCK input pulse. succeeding CLOCK pulses, registers shift data information towards SERIAL DATA OUTPUT. Information present register transferred respective latch rising edge STROBE input pulse (serial-to-parallel conversion). When OUTPUT ENABLE input high, output source drivers disabled (OFF). information stored latches affected OUTPUT ENABLE input. With OUTPUT ENABLE input low, outputs controlled state their respective latches.
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A6B595
8-Bit Serial-Input DMOS Power Driver
TEST CIRCUITS
LOGIC SYMBOL
V(BR)DSX tAV/2 Single-Pulse Avalanche Energy Test Circuit Waveforms
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A6B595
8-Bit Serial-Input DMOS Power Driver
Package 18-Pin
22.86 ±0.51 +0.10 0.25 -0.05 +0.76 6.35 -0.25 +0.38 10.92 -0.25 7.62
5.33 +0.51 3.30 -0.38 2.54 +0.25 1.52 -0.38 0.46 ±0.12
SEATING PLANE
dimensions nominal, tooling (reference JEDEC MS-001 Dimensions inches Dimensions exclusive mold flash, gate burrs, dambar protrusions Exact case lead configuration supplier discretion within limits shown Terminal mark area
Package 20-Pin SOICW
12.80±0.20 +0.07 0.27 -0.06 2.25
7.50±0.10
10.30±0.33 +0.44 0.84 -0.43
9.50
0.25
0.65
Layout Reference View
1.27
0.10 0.41 ±0.10 1.27
SEATING PLANE 2.65 0.20 ±0.10 Reference Only Dimensions millimeters (Reference JEDEC MS-013 Dimensions exclusive mold flash, gate burrs, dambar protrusions Exact case lead configuration supplier discretion within limits shown
SEATING PLANE GAUGE PLANE
Terminal mark area
Reference layout (reference SOIC127P1030X265-20M)
pads minimum 0.20 from adjacent pads; adjust necessary meet application process requirements layout tolerances
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A6B595
8-Bit Serial-Input DMOS Power Driver
Copyright ©1999-2009, Allegro MicroSystems, Inc. products described here manufactured under more U.S. patents U.S. patents pending. Allegro MicroSystems, Inc. reserves right make, from time time, such departures from detail specifications required permit improvements performance, reliability, manufacturability products. Before placing order, user cautioned verify that information being relied upon current. Allegro's products used life support devices systems, failure Allegro product reasonably expected cause failure that life support device system, affect safety effectiveness that device system. information included herein believed accurate reliable. However, Allegro MicroSystems, Inc. assumes responsibility use; infringement patents other rights third parties which result from use. latest version this document, visit website: www.allegromicro.com
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com

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