Wide bandwidth gain gain Slew rate: 2000 full power bandwidth, p-p, Fa

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Wide bandwidth gain gain Slew rate: 2000 full power bandwidth, p-p, Fa

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2000 Monolithic AD844
Wide bandwidth gain gain Slew rate: 2000 full power bandwidth, p-p, Fast settling: 0.1% step) Differential gain error: 0.03% Differential phase error: 0.16° offset voltage: maximum Grade) quiescent current: Available tape reel accordance with EIA-481-A standard
NULL VIEW (Not Scale)
AD844
NULL OUTPUT
00897-001
Figure 8-Lead PDIP 8-Lead CERDIP Packages
OFFSETNULL
OFFSETNULL OUTPUT
APPLICATIONS
Flash input amplifiers High speed current interfaces Video buffers cable drivers Pulse amplifiers
CONNECT
Figure 16-Lead SOIC Package
GENERAL DESCRIPTION
AD844 high speed monolithic operational amplifier fabricated using Analog Devices, Inc., junction isolated complementary bipolar (CB) process. combines high bandwidth very fast large signal response with excellent performance. Although optimized current-to-voltage applications inverting mode amplifier, also suitable many noninverting applications. AD844 used place traditional amps, current feedback architecture results much better performance, high linearity, exceptionally clean pulse response. This type provides closed-loop bandwidth that determined primarily feedback resistor almost independent closed-loop gain. AD844 free from slew rate limitations inherent traditional amps other current-feedback amps. Peak output rate change over 2000 full output step. Settling time typically 0.1%, essentially independent gain. AD844 drive loads ±2.5 with distortion short-circuit protected AD844 available four performance grades three package options. 16-lead SOIC (RW) package, AD844J specified commercial temperature range 70°C.
AD844A AD844B specified industrial temperature range -40°C +85°C available CERDIP package. AD844A also available 8-lead PDIP (N). AD844S specified over military temperature range -55°C +125°C. available 8-lead CERDIP package. grade chips devices processed MIL-STD-883B, Rev. also available.
PRODUCT HIGHLIGHTS
AD844 versatile, cost component providing excellent combination performance. essentially free from slew rate limitations. Rise fall times essentially independent output level. AD844 operated from ±4.5 power supplies capable driving loads down well driving very large capacitive loads using external network. offset voltage input bias currents AD844 laser trimmed minimize errors; drift typically V/°C bias current drift typically nA/°C. AD844 exhibits excellent differential gain differential phase characteristics, making suitable variety video applications with bandwidths MHz. AD844 combines distortion, noise, drift with wide bandwidth, making outstanding input amplifier flash analog-to-digital converters (ADCs).
Rev.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. Specifications subject change without notice. license granted implication otherwise under patent patent rights Analog Devices. Trademarks registered trademarks property their respective owners.
Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1989-2009 Analog Devices, Inc. rights reserved.
00897-002
VIEW (Not Scale)
AD844
AD844 TABLE CONTENTS
Features Applications Functional Block Diagrams General Description Product Highlights Revision History Specifications. Absolute Maximum Ratings. Metallization Photograph Caution Typical Performance Characteristics Inverting Gain-of-1 Characteristics Inverting Gain-of-10 Characteristics Inverting Gain-of-10 Pulse Response Noninverting Gain-of-10 Characteristics Understanding AD844 Open-Loop Behavior Response Inverting Amplifier Response Converter Circuit Description AD844 Response Noninverting Amplifier. Noninverting Gain Using AD844 Board Layout Input Impedance Driving Large Capacitive Loads Settling Time Error Calculation Noise Video Cable Driver Using Supplies High Speed Buffer Variable Gain Amplifier Outline Dimensions Ordering Guide
REVISION HISTORY
2/09-Rev. Updated Format Universal Changes Features Section. Changes Differential Phase Error Parameter, Table Changes Figure Changes Figure Changes Figure Figure Changes Figure High Speed Buffer Section Updated Outline Dimensions Changes Ordering Guide 1/03 Data Sheet changed from REV. REV. Updated Features Edit Edits Figure Figure Updated Outline Dimensions 11/01 Data Sheet changed from REV. REV. Edits Specifications Edits Absolute Maximum Ratings Edits Ordering Guide
Rev. Page
AD844 SPECIFICATIONS
25°C unless otherwise noted. Table
Parameter INPUT OFFSET VOLTAGE TMIN TMAX Temperature Supply Initial TMIN TMAX Common Mode Initial TMIN TMAX INPUT BIAS CURRENT Negative Input Bias Current1 TMIN TMAX Temperature Supply Initial TMIN TMAX Common Mode Initial TMIN TMAX Positive Input Bias Current1 TMIN TMAX Temperature Supply Initial TMIN TMAX Common Mode Initial TMIN TMAX INPUT CHARACTERISTICS Input Resistance Negative Input Positive Input Input Capacitance Negative Input Positive Input Input Common-Mode Voltage Range INPUT VOLTAGE NOISE INPUT CURRENT NOISE Negative Input Positive Input OPEN-LOOP TRANSRESISTANCE TMIN TMAX Transcapacitance DIFFERENTIAL GAIN ERROR DIFFERENTIAL PHASE ERROR2 Conditions AD844J/AD844A nA/V nA/V nA/V nA/V 1300 nA/V nA/V nA/°C nA/V nA/V 1100 1900 2500 nA/°C AD844B AD844S Unit V/°C
1500
nV/Hz pV/Hz pV/Hz Degree
VOUT 0.03 0.16
Rev. Page
0.03 0.16
0.03 0.16
AD844
Parameter FREQUENCY RESPONSE Small Signal Bandwidth Gain Gain TOTAL HARMONIC DISTORTION SETTLING TIME Output Step Gain 0.1%5 Gain -10, 0.1% Output Step Gain 0.1%5 Gain -10, 0.1%6 OUTPUT SLEW RATE FULL POWER BANDWIDTH VOUT p-p5 VOUT p-p5 OUTPUT CHARACTERISTICS Voltage Short-Circuit Current TMIN Output Resistance POWER SUPPLY Operating Range Quiescent Current TMIN TMAX
Conditions
AD844J/AD844A
AD844B
AD844S
Unit
kHz, supplies
0.005
0.005
0.005
supplies 2000
2000
2000
Overdriven input
1200
1200
1200
Open loop ±4.5
±4.5
±4.5
Rated performance after minute warm-up 25°C. Input signal carrier IRE) riding IRE) ramp. gain input signal dBm, Figure gain -10, input signal dBm, Figure Figure Figure
Rev. Page
AD844 ABSOLUTE MAXIMUM RATINGS
Table
Parameter Supply Voltage Power Dissipation1 Output Short-Circuit Duration Input Common-Mode Voltage Differential Input Voltage Inverting Input Current Continuous Transient Storage Temperature Range Storage Temperature Range Lead Temperature (Soldering, sec) Rating
METALLIZATION PHOTOGRAPH
Ratings Indefinite -65°C +150°C -65°C +125°C 300°C 1000
Contact factory latest dimensions. Dimensions shown inches (millimeters).
NULL NULL
0.076 (1.9)
28-lead PDIP package: 90°C/W. 8-lead CERDIP package: 110°C/W. 16-lead SOIC package: 100°C/W.
0.095 (2.4) SUBSTRATE CONNECTED OUTPUT
00897-003
Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions above those indicated operational section this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
Figure Photograph
CAUTION
Rev. Page
AD844 TYPICAL PERFORMANCE CHARACTERISTICS
25°C unless otherwise noted.
25°C
-3dB BANDWIDTH (MHz)
INPUT VOLTAGE
00897-004
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
Figure Bandwidth Supply Voltage,
Figure Noninverting Input Voltage Swing Supply Voltage
25°C
HARMONIC DISTORTION (dB)
-100 -110 SECOND HARMONIC -120 -130 THIRD HARMONIC
00897-005
OUTPUT VOLTAGE
100k
SUPPLY VOLTAGE (±V)
INPUT FREQUENCY (Hz)
Figure Harmonic Distortion Input Frequency,
SUPPLY CURRENT (mA)
Figure Output Voltage Swing Supply Voltage
TRANSRESISTANCE
±15V
00897-006
TEMPERATURE (°C)
TEMPERATURE (-°C)
Figure Transresistance Temperature
Figure Quiescent Supply Current Temperature Supply Voltage
Rev. Page
00897-009
00897-008
00897-007
AD844
±15V
INPUT BIAS CURRENT (µA)
-3dB BANDWIDTH (MHz)
00897-010
TEMPERATURE (°C)
TEMPERATURE (-°C)
Figure Inverting Input Bias Current (IBN) Noninverting Input Bias Current (IBP) Temperature
Figure Bandwidth Temperature, Gain
OUTPUT IMPEDANCE
SUPPLIES
100k
FREQUENCY (Hz)
100M
Figure Output Impedance Frequency, Gain
00897-011
0.01
Rev. Page
00897-012
AD844
INVERTING GAIN-OF-1 CHARACTERISTICS
0.22µF
AD844
0.22µF
OUTPUT
00897-013
20ns
Figure Inverting Amplifier, Gain
Figure Large Signal Pulse Response, Gain
500nV
GAIN (dB)
20ns
100M
00897-014
100k
FREQUENCY (Hz)
Figure Small Signal Pulse Response, Gain
Figure Gain Frequency Gain
-180
-210
PHASE (Degrees)
-240
-270 -300
FREQUENCY (MHz)
Figure Phase Frequency Gain
00897-015
-330
Rev. Page
00897-017
00897-016
AD844
INVERTING GAIN-OF-10 CHARACTERISTICS
0.22µF
-210 -180
PHASE (Degrees)
00897-018
-240
AD844
0.22µF
OUTPUT
-270
-300
FREQUENCY (MHz)
Figure Gain Amplifier
Figure Phase Frequency, Gain
GAIN (dB)
100M
FREQUENCY (Hz)
Figure Gain Frequency, Gain
00897-019
100k
Rev. Page
00897-020
-330
AD844
INVERTING GAIN-OF-10 PULSE RESPONSE
500nV
00897-021
00897-022
20ns
20ns
Figure Large Signal Pulse Response, Gain -10,
Figure Small Signal Pulse Response, Gain -10,
Rev. Page
AD844
NONINVERTING GAIN-OF-10 CHARACTERISTICS
0.22µF
100ns
OUTPUT
AD844
0.22µF
00897-023 00897-026
Figure Noninverting Gain Amplifier
Figure Noninverting Amplifier Large Signal Pulse Response, Gain +10,
200nV 50ns
GAIN (dB)
00897-027
100M
FREQUENCY (Hz)
Figure Gain Frequency, Gain
-180
00897-024
100k
Figure Small Signal Pulse Response, Gain +10,
-210
PHASE (Degrees)
-240
-270
-300
FREQUENCY (MHz)
Figure Phase Frequency, Gain
00897-025
-330
Rev. Page
AD844 UNDERSTANDING AD844
AD844 used ways similar conventional while providing performance advantages wideband applications. However, there important differences internal structure that need understood optimize performance AD844 amp.
RESPONSE INVERTING AMPLIFIER
Figure shows connections inverting amplifier. Unlike conventional amplifier, transient response small signal bandwidth determined primarily value external feedback resistor, rather than ratio R1/R2 customarily case application. This direct result impedance inverting input. with conventional amps, closed-loop gain -R1/R2. closed-loop transresistance parallel Because generally range about closed-loop transresistance only 0.02% 0.07% lower than This small error often less than resistor tolerance. When fairly large (above still much less than closed-loop response dominated time constant Under such conditions, AD844 overdamped provides only fraction bandwidth potential. Because absence slew rate limitations under these conditions, circuit exhibits simple single-pole response even under large signal conditions. Figure used properly terminate input desired. parallel with gives terminated resistance. lowered, signal bandwidth increases, time constant becomes comparable higher order poles closedloop response. Therefore, closed-loop response becomes complex, pulse response shows overshoot. When much larger than input resistance, RIN, most feedback current delivered this input, becomes comparable RIN, less feedback absorbed resulting more heavily damped response. Consequently, values possible lower without causing instability closed-loop response. Table lists combinations resulting frequency response circuit Figure Figure shows very clean fast pulse response AD844.
OPEN-LOOP BEHAVIOR
Figure shows current feedback amplifier reduced essentials. Sources fixed errors, such inverting node bias current offset voltage, excluded from this model. most important parameter limiting gain transresistance, which ideally infinite. finite value analogous finite open-loop voltage gain conventional amp. current applied inverting input node replicated current conveyor flow Resistor voltage developed across buffered unity gain voltage follower. Voltage gain ratio Rt/RIN. With typical values voltage gain about 60,000. open-loop current gain, another measure gain that determined beta product transistors voltage follower stage (see Figure 31), typically 40,000.
00897-028
Figure Equivalent Schematic
important parameters defining behavior transcapacitance, external feedback resistor (not shown). time constant formed these components analogous dominant pole conventional thus cannot reduced below critical value closed-loop system stable. practice, held value possible (typically that feedback resistor maximized while maintaining fast response. finite also affects closed-loop response some applications. open-loop gain also best understood terms transimpedance rather than open-loop voltage gain. open-loop pole formed parallel with Because typically open-loop corner frequency occurs about kHz. However, this parameter little value determining closed-loop response.
OPTIONAL
AD844
VOUT
00897-029
Figure Inverting Amplifier
Rev. Page
AD844
Table Gain Bandwidth
Gain -100 (MHz) (MHz)
ISIG
AD844
VOUT
00897-030
Figure Current-to-Voltage Converter
CIRCUIT DESCRIPTION AD844
simplified schematic shown Figure AD844 differs from conventional that signal inputs have radically different impedance. noninverting input (Pin presents usual high impedance. voltage this input transferred inverting input (Pin with offset voltage, ensured close matching like polarity transistors operating under essentially identical bias conditions. Laser trimming nulls residual offset voltage, down tens microvolts. inverting input common emitter node complementary pair grounded base stages behaves current summing node. ideal current feedback amp, input resistance zero. AD844, about current applied inverting input transferred complementary pair unity-gain current mirrors that deliver same current internal node (Pin which full output voltage generated. unity-gain complementary voltage follower then buffers this voltage provides load driving power. This buffer designed drive impedance loads, such terminated cables, deliver into load while maintaining distortion, even when operating supply voltages only Current limiting (not shown) ensures safe operation under short-circuited conditions.
RESPONSE CONVERTER
AD844 works well active element operational current-to-voltage converter, used conjunction with external scaling resistor, Figure This analysis includes stray capacitance, current source, which high speed DAC. Using conventional amp, this capacitance forms nuisance pole with that destabilizes closed-loop response system. Most amps internally compensated fastest response unity gain, pole reduces already narrow phase margin system. example, places this pole frequency about MHz, well within response range even medium speed operational amplifier. current feedback amp, this nuisance pole longer determined input resistance, RIN. Because this about AD844, same forms pole causes little trouble. shown that response this system
VOUT
where: factor very close unity represents finite gain amplifier. dominant pole. nuisance pole.
OUTPUT
KR1Ct RINCS (assuming Using typical values 0.9997; other words, gain error only 0.03%. This much less than scaling error virtually DACs absorbed, necessary, trim needed precise system. AD844, fairly stable with temperature supply voltages, consequently effect finite gain negligible unless high value feedback resistors used. Because that results slower response times than possible, relatively value AD844 rarely significant source error.
Rev. Page
00897-031
Figure Simplified Schematic
AD844
important understand that input impedance inverting input locally generated does depend feedback. This very different from virtual ground conventional operational amplifier used current summing mode, which essentially open circuit until loop settles. AD844, transient current input does cause voltage spikes summing node while amplifier settling. Furthermore, transient current delivered slewing (TZ) node (Pin short signal path (the grounded base stages wideband current mirrors). current available charge capacitance (about node always proportional input error current, slew rate limitations associated with large signal response amps occur. this reason, rise fall times almost independent signal level. practice, input current eventually causes mirrors saturate. When using supplies, this occurs about ±2200 V/s). Because signal currents rarely this large, classical slew rate limitations absent. This inherent advantage lost voltage follower used buffer output slew rate limitations. AD844 designed avoid this problem, result, output buffer exhibits clean large signal transient response, free from anomalous effects arising from internal saturation.
NONINVERTING GAIN
AD844 provides very clean pulse response high noninverting gains. Figure shows typical configuration providing gain with high input resistance. feedback resistor kept practicable maximize bandwidth, peaking capacitor (CPK) optionally added further extend bandwidth. Figure shows small signal response with supply voltages either Gain bandwidth products achieved this way. offset voltage AD844 laser trimmed level exhibits very drift. practice, there additional offset term bias current inverting input (IBN), which flows feedback resistor (R1). This optionally nulled trimming potentiometer shown Figure
OFFSET TRIM
0.22µF
RESPONSE NONINVERTING AMPLIFIER
Because current feedback amplifiers asymmetrical with regard their inputs, performance differs markedly noninverting inverting modes. noninverting modes, large signal high speed behavior AD844 deteriorates gains because biasing circuitry input system (not shown Figure designed provide high input voltage slew rates. However, good results obtained with some care. noninverting input does tolerate large transient input; must kept below best results. Consequently, this mode better suited high gain applications (greater than Figure shows noninverting amplifier with gain bandwidth MHz. transient response shown Figure Figure increase bandwidth higher gains, capacitor added across whose value approximately (R1/R2)
4.99
AD844
0.22µF
00897-032
Figure Noninverting Amplifier Gain 100, Optional Offset Trim Shown
±15V
GAIN (dB)
FREQUENCY (Hz)
Figure Response Gain 100, Configuration Shown Figure
Rev. Page
00897-040
100k
AD844 USING AD844
BOARD LAYOUT
with high frequency circuits considerable care must used layout components surrounding AD844. ground plane, which power supply decoupling capacitors connected shortest possible leads, essential achieving clean pulse response. Even continuous ground plane exhibits finite voltage drops between points plane, this must kept mind when selecting grounding points. general, decoupling capacitors should taken point close load output connector) because load currents flow these capacitors high frequencies. circuits (for example, termination resistor must taken common point ground plane close amplifier package. impedance 0.22 capacitors (AVX SR305C224KAA equivalent) wherever coupling required. Include either ferrite beads and/or small series resistance (approximately each supply line.
AD844
VOUT
22pF
Figure Feedforward Network Large Capacitive Loads
00897-034
INPUT IMPEDANCE
frequencies, negative feedback keeps resistance inverting input close zero. frequency increases, impedance looking into this input increases from near zero open-loop input resistance, bandwidth limitations, making input seem inductive. desired keep input impedance flatter, series network inserted across input. resistor chosen that parallel equals desired termination resistance. capacitance that pole determined this network about half bandwidth amp. This network important input resistor much larger than termination used, frequencies relatively low. some cases, small peaking that occurs without network extending bandwidth.
500ns
Figure Driving 1000 with Feedforward Network Figure
SETTLING TIME
Settling time measured with circuit Figure This circuit employs false summing node, clamped Schottky diodes, create error signal limit input signal oscilloscope. measuring settling time, ratio R6/R5 equal R1/R2. unity gain, gain -10, used because summing network loads output with approximately Using this network unity-gain configuration, settling time 0.1% step with
SCOPE (TEK 7A11 PROBE)
DRIVING LARGE CAPACITIVE LOADS
Capacitive drive capability without external network. With addition network shown Figure capacitive drive extended over 10,000 limited internal power dissipation. With capacitive loads, output speed becomes function overdriven output current limit. Because this roughly ±100 under these conditions, maximum slew rate into 1000 load ±100 V/s. Figure shows transient response inverting amplifier using feedforward network shown Figure driving load 1000
AD844
VOUT
00897-035
00897-036
NOTES IN6263 EQUIVALENT SCHOTTKY DIODE.
Figure Settling Time Test Fixture
Rev. Page
AD844
ERROR CALCULATION
Figure shows model error noise sources AD844. inverting input bias current, IBN, flows feedback resistor. IBP, noninverting input bias current, flows resistance (RP), resulting voltage (plus offset voltage) appears inverting input. total error, output Because unrelated both sign magnitude, inserting resistor series with noninverting input does necessarily reduce error actually increase
2.2µF 2.2µF
00897-038
VOUT
Figure AD844 Cable Driver
HP8753A NETWORK ANALYZER
HP11850C SPLITTER
CIRCUIT UNDER TEST
VOUT
TRIG SYNC HP3314A STAIRCASE GENERATOR
(TERMINATOR)
Figure Differential Gain/Phase Test Setup
7.14mV
DIFFERENTIAL PHASE (Degrees)
AD844
00897-037
Figure Offset Voltage Noise Model AD844
-0.1
NOISE
Noise sources modeled manner similar bias currents, noise sources INN, INP, amplifier induced noise output, VON,
-0.2
R1)2
0.06 0.04
DIFFERENTIAL GAIN
VOUT (IRE)
Figure Differential Phase Circuit Figure
7.14mV
Overall noise reduced keeping resistor values minimum. With typical numbers, nV/Hz, pA/Hz, pA/Hz, calculates nV/Hz. current noise dominant this case, because most gain applications.
0.02
VIDEO CABLE DRIVER USING SUPPLIES
AD844 used drive impedance cables. Using supplies, load driven ±2.5 with distortion. Figure shows illustrative application that provides noninverting gain allowing cable reverse-terminated while delivering overall gain load. bandwidth this circuit typically MHz. Figure shows differential gain phase test setup. video applications, differential-phase differential-gain characteristics often important. Figure shows variation phase load voltage varies. Figure shows gain variation.
-0.02
-0.04
VOUT (IRE)
Figure Differential Gain Circuit Figure
Rev. Page
00897-041
-0.06
00897-040
-0.3
00897-039
AD844
+15V (VCC)
+15V 0.22µF* 0.22µF*
REFCOM -15V (VEE) IBPO IOUT
0.22µF* 0.22µF* -15V
DIGITAL INPUTS
AD568
AD844
VOUT ANALOG SUPPLY GROUND
ACOM LCOM SPAN SPAN THCOM 100pF
GROUND DIGITAL SUPPLY
*POWER SUPPLY BYPASS CAPACITORS.
Figure High Speed Amplifier
HIGH SPEED BUFFER
AD844 performs very well applications requiring currentto-voltage conversion. Figure shows connections with AD568 current output DAC. this application, bipolar offset used that full-scale current ±5.12 which generates output ±5.12 using application resistor AD568. Figure shows full-scale transient response. Care needed power supply decoupling grounding techniques achieve full 12-bit accuracy realize fast settling capabilities system. AD568 data sheet should consulted more complete details about use.
VARIABLE GAIN AMPLIFIER
AD844 excellent choice output amplifier AD539 multiplier, connection modes. (See AD539 data sheet full details.) Figure shows simple multiplier providing output:
VXVY
00897-042
VIEW (Not Scale)
where gain control input, positive voltage from (maximum), signal voltage, nominally full scale capable operation ±4.2 peak output this configuration thus ±6.7 Using four internal application resistors provided AD539 parallel results feedback resistance which value bandwidth AD844 about MHz, essentially independent gain 3.16
0.22µF
0.22µF
15µA
50ns
00897-043
INPUTS
Figure Amplifier Full-Scale Transient Response
AD539
VIEW (Not Scale)
AD844
OUTPUT -VXVY
INPUT
0.22µF
0.22µF
INPUTS OPTIONALLY TERMINATED; TYPICALLY USING RESISTOR GROUND.
Figure Using AD539
Rev. Page
00897-044
15µA
AD844
Figure shows small signal response gain control range 3.16 small values capacitive feedthrough board becomes troublesome very careful layout techniques needed minimize this problem. ground strip between pins AD539 helpful this regard. Figure shows response pulse these results, load resistor used supplies were multiplier operates from supplies between ±4.5 ±16.5 Disconnecting AD539 alters denominator Equation bandwidth approximately MHz, with maximum gain Using only results denominator bandwidth MHz, maximum gain
3.15V 1.0V
GAIN (dB)
0.316V 0.10V 0.032V
FREQUENCY (Hz)
Figure Response
50ns
00897-046
Figure Transient Response with
Rev. Page
00897-045
100k
AD844 OUTLINE DIMENSIONS
0.400 (10.16) 0.365 (9.27) 0.355 (9.02)
0.280 (7.11) 0.250 (6.35) 0.240 (6.10)
0.100 (2.54) 0.210 (5.33) 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14)
0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.060 (1.52) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92)
0.015 (0.38) SEATING PLANE 0.005 (0.13)
0.015 (0.38) GAUGE PLANE 0.430 (10.92)
0.014 (0.36) 0.010 (0.25) 0.008 (0.20)
COMPLIANT JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS INCHES; MILLIMETER DIMENSIONS PARENTHESES) ROUNDED-OFF INCH EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN. CORNER LEADS CONFIGURED WHOLE HALF LEADS.
Figure 8-Lead Plastic Dual-in-Line Package [PDIP] (N-8) Dimensions shown inches (millimeters)
0.005 (0.13)
0.055 (1.40)
0.310 (7.87) 0.220 (5.59)
0.100 (2.54) 0.405 (10.29) 0.200 (5.08) 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) SEATING PLANE 0.015 (0.38) 0.008 (0.20) 0.320 (8.13) 0.290 (7.37)
CONTROLLING DIMENSIONS INCHES; MILLIMETER DIMENSIONS PARENTHESES) ROUNDED-OFF INCH EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN.
Figure 8-Lead Ceramic Dual In-Line Package [CERDIP] (Q-8) Dimensions shown inches (millimeters)
Rev. Page
070606-A
AD844
10.50 (0.4134) 10.10 (0.3976)
7.60 (0.2992) 7.40 (0.2913)
10.65 (0.4193) 10.00 (0.3937)
1.27 (0.0500) 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122)
2.65 (0.1043) 2.35 (0.0925)
0.75 (0.0295) 0.25 (0.0098)
0.33 (0.0130) 0.20 (0.0079)
SEATING PLANE
1.27 (0.0500) 0.40 (0.0157)
COMPLIANT JEDEC STANDARDS MS-013- CONTROLLING DIMENSIONS MILLIMETERS; INCH DIMENSIONS PARENTHESES) ROUNDED-OFF MILLIMETER EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN.
Figure 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown millimeters (inches)
ORDERING GUIDE
Model AD844AN AD844ANZ AD844ACHIPS AD844AQ AD844BQ AD844JR-16 AD844JR-16-REEL AD844JR-16-REEL7 AD844JRZ-161 AD844JRZ-16-REEL1 AD844JRZ-16-REEL71 AD844SCHIPS AD844SQ AD844SQ/883B 5962-8964401PA
Temperature Range -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C 70°C 70°C 70°C 70°C 70°C 70°C -55°C +125°C -55°C +125°C -55°C +125°C -55°C +125°C
Package Description 8-Lead Plastic Dual In-Line Package [PDIP] 8-Lead Plastic Dual In-Line Package [PDIP] 8-Lead Ceramic Dual In-Line Package [CERDIP] 8-Lead Ceramic Dual In-Line Package [CERDIP] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead SOIC_W, Tape Reel 16-Lead SOIC_W, Tape Reel 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead SOIC_W, Tape Reel 16-Lead SOIC_W, Tape Reel 8-Lead Ceramic Dual In-Line Package [CERDIP] 8-Lead Ceramic Dual In-Line Package [CERDIP] 8-Lead Ceramic Dual In-Line Package [CERDIP]
032707-B
Package Option RW-16 RW-16 RW-16 RW-16 RW-16 RW-16
RoHS Compliant Part. Refer DESC drawing tested specifications.
©1989-2009 Analog Devices, Inc. rights reserved. Trademarks registered trademarks property their respective owners. D00897-0-2/09(F)
Rev. Page

Wide bandwidth gain gain Slew rate: 2000 full power bandwidth, p-p, Fa

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