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PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A Family Silicon Er
Top Searches for this datasheetPIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A Family Silicon Errata Data Sheet Clarification PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A family devices that have received conform functionally current Device Data Sheet (DS70592A), except anomalies described this document. silicon issues discussed following pages silicon revisions with Device Revision listed Table silicon issues summarized Table errata described this document will addressed future revisions PIC24HJ64GPX06A/X08A/ X10A PIC24HJ128GPX06A/X08A/X10A silicon. Note: This document summarizes silicon errata issues from revisions silicon, previous well current. Only issues indicated last column Table apply current silicon revision (A4). example, identify silicon revision level using MPLAB conjunction with MPLAB PICkit3: Using appropriate interface, connect device MPLAB programmer/debugger PICkit From main menu MPLAB IDE, select Configure>Select Device, then select target part number dialog box. Select MPLAB hardware tool (Debugger>Select Tool). Perform "Connect" operation device (Debugger>Connect). Depending development tool used, part number Device Revision value appear Output window. Note: unable extract silicon revision level, please contact your local Microchip sales office assistance. Data Sheet clarifications corrections start page following discussion silicon issues. silicon revision level identified using current version MPLAB® Microchip's programmers, debuggers emulation tools, which available Microchip corporate site (www.microchip.com). Device Revision values various PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A silicon revisions shown Table TABLE SILICON DEVREV VALUES Part Number Device ID(1) 0x0041 0x0047 0x0049 0x004B 0x005D 0x005F 0x0065 0x0067 0x0061 0x0063 0x3009 0x300A Revision Silicon Revision(2) PIC24HJ64GP206A PIC24HJ64GP210A PIC24HJ64GP506A PIC24HJ64GP510A PIC24HJ128GP206A PIC24HJ128GP210A PIC24HJ128GP306A PIC24HJ128GP310A PIC24HJ128GP506A PIC24HJ128GP510A Note Device Revision (DEVID DEVREV) located last implemented addresses program memory. Refer "dsPIC33F/PIC24H Flash Programming Specification" (DS70152) detailed information Device Revision your specific device. 2009 Microchip Technology Inc. DS80468B-page PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A TABLE Module ECAN SILICON ISSUE SUMMARY Feature Sleep Mode Item Number Issue Summary WAKIF CxINTF register cannot cleared software instruction after device interrupted from Sleep activity bus. baud clock signal BCLK present only when module transmitting. When UART mode (BRGH using Stop bits (STSEL sample first Stop instead second one. UART error interrupt occur, occur incorrect time, multiple errors occur during short period time. When module configured 10-bit addressing using same address bits (A10 other devices, bits work expected. After ACKSTAT when receiving NACK, cleared reception Start Stop bit. 10-bit slave does flag load I2CxRCV register address match Least Significant bits (LSbs) address same 7-bit reserved addresses. When module configured 10-bit slave with address 0x102, I2CxRCV register content lower address byte 0x01 rather than 0x02. framed mode, when FRMDLY (SPIxCON2<1>) cleared (SPIxCON1<9>) cleared, frame sync pulses generated. When VREGS (RCON<8>) logic `0', device Reset higher sleep current observed. address error trap occurs certain addressing modes when accessing first four bytes page. EXCH instruction does execute correctly enabled. Writing SPIxBUF register soon cleared will cause module ignore written data. ECAN module transmit Buffer data Buffer data queued transmission first. UART module will generate back-to-back Break characters. SDO1 toggle while device being programmed PGECx/PGEDx pairs. Affected Revisions(1) UART UART Mode High-Speed Mode Interrupts UART I2C 10-bit Addressing Mode 10-bit Addressing Mode 10-bit Addressing Mode Frame Mode Internal Voltage Regulator Operations ECAN UART EXCH Instruction Transmit Operation Transmission Queuing Break Character Generation SDO1 Note Only those issues indicated last column apply current silicon revision. DS80468B-page 2009 Microchip Technology Inc. PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A Silicon Errata Issues Note: This document summarizes silicon errata issues from revisions silicon, previous well current. Only issues indicated shaded column following tables apply current silicon revision (A4). Module: UART When UART mode (BRGH using Stop bits (STSEL sample first Stop instead second one. This issue does affect other UART configurations. Work around baud rate option (BRGH adjust baud rate accordingly. Affected Silicon Revisions Module: ECAN WAKIF CxINTF register cannot cleared software instruction after device interrupted from Sleep activity bus. When device wakes from Sleep activity, ECAN module placed operational mode. ECAN Event interrupt occurs WAKIF flag. Trying clear flag Interrupt Service Routine (ISR) clear flag. WAKIF being will cause repetitive Interrupt Service Routine execution. Work around Although WAKIF does clear, device Sleep ECAN Wake function continue work expected. ECAN event enabled, will enter Interrupt Service Routine WAKIF flag getting set. application maintain secondary flag, which tracks device Sleep Wake events. Affected Silicon Revisions Module: UART UART error interrupt occur, occur incorrect time, multiple errors occur during short period time. Work around Read error flags UxSTA register whenever byte received verify error status. most cases, these bits will correct, even UART error interrupt fails occur. Affected Silicon Revisions Module: there devices bus, them acting Master receiver other Slave transmitter. both devices configured 10-bit addressing mode, have same value bits their addresses, then when Slave select address sent from Master, both Master Slave acknowledge When Master sends read operation, both Master Slave enter into Read mode both them transmit data. resultant data will ANDing transmissions. Work around devices, addresses well bits should different. Affected Silicon Revisions Module: UART When UART configured interface operations (UxMODE<9:8> 11), baud clock signal BCLK present only when module transmitting. idle other times. Work around Configure output compare modules generate required baud clock signal when UART receiving data Idle state. Affected Silicon Revisions 2009 Microchip Technology Inc. DS80468B-page PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A Module: When module operating either Master Slave mode, after ACKSTAT when receiving NACK, cleared reception Start Stop bit. Work around Store value ACKSTAT immediately after receiving NACK. Affected Silicon Revisions Module: framed mode, when FRMDLY (SPIxCON2<1>) cleared (SPIxCON1<9>) cleared, frame sync pulses generated. Work around None. Affected Silicon Revisions Module: 10-bit Addressing mode, some address matches flag load receive register I2CxRCV lower address byte matches reserved addresses. particular, these include addresses with form XX0000XXXX XX1111XXXX, with following exceptions: 001111000X 011111001X 101111010X 111111011X Module: Internal Voltage Regulator When VREGS (RCON<8>) logic `0', device Reset higher sleep current observed. Work around Ensure VREGS (RCON<8>) logic device Sleep mode operation. Affected Silicon Revisions Work around Ensure that lower address byte 10-bit Addressing mode does match 7-bit reserved addresses. Affected Silicon Revisions Module: Operations address error trap occurs certain addressing modes when accessing first four bytes page. This only occurs when using following addressing modes: MOV.D Register Indirect Addressing (word byte mode) with pre/post-decrement Work around perform accesses first four bytes using above addressing modes. applications using language, MPLAB version 3.11 higher, provides following command-line switch that implements work around erratum. -merrata=psv_trap Refer readme.txt file MPLAB v3.11 tool suite further details. Affected Silicon Revisions Module: When module configured 10-bit slave with address 0x102, I2CxRCV register content lower address byte 0x01 rather than 0x02; however, module acknowledges both address bytes. Work around None. Affected Silicon Revisions DS80468B-page 2009 Microchip Technology Inc. PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A Module: EXCH instruction does execute correctly enabled. Work around writing source code assembly, recommended work around replace: EXCH Wsource, Wdestination with: PUSH Wdestination Wsource, Wdestination Wsource using MPLAB compiler, specify compiler option: -merrata=exch (Project Build Options Projects MPLAB Alternate Settings). Affected Silicon Revisions Module: ECAN ECAN module transmit Buffer data Buffer data queued transmission first. This problem specific transmit Buffers only. Work around issue fixed setting reserved CiCTRL1 register Note that module reset value this zero. Affected Silicon Revisions Module: UART UART module will generate consecutive break characters. Trying perform back-toback Break character transmission will cause UART module transmit dummy character used generate first Break character instead transmitting second Break character. Break characters generated correctly they followed non-Break character transmission. Work around None. Affected Silicon Revisions Module: Writing SPIxBUF register soon cleared will cause module ignore written data. Applications which with will affected this erratum. Work around After cleared, wait minimum duration Clock before writing SPIxBUF register. Alternatively, following: Poll wait before writing SPIxBUF register. Poll Interrupt flag wait before writing SPIxBUF register. Interrupt Service Routine. DMA. Affected Silicon Revisions Module: While device being programmed PGECx/ PGEDx pair, device with SDO1 functionality start toggling. Work around None. Affected Silicon Revisions 2009 Microchip Technology Inc. DS80468B-page PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A Data Sheet Clarifications following typographic corrections clarifications noted latest version device data sheet (DS70592A): Note: Corrections shown bold. Where possible, original bold text formatting been removed clarity. data sheet clarifications this time. DS80468B-page 2009 Microchip Technology Inc. PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A APPENDIX REVISION HISTORY Document (4/2009) Initial release this document; issued revision silicon. Includes silicon issues (ECAN), (UART), (I2C), (SPI), (Internal Voltage Regulator), (PSV Operations), (CPU), (SPI) (ECAN). Document (8/2009) Added silicon issue (UART) (I/O). 2009 Microchip Technology Inc. DS80468B-page PIC24HJ64GPX06A/X08A/X10A PIC24HJ128GPX06A/X08A/X10A NOTES: DS80468B-page 2009 Microchip Technology Inc. Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable." Code protection constantly evolving. Microchip committed continuously improving code protection features products. Attempts break Microchip's code protection feature violation Digital Millennium Copyright Act. such acts allow unauthorized access your software other copyrighted work, have right relief under that Act. Information contained this publication regarding device applications like provided only your convenience superseded updates. your responsibility ensure that your application meets with your specifications. MICROCHIP MAKES REPRESENTATIONS WARRANTIES KIND WHETHER EXPRESS IMPLIED, WRITTEN ORAL, STATUTORY OTHERWISE, RELATED INFORMATION, INCLUDING LIMITED CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY FITNESS PURPOSE. Microchip disclaims liability arising from this information use. Microchip devices life support and/or safety applications entirely buyer's risk, buyer agrees defend, indemnify hold harmless Microchip from damages, claims, suits, expenses resulting from such use. licenses conveyed, implicitly otherwise, under Microchip intellectual property rights. Trademarks Microchip name logo, Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC UNI/O registered trademarks Microchip Technology Incorporated U.S.A. other countries. FilterLab, Hampshire, HI-TECH Linear Active Thermistor, MXDEV, MXLAB, SEEVAL Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock ZENA trademarks Microchip Technology Incorporated U.S.A. other countries. SQTP service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2009, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved. Printed recycled paper. Microchip received ISO/TS-16949:2002 certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona; Gresham, Oregon design centers California India. Company's quality system processes procedures PIC® MCUs dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory analog products. addition, Microchip's quality system design manufacture development systems 9001:2000 certified. 2009 Microchip Technology Inc. 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