Rail-to-Rail Gain Bandwidth Product: (typical) Supply Current: (t

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Rail-to-Rail Gain Bandwidth Product: (typical) Supply Current: (t

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MCP6231/1R/1U/2/4
Rail-to-Rail
Gain Bandwidth Product: (typical) Supply Current: (typical) Supply Voltage: 1.8V 6.0V Rail-to-Rail Input/Output Extended Temperature Range: -40°C +125°C Available 5-Pin SC70 SOT-23 packages
Description
Microchip Technology Inc. MCP6231/1R/1U/2/4 operational amplifiers amps) provide wide bandwidth quiescent current. MCP6231/1R/ 1U/2/4 family gain bandwidth product 65°C (typical) phase margin. This family operates from single supply voltage 1.8V, while drawing (typical) quiescent current. addition, MCP6231/1R/1U/2/4 family supports rail-to-rail input output swing, with common mode input voltage range These amps designed Microchip's advanced CMOS processes.
Applications
Automotive Portable Equipment Transimpedance amplifiers Analog Filters Notebooks PDAs Battery-Powered Systems
Package Types
MCP6231 SOT-23-5
VOUT
MCP6231 MSOP, PDIP, SOIC
VIN- VIN- VIN+ VOUT
Design Aids
SPICE Macro Models FilterLab® Software MindiCircuit Designer Simulator Microchip Advanced Part Selector (MAPS) Analog Demonstration Evaluation Boards Application Notes
VIN+
MCP6231R SOT-23-5
VOUT VIN+
MCP6232 MSOP, PDIP, SOIC
VOUTA VINA_ VOUTB VINB_ VINB+
Typical Application
VIN2 VIN1 MCP6231 VOUT
VIN-
VINA+
MCP6231U SC70-5, SOT-23-5
VIN+ VIN-
MCP6232 TDFN
VOUTA VINA_ VOUTB VINB_ VINB+
VOUT VINA+
MCP6231
VIN- VIN+
MCP6234 PDIP, SOIC, TSSOP
VOUTA VINA- VINA+ VINB+ VINB- VOUTB VOUTD VIND- VIND+ VINC+ VOUTC
VOUT
Summing Amplifier Circuit
Includes Exposed Thermal (EP); Table 3-1.
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ELECTRICAL CHARACTERISTICS
Notice: Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability. Section 4.1.2 "Input Voltage Current Limits".
Absolute Maximum Ratings
.7.0V Current Analog Input Pins (VIN+, VIN-).±2 Analog Inputs (VIN+, VIN-) 1.0V 1.0V Other Inputs Outputs 0.3V 0.3V Difference Input Voltage |VDD VSS| Output Short Circuit Current Continuous Current Output Supply Pins .±30 Storage Temperature -65°C +150°C Maximum Junction Temperature (TJ). .+150°C Protection Pins (HBM; 300V
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VDD/2 VOUT VDD/2. Parameters Input Offset Input Offset Voltage Extended Temperature Input Offset Drift with Temperature Power Supply Rejection Ratio Input Bias Current Impedance Input Bias Current: Temperature Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Range Common Mode Rejection Ratio Open-Loop Gain Open-Loop Gain (large signal) Output Maximum Output Voltage Swing Output Short-Circuit Current Power Supply Supply Voltage Quiescent Current Amplifier Note 0.5V VOL, 0.5V Input Overdrive 1.8V 5.5V VOUT 0.3V 0.3V, VCMR CMRR -0.3V 5.3V, ZDIFF ±1.0 1100 ±1.0 1013||6 1013||3 ||pF ||pF +85°C +125°C VOS/TA PSRR -5.0 -7.0 ±3.0 +5.0 +7.0 µV/°C -40°C +125°C, (Note -40°C +125°C, Units Conditions
SC70 package only tested +25°C. parts with date codes February 2007 later have been screened ensure operation 6.0V. However, other minimum maximum specifications measured 1.8V 5.5V
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ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, +25°C, +1.8 5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Parameters Response Gain Bandwidth Product Phase Margin Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density µVP-P nV/Hz fA/Hz GBWP 0.15 V/µs Units Conditions
TEMPERATURE CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, +1.8V +5.5V GND. Parameters Temperature Ranges Extended Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SC70 Thermal Resistance, 5L-SOT-23 Thermal Resistance, 8L-DFN Thermal Resistance, 8L-MSOP Thermal Resistance, 8L-TDFN Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note: 84.5 °C/W °C/W °C/W °C/W °C/W °C/W °C/W °C/W °C/W °C/W +125 +125 +150 Note Units Conditions
internal Junction Temperature (TJ) must exceed Absolute Maximum specification +150°C.
Test Circuits
VDD/2 VOUT MCP623X VOUT
test circuits used tests shown Figure Figure 1-1. bypass capacitors laid according rules discussed Section "PCB Surface Leakage".
MCP623X
FIGURE 1-2: Test Circuit Most Inverting Gain Conditions.
VDD/2
FIGURE 1-1: Test Circuit Most Non-Inverting Gain Conditions.
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Note:
TYPICAL PERFORMANCE CURVES
graphs tables provided following this note statistical summary based limited number samples provided informational purposes only. performance characteristics listed herein tested guaranteed. some graphs tables, data presented outside specified operating range (e.g., outside specified power supply range) therefore outside warranted range.
Note: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
CMRR, PSRR (dB) Input Offset Voltage (mV) Ambient Temperature (°C) CMRR (VCM -0.3V +5.3V, 5.0V)
Percentage Occurrences
Samples
PSRR (VCM VSS)
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4: Temperature.
Open-Loop Gain (dB)
CMRR, PSRR Ambient
PSRR, CMRR (dB)
1.E+01 1.E+02 1.E+03 1.E+04 1.E+05
Phase
Gain
-120 -150 -180
CMRR PSRR+
Frequency (Hz)
100k
-210 1.E+ 1.E- 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 100k 1.E+ 1.E+ Frequency (Hz)
FIGURE 2-2: Frequency.
PSRR, CMRR
FIGURE 2-5: Frequency.
Open-Loop Gain, Phase
Percentage Occurrences
Percentage Occurrences
Samples VDD/2 +85°C
Samples VDD/2 +125°C
Input Bias Current (pA)
Input Bias Current (nA)
FIGURE 2-3:
Input Bias Current +85°C.
FIGURE 2-6: +125°C.
Input Bias Current
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Open-Loop Phase
PSRR-
VDD/2
MCP6231/1R/1U/2/4
Note: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
1,000 Input Noise Voltage Density (nV/Hz) Percentage Occurrences
Samples -40°C +125°C
100k 1.E-01 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 Frequency (Hz)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-7: Frequency.
Input Offset Voltage (µV) -0.4 -0.2
Input Noise Voltage Density
FIGURE 2-10:
Input Offset Voltage Drift.
-40°C +25°C +85°C +125°C
Input Offset Voltage (µV)
1.8V
-100 -150 -200 -250 -300 1.8V
5.5V
Output Voltage
Common Mode Input Voltage
FIGURE 2-8: Input Offset Voltage Common Mode Input Voltage 1.8V.
Input Offset Voltage (µV) -100 -150 -200 -0.5 Common Mode Input Voltage
FIGURE 2-11: Output Voltage.
Input Offset Voltage
+125°C +85°C +25°C -40°C
Output Short-Circuit Current (mA)
+ISC
+125°C +85°C +25°C -40°C -ISC
Power Supply Voltage
FIGURE 2-9: Input Offset Voltage Common Mode Input Voltage 5.5V.
FIGURE 2-12: Output Short-Circuit Current Ambient Temperature.
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Note: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
0.30 0.25 0.20 0.15 0.10 Rising Edge 0.05 Ambient Temperature (°C) 1.8V Falling Edge
Output Voltage mV/div)
5.5V
Slew Rate (V/µs)
Time µs/div)
FIGURE 2-13: Temperature.
1,000 Output Voltage Headroom (mV)
Slew Rate Ambient
FIGURE 2-16: Pulse Response.
Small-Signal, Non-Inverting
5.0V
1.E-02
100µ 1.E-01 1.E+00 Output Current Magnitude
1.E+01
Output Voltage
Time µs/div)
FIGURE 2-14: Output Voltage Headroom Output Current Magnitude.
Max. Output Voltage Swing (VP-P
FIGURE 2-17: Pulse Response.
Quiescent Current Amplifier (µA)
Large-Signal, Non-Inverting
0.9VDD
5.5V 1.8V
+125°C +85°C +25°C -40°C
1.E+03
100k 1.E+04 1.E+05 Frequency (Hz)
1.E+06
Power Supply Voltage
FIGURE 2-15: Maximum Output Voltage Swing Frequency.
FIGURE 2-18: Quiescent Current Power Supply Voltage.
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1.E-02 1.E-03 1.E-04 100µ 1.E-05 1.E-06 100n 1.E-07 1.E-08 1.E-09 100p 1.E-10 1.E-11 1.E-12 Input Current Magnitude
Input, Output Voltages -1.0 Time ms/div) VOUT 5.0V
+125°C +85°C +25°C -40°C
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 Input Voltage
FIGURE 2-19: Measured Input Current Input Voltage (below VSS).
FIGURE 2-20: MCP6231/1R/1U/2/4 Show Phase Reversal.
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DESCRIPTIONS
Descriptions pins listed Table (single amps) Table (dual quad amps).
TABLE 3-1:
FUNCTION TABLE SINGLE AMPS
MCP6231R SOT-23-5 MCP6231U SOT-23-5 SC70 Symbol VOUT VIN- VIN+ Description Analog Output Inverting Input Non-inverting Input Positive Power Supply Negative Power Supply Internal Connection Exposed Thermal (EP); must connected VSS.
MCP6231 DFN, MSOP, PDIP, SOIC SOT-23-5
TABLE 3-2:
MCP6232 MSOP, PDIP, SOIC, TDFN
FUNCTION TABLE DUAL QUAD AMPS
MCP6234 Symbol PDIP, SOIC, TSSOP VOUTA VINA- VINA+ VINB+ VINB- VOUTB VOUTC VINC- VINC+ VIND+ VIND- VOUTD Analog Output Inverting Input Non-inverting Input Positive Power Supply Non-inverting Input Inverting Input Analog Output Analog Output Inverting Input Non-inverting Input Negative Power Supply Non-inverting Input Inverting Input Analog Output Exposed Thermal (EP); must connected VSS. Typically, these parts used single (positive) supply configuration. this case, connected ground connected supply. will need bypass capacitors. Description
Analog Outputs
output pins low-impedance voltage sources.
Analog Inputs
non-inverting inverting inputs high-impedance CMOS inputs with bias currents.
Exposed Thermal (EP)
Power Supply (VSS VDD)
positive power supply (VDD) 1.8V 6.0V higher than negative power supply (VSS). normal operation, other pins between VDD.
There internal electrical connection between Exposed Thermal (EP) pin; they must connected same potential Printed Circuit Board (PCB).
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APPLICATION INFORMATION
Bond MCP6231/1R/1U/2/4 family amps manufactured using Microchip's state-of-the-art CMOS process specifically designed low-cost, low-power general-purpose applications. supply voltage, quiescent current wide bandwidth makes MCP6231/1R/1U/2/4 ideal battery-powered applications.
VIN+ Bond
Input Stage
Bond
4.1.1
Rail-to-Rail Inputs
PHASE REVERSAL
Bond
MCP6231/1R/1U/2/4 designed prevent phase reversal when input pins exceed supply voltages. Figure shows input voltage exceeding supply voltage without phase reversal.
Input, Output Voltages -1.0 Time ms/div) VOUT
FIGURE 4-2: Structures.
Simplified Analog Input
5.0V
order prevent damage and/or improper operation these amps, circuit they must limit currents voltages VIN+ VIN- pins (see Absolute Maximum Ratings beginning Section "Electrical Characteristics"). Figure shows recommended approach protecting these inputs. internal diodes prevent input pins (VIN+ VIN-) from going below ground, resistors limit possible current drawn input pins. Diodes prevent input pins (VIN+ VIN-) from going above VDD, dump currents onto VDD. When implemented shown, resistors also limit current through MCP623X
FIGURE 4-1: MCP6231/1R/1U/2/4 Show Phase Reversal. 4.1.2 INPUT VOLTAGE CURRENT LIMITS
protection inputs depicted shown Figure 4-2. This structure chosen protect input transistors, minimize input bias current (IB). input diodes clamp inputs when they more than diode drop below VSS. They also clamp voltages that above VDD; their breakdown voltage high enough allow normal operation, enough bypass quick events within specified limits.
(minimum expected (minimum expected
FIGURE 4-3: Inputs.
Protecting Analog
also possible connect diodes left resistors this case, current through diodes needs limited some other mechanism. resistors then serve in-rush current limiters; current into input pins (VIN+ VIN-) should very small.
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Recommended RISO
significant amount current flow inputs when common mode voltage (VCM) below ground (VSS); Figure 2-19. Applications that high impedance need limit usable voltage range.
10,000
4.1.3
NORMAL OPERATION
1,000 100p 1000 10000 Normalized Load Capacitance; CL/GN
input stage MCP6231/1R/1U/2/4 amps differential CMOS input stages parallel. operates common mode input voltage (VCM), while other operates high VCM. WIth this topology, device operates with 0.3V above 0.3V below VSS.
Rail-to-Rail Output
FIGURE 4-5: Recommended RISO Values Capacitive Loads.
After selecting RISO your circuit, double-check resulting frequency response peaking step response overshoot. Evaluation bench simulations with MCP6231/1R/1U/2/4 SPICE macro model very helpful. Modify RISO's value until response reasonable.
output voltage range MCP6231/1R/1U/2/4 amps (maximum) (minimum) when connected VDD/2 5.5V. Refer Figure 2-14 more information.
Capacitive Loads
Driving large capacitive loads cause stability problems voltage feedback amps. load capacitance increases, feedback loop's phase margin decreases closed-loop bandwidth reduced. This produces gain peaking frequency response, with overshoot ringing step response. unity-gain buffer most sensitive capacitive loads, gains show same general behavior. When driving large capacitive loads with these amps (e.g., when +1), small series resistor output (RISO Figure 4-4) improves feedback loop's phase margin (stability) making output load resistive higher frequencies. bandwidth will generally lower than bandwidth with capacitive load.
Supply Bypass
With this amp, power supply (VDD single-supply) should have local bypass capacitor (i.e., 0.01 within good high-frequency performance. bulk capacitor (i.e., larger) within provide large, slow currents. This bulk capacitor shared with other nearby analog parts.
Unused Amps
MCP623X
RISO VOUT
unused quad package (MCP6234) should configured shown Figure 4-6. Both circuits prevent output from toggling causing crosstalk. Circuit reference voltage between supplies, provides buffered voltage minimizes supply current draw unused amp. Circuit minimizes number components, draw little more supply current unused amp. MCP6234 MCP6234 VREF
FIGURE 4-4: Output resistor, RISO stabilizes large capacitive loads.
Figure gives recommended RISO values different capacitive loads gains. x-axis normalized load capacitance (CL/GN), where circuit's noise gain. non-inverting gains, signal gain equal. inverting gains, |Signal Gain| (e.g., gives V/V).
FIGURE 4-6:
Unused Amps.
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Surface Leakage
4.7.1
Application Circuits
MATCHING IMPEDANCE INPUTS
applications where input bias current critical, Printed Circuit Board (PCB) surface leakage effects need considered. Surface leakage caused humidity, dust other contamination board. Under humidity conditions, typical resistance between nearby traces 1012. difference would cause current flow, which greater than MCP6231/1R/1U/2/4 family's bias current +25°C typical). easiest reduce surface leakage guard ring around sensitive pins traces). guard ring biased same voltage sensitive pin. example this type layout shown Figure 4-7. VIN- VIN+
minimize effect input bias current amplifier circuit (this important very high sourceimpedance applications, such meters transimpedance amplifiers), impedances inverting non-inverting inputs need matched. This done choosing circuit resistor values that total resistance each input same. Figure shows summing amplifier circuit.
VIN2 VIN1 MCP623X VOUT
Guard Ring
FIGURE 4-8:
Summing Amplifier Circuit.
FIGURE 4-7: Inverting Gain.
Example Guard Ring Layout
Non-inverting Gain Unity-Gain Buffer: Connect non-inverting (VIN+) input with wire that does touch surface. Connect guard ring inverting input (VIN-). This biases guard ring common mode input voltage. Inverting Gain Transimpedance Amplifiers (convert current voltage, such photo detectors): Connect guard ring non-inverting input (VIN+). This biases guard ring same reference voltage (e.g., VDD/2 ground). Connect inverting (VIN-) input with wire that does touch surface.
match inputs, voltage sources ground calculate total resistance input nodes. this summing amplifier circuit, resistance inverting input calculated setting VIN1, VIN2 VOUT ground. this case, RG1, parallel. total resistance inverting input
EQUATION 4-1:
Where: RVIN- total resistance inverting input
non-inverting input, only voltage source. When ground, both parallel. total resistance non-inverting input
EQUATION 4-2:
Where: RVIN+ total resistance inverting input
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minimize output offset voltage increase circuit accuracy, resistor values need meet conditions:
EQUATION 4-3:
4.7.2
COMPENSATING PARASITIC CAPACITANCE
analog circuit design, parasitic capacitance compromise circuit behavior; Figure shows typical scenario. input amplifier sees parasitic capacitance several picofarad (CPARA, which includes common mode capacitance typical), large frequency response circuit will include zero. This parasitic zero introduces gain-peaking cause circuit instability.
MCP623X VOUT
CPARA
PARA
FIGURE 4-9: Effect Parasitic Capacitance Input.
solution smaller resistor values push zero higher frequency. Another solution compensate introducing pole point which zero occurs. This done adding parallel with feedback resistor (RF). needs selected that ratio CPARA:CF equal ratio RF:RG.
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DESIGN AIDS
Microchip provides basic design tools needed MCP6231/1R/1U/2/4 family amps.
Analog Demonstration Evaluation Boards
SPICE Macro Model
latest SPICE macro model MCP6231/1R/ 1U/2/4 amps available Microchip site www.microchip.com. This model intended initial design tool that works well amp's linear region operation over temperature range. model file information capabilities. Bench testing very important part design cannot replaced with simulations. Also, simulation results using this macro model need validated comparing them data sheet specifications characteristic curves.
Microchip offers broad spectrum Analog Demonstration Evaluation Boards that designed help achieve faster time market. complete listing these boards their corresponding user's guides technical information, visit Microchip site www.microchip.com/analogtools boards that especially useful are: SOIC8EV: 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board SOIC14EV: 14-Pin SOIC/TSSOP/DIP Evaluation Board
Application Notes
FilterLab® Software
Microchip's FilterLab® software innovative software tool that simplifies analog active filter (using amps) design. Available cost from Microchip site www.microchip.com/filterlab, FilterLab design tool provides full schematic diagrams filter circuit with component values. also outputs filter circuit SPICE format, which used with macro model simulate actual filter performance.
following Microchip Application Notes available Microchip site www.microchip. com/appnotes recommended supplemental reference resources. ADN003: "Select Right Operational Amplifier your Filtering Circuits", DS21821 AN722: "Operational Amplifier Topologies Specifications", DS00722 AN723: "Operational Amplifier Specifications Applications", DS00723 AN884: "Driving Capacitive Loads With Amps", DS00884 AN990: "Analog Sensor Conditioning Circuits Overview", DS00990 These application notes others listed design guide: "Signal Chain Design Guide", DS21825
MindiCircuit Designer Simulator
Microchip's MindiCircuit Designer Simulator aids design various circuits useful active filter, amplifier power-management applications. free online circuit designer simulator available from Microchip site www.microchip.com/mindi. This interactive circuit designer simulator enables designers quickly generate circuit diagrams, simulate circuits. Circuits developed using Mindi Circuit Designer Simulator downloaded personal computer workstation.
Microchip Advanced Part Selector (MAPS)
MAPS software tool that helps semiconductor professionals efficiently identify Microchip devices that particular design requirement. Available cost from Microchip site www.microchip.com/ maps, MAPS overall selection tool Microchip's product portfolio that includes Analog, Memory, MCUs DSCs. Using this tool define filter sort features parametric search devices export side-by-side technical comparison reports. Helpful links also provided Data sheets, Purchase, Sampling Microchip parts.
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PACKAGING INFORMATION
Package Marking Information
5-Lead SC70 (MCP6231U Only) Example:
XXNN
AS25
5-Lead SOT-23
Example: Device MCP6231 MCP6231R MCP6231U
Code BJNN BKNN BLNN
XXNN
BJ25
Note:
Applies 5-Lead SOT-23.
8-Lead (MCP6231)
Example:
8-Lead TDFN (MCP6232)
Example:
8-Lead MSOP XXXXXX YWWNNN
Example: 6232E 929256
Legend: XX.X
Note:
Customer-specific information Year code (last digit calendar year) Year code (last digits calendar year) Week code (week January week `01') Alphanumeric traceability code Pb-free JEDEC designator Matte (Sn) This package Pb-free. Pb-free JEDEC designator found outer packaging this package.
event full Microchip part number cannot marked line, will carried over next line, thus limiting number available characters customer-specific information.
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Package Marking Information (Continued)
8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCP6232 E/P256 0929 MCP6232 0929
8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW
Example: MCP6232 E/SN0929 MCP6232E 0929
14-Lead PDIP (300 mil) (MCP6234)
Example:
XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN
MCP6234 E/P^^ 0929256
14-Lead SOIC (150 mil) (MCP6234)
Example:
XXXXXXXXXX XXXXXXXXXX YYWWNNN
MCP6234 E/SL^^ 0929256
14-Lead TSSOP (MCP6234)
Example:
XXXXXXXX YYWW
6234E 0929
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APPENDIX REVISION HISTORY
Revision (March 2005)
following list modifications: Added MCP6234 quad amp. Corrected plots Section "Typical Performance Curves". Added Section "Pin Descriptions". Added SC-70 package markings. Added PDIP-14, SOIC-14, TSSOP-14 packages corrected package marking information (Section "Packaging Information"). Added Appendix "Revision History".
Revision (August 2009)
following list modifications: Added TDFN package MCP6232. Updated package information MCP6231. Updated "Temperature Characteristics" table. Updated Section "Pin Descriptions". Updated Package Outline Drawings Section "Packaging Information". Updated Product Identification Systems section.
Revision (August 2004)
Undocumented changes.
Revision (May 2008)
following list modifications: Changed Heading "Available Tools" "Design Aids". Design Aids: Name change Mindi Simulator Tool. Package Types: Added MCP6231 Device. Absolute Maximum Ratings: Numerous changes this section. Updated notes Section "Electrical Characteristics". Added Test Circuits Section "Electrical Characteristics". Corrected Figure 2-7. Added Figure 2-19. Numerous changes Section "Pin Descriptions". Added Section 4.1.1 "Phase Reversal", Section 4.1.2 "Input Voltage Current Limits", Section 4.1.3 "Normal Operation". Replaced Section "Design Aids" with additional information. Updated Section "Packaging Information" with updated Package Outline Drawings.
Revision (March 2004)
Original Release this Document.
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PRODUCT IDENTIFICATION SYSTEM
order obtain information, e.g., pricing delivery, refer factory listed sales office. PART Device Tape Reel and/or Alternate Pinout Examples: MCP6231-E/MC: Extended Temperature package. MCP6231-E/MS: Extended Temperature MSOP package. MCP6231UT-E/LT: Tape Reel, Extended Temperature SC70 package. MCP6231-E/P: Extended Temperature PDIP package. MCP6231RT-E/OT: Tape Reel, Extended Temperature SOT-23 package MCP6231UT-E/OT: Tape Reel, Extended Temperature SOT-23. MCP6231-E/SN: Extended Temperature SOIC package. MCP6232-E/SN: Extended Temperature SOIC package. MCP6232-E/MS: Extended Temperature MSOP package. MCP6232-E/P: Extended Temperature PDIP package. MCP6232T-E/SN: Tape Reel, Extended Temperature SOIC package. MCP6232T-E/MNY: Tape Reel, Extended Temperature TDFN package. Extended Temperature 14LD PDIP package. Extended Temperature 14LD SOIC package. Extended Temperature, 14LD TSSOP package Tape Reel, Extended Temperature 14LD SOIC package. Tape Reel, Extended Temperature 14LD TSSOP package.
Temperature Package Range
Device:
MCP6231: MCP6231T: MCP6231RT: MCP6231UT: MCP6232: MCP6232T: MCP6234: MCP6234T:
Single (MSOP, PDIP, SOIC) Single (Tape Reel) (MSOP, SOIC, SOT-23) Single (Tape Reel) (SOT-23) Single (Tape Reel) (SC70, SOT-23, TDFN) Dual Dual (Tape Reel) (MSOP, SOIC) Quad Quad (Tape Reel) (TSSOP, SOIC)
Temperature Range:
-40° +125°
Package:
Plastic Package (SC70), 5-lead (MCP6231U only) Plastic Dual Flat No-Lead (DFN) 2x3, 8-lead (MCP6231 only) MNY= Plastic Dual Flat No-Lead (TDFN) 2x3, 8-lead (MCP6232 only) Plastic Micro Small Outline (MSOP), 8-lead Plastic (300 Body), 8-lead, 14-lead Plastic Small Outline Transistor (SOT-23), 5-lead (MCP6231, MCP6231R, MCP6231U) Plastic SOIC (150 Body), 8-lead Plastic SOIC (150 Body), 14-lead Plastic TSSOP (4.4 Body), 14-lead
MCP6234-E/P: MCP6234-E/SL: MCP6234-E/ST: MCP6234T-E/SL:
MCP6234T-E/ST:
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Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable."
Code protection constantly evolving. Microchip committed continuously improving code protection features products. Attempts break Microchip's code protection feature violation Digital Millennium Copyright Act. such acts allow unauthorized access your software other copyrighted work, have right relief under that Act.
Information contained this publication regarding device applications like provided only your convenience superseded updates. your responsibility ensure that your application meets with your specifications. MICROCHIP MAKES REPRESENTATIONS WARRANTIES KIND WHETHER EXPRESS IMPLIED, WRITTEN ORAL, STATUTORY OTHERWISE, RELATED INFORMATION, INCLUDING LIMITED CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY FITNESS PURPOSE. Microchip disclaims liability arising from this information use. Microchip devices life support and/or safety applications entirely buyer's risk, buyer agrees defend, indemnify hold harmless Microchip from damages, claims, suits, expenses resulting from such use. licenses conveyed, implicitly otherwise, under Microchip intellectual property rights.
Trademarks Microchip name logo, Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC UNI/O registered trademarks Microchip Technology Incorporated U.S.A. other countries. FilterLab, Hampshire, HI-TECH Linear Active Thermistor, MXDEV, MXLAB, SEEVAL Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock ZENA trademarks Microchip Technology Incorporated U.S.A. other countries. SQTP service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2009, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved. Printed recycled paper.
Microchip received ISO/TS-16949:2002 certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona; Gresham, Oregon design centers California India. Company's quality system processes procedures PIC® MCUs dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory analog products. addition, Microchip's quality system design manufacture development systems 9001:2000 certified.
2009 Microchip Technology Inc.
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03/26/09
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Rail-to-Rail Gain Bandwidth Product: (typical) Supply Current: (t

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