Dual-channel, 1024-position resolution nominal resistance temperature
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Nonvolatile Memory, Dual 1024-Position Digital Potentiometer AD5235
Dual-channel, 1024-position resolution nominal resistance temperature coefficient: ppm/°C Nonvolatile memory stores wiper settings Permanent memory write protection Wiper setting readback Resistance tolerance stored EEMEM Predefined linear increment/decrement instructions Predefined dB/step taper increment/decrement instructions SPI-compatible serial interface single supply ±2.5 dual supply bytes extra nonvolatile memory user-defined information 100-year typical data retention, 55°C Power-on refreshed with EEMEM settings
POWER-ON RESET EEMEM CONTROL EEMEM2 BYTES USER EEMEM RDAC2 SERIAL INTERFACE EEMEM1
FUNCTIONAL BLOCK DIAGRAM
ADDR DECODE
AD5235
RDAC1 REGISTER
RDAC1
RDAC2 REGISTER
02816-001
RTOL*
*RAB TOLERANCE
Figure
APPLICATIONS
DWDM laser diode driver, optical supervisory systems Mechanical potentiometer replacement Instrumentation: gain, offset adjustment Programmable voltage-to-current conversion Programmable filters, delays, time constants Programmable power supply resolution replacement Sensor calibration
scratchpad programming mode, specific setting programmed directly RDAC2 register, which sets resistance between Terminal Terminal Terminal Terminal This setting stored into EEMEM restored automatically RDAC register during system power-on. EEMEM content restored dynamically through external strobing, function protects EEMEM contents. simplify programming, independent simultaneous linear-step increment decrement commands used move RDAC wiper down, step time. logarithmic changes wiper setting, left right shift command used double halve RDAC wiper setting. AD5235 patterned resistance tolerance stored EEMEM. actual end-to-end resistance can, therefore, known host processor readback mode. host execute appropriate resistance step through software routine that simplifies open-loop applications well precision calibration tolerance matching applications. AD5235 available thin, 16-lead TSSOP package. part guaranteed operate over extended industrial temperature range -40°C +85°C.
GENERAL DESCRIPTION
AD5235 dual-channel, nonvolatile memory,1 digitally controlled potentiometer2 with 1024-step resolution. device performs same electronic adjustment function mechanical potentiometer with enhanced resolution, solid state reliability, superior temperature coefficient performance. versatile programming AD5235 SPI®-compatible serial interface allows modes operation adjustment including scratchpad programming, memory storing restoring, increment/decrement, dB/step taper adjustment, wiper setting readback, extra EEMEM1 user-defined information such memory data other components, look-up table, system identification information.
terms nonvolatile memory EEMEM used interchangeably. terms digital potentiometer RDAC used interchangeably.
Rev.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. Specifications subject change without notice. license granted implication otherwise under patent patent rights Analog Devices. Trademarks registered trademarks property their respective owners.
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AD5235 TABLE CONTENTS
Features Applications General Description Functional Block Diagram Revision History Specifications. Electrical Characteristics-25 Versions Interface Timing EEMEM Reliability Characteristics-25 Versions Absolute Maximum Ratings. Caution Configuration Function Descriptions Typical Performance Characteristics Test Circuits Theory Operation Scratchpad EEMEM Programming Basic Operation EEMEM Protection Digital Input Output Configuration. Serial Data Interface Daisy-Chain Operation Terminal Voltage Operating Range. Advanced Control Modes RDAC Structure Programming Variable Resistor Programming Potentiometer Divider Programming Examples EVAL-AD5235EBZ Evaluation Applications Information Bipolar Operation from Dual Supplies. Gain Control Compensation High Voltage Operation DAC. Bipolar Programmable Gain Amplifier 10-Bit Bipolar Programmable Voltage Source with Boosted Output Programmable Current Source Programmable Bidirectional Current Source Programmable Low-Pass Filter Programmable Oscillator Optical Transmitter Calibration with ADN2841 Resistance Scaling Resistance Tolerance, Drift, Temperature Coefficient Mismatch Considerations RDAC Circuit Simulation Model Outline Dimensions Ordering Guide
REVISION HISTORY
4/09-Rev. Rev. Changes Figure Changes Specifications Changes SDO, Description Column, Table Changes Figure Changes Theory Operation Section Changes Serial Data Interface Section Changes Linear Increment Decrement Instructions Section, Logarithmic Taper Mode Adjustment Section, Figure Changes Rheostat Operations Section Changes Bipolar Programmable Gain Amplifier Section, Figure Table 10-Bit Bipolar Section. Changes Programmable Oscillator Section Figure Changes Ordering Guide 7/04-Rev. Rev. Updated Formatting Universal Edits Features, General Description, Block Diagram Changes Specifications Replaced Timing Diagrams.6 Changes Absolute Maximum Ratings Changes Function Descriptions Changes Typical Performance Characteristics.9 Additional Test Circuit (Figure Edits Theory Operation Edits Applications Updated Outline Dimensions 8/02-Rev. Rev. Change Features General Description.1 Change Specifications Change Calculating Actual End-to-End Terminal Resistance Section
Rev. Page
AD5235 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS-25 VERSIONS
-2.5 VDD, VSS, -40°C +85°C, unless otherwise noted. part operated single supply, except from -40°C, where minimum needed. Table
Parameter CHARACTERISTICS-RHEOSTAT MODE (All RDACs) Resistor Differential Nonlinearity Resistor Integral Nonlinearity2 Nominal Resistor Tolerance Resistance Temperature Coefficient Wiper Resistance Nominal Resistance Match CHARACTERISTICS-POTENTIOMETER DIVIDER MODE (All RDACs) Resolution Differential Nonlinearity Integral Nonlinearity3 Voltage Divider Temperature Coefficient Full-Scale Error Zero-Scale Error RESISTOR TERMINALS Terminal Voltage Range Capacitance Capacitance Common-Mode Leakage Current5, DIGITAL INPUTS OUTPUTS Input Logic High Input Logic Input Logic High Input Logic Input Logic High Input Logic Output Logic High (SDO, RDY) Output Logic Input Current Input Capacitance5 POWER SUPPLIES Single-Supply Power Range Dual-Supply Power Range Positive Supply Current Negative Supply Current EEMEM Store Mode Current Symbol Conditions Unit
R-DNL R-INL RAB/RAB (RAB/RAB)/T RAB1/RAB2
0x3FF V/RWB, code 0x200 V/RWB, code 0x200 Code 0x3FF, 25°C
±0.1
ppm/°C
(VW/VW)/T VWFSE VWZSE VDD/VSS (store) (store)
Code half scale Code full scale Code zero scale MHz, measured GND, code half-scale MHz, measured GND, code half-scale VDD/2 With respect GND, With respect GND, With respect GND, With respect GND, With respect GND, +2.5 -2.5 With respect GND, +2.5 -2.5 RPULL-UP (see Figure VLOGIC (see Figure 0.01
Bits ppm/°C
±2.25
GND, 25°C GND, +2.5 -2.5 GND, GND, +2.5 -2.5
Rev. Page
±2.25
±2.75
AD5235
Parameter EEMEM Restore Mode Current Symbol (restore) (restore) PDISS THDW Conditions GND, GND, +2.5 -2.5 VDD/VSS ±2.5 k/250 rms, rms, kHz, VDD, 0.50% error band, Code 0x000 Code 0x200, k/250 k/250 25°C VDD, measured with making full-scale change +2.5 -2.5 measured with kHz, Code 0x200, Code 0x3FF, k/250 -0.3 0.002 125/12 0.05 0.045 4/36 0.01 Unit
Power Dissipation Power Supply Sensitivity5 DYNAMIC CHARACTERISTICS5, Bandwidth Total Harmonic Distortion
Settling Time
Resistor Noise Density Crosstalk (CW1/CW2) Analog Crosstalk
eN_WB
20/64 90/21 -81/-62
nV/Hz nV-s
Typicals represent average readings 25°C Resistor position nonlinearity error (R-INL) deviation from ideal value measured between maximum resistance minimum resistance wiper positions. R-DNL measures relative step change from ideal between successive positions. (see Figure 25). measured with RDAC configured potentiometer divider similar voltage output DAC. VSS. specification limits maximum guaranteed monotonic operating conditions (see Figure 26). Resistor Terminal Resistor Terminal Resistor Terminal have limitations polarity with respect each other. Dual-supply operation enables groundreferenced bipolar signal adjustment. Guaranteed design subject production test. Common-mode leakage current measure leakage from Terminal Terminal Terminal common-mode bias level VDD/2. EEMEM restore mode current continuous. Current consumed while EEMEM locations read transferred RDAC register (see Figure 22). minimize power dissipation, NOP, Instruction (0x0) should issued immediately after Instruction (0x1). PDISS calculated from (IDD VDD) (ISS VSS). dynamic characteristics +2.5 -2.5
Rev. Page
AD5235
INTERFACE TIMING EEMEM RELIABILITY CHARACTERISTICS-25 VERSIONS
Guaranteed design subject production test. Timing Diagrams section location measured values. input control voltages specified with (10% timed from voltage level Switching characteristics measured using both Table
Parameter Clock Cycle Time (tCYC) Setup Time Shutdown Time Rise Input Clock Pulse Width Data Setup Time Data Hold Time SDO-SPI Line Acquire SDO-SPI Line Release Propagation Delay Data Hold Time High Pulse Width High High3 Rise Fall Rise Fall Time Store/Read EEMEM Time Rise Clock Rise/Fall Setup Preset Pulse Width (Asynchronous) Preset Response Time Wiper Setting5 Power-On EEMEM Restore Time5 FLASH/EE MEMORY RELIABILITY Endurance Data Retention
Symbol tPRW tPRESP tEEMEM
Conditions
Clock level high From positive transition From positive transition
0.15
Applies instructions 0x2, 0x3,
pulsed refresh wiper positions
Unit tCYC tCYC kCycles Years
Typicals represent average readings 25°C Propagation delay depends value VDD, RPULL-UP, Valid commands that activate pin. only Instruction Instruction Instruction Instruction Instruction hardware pulse: CMD_8 CMD_9, CMD_10 CMD_2, CMD_3 Device operation -40°C extends save time shown Figure Figure Endurance qualified 100,000 cycles JEDEC Standard Method A117 measured -40°C, +25°C, +85°C; typical endurance +25°C 700,000 cycles. Retention lifetime equivalent junction temperature (TJ) 55°C JEDEC Standard Method A117. Retention lifetime based activation energy derates with junction temperature Flash/EE memory.
Rev. Page
AD5235
Timing Diagrams
CPHA
CPOL
HIGH
(MSB) (LSB)
HIGH
B24* (MSB)
(LSB)
*THE EXTRA THAT DEFINED NORMALLY CHARACTER PREVIOUSLY TRANSMITTED. CPOL MICROCONTROLLER COMMAND ALIGNS INCOMING DATA POSITIVE EDGE CLOCK.
Figure CPHA Timing Diagram
CPHA
CPOL
(MSB (LSB)
HIGH
HIGH
(MSB OUT)
(LSB)
*THE EXTRA THAT DEFINED NORMALLY CHARACTER JUST RECEIVED. CPOL MICROCONTROLLER COMMAND ALIGNS INCOMING DATA POSITIVE EDGE CLOCK.
02816-B-003
Figure CPHA Timing Diagram
Rev. Page
02816-002
AD5235 ABSOLUTE MAXIMUM RATINGS
25°C, unless otherwise noted. Table
Parameter Pulsed Continuous Digital Input Output Voltage Operating Temperature Range Maximum Junction Temperature max) Storage Temperature Range Lead Temperature, Soldering Vapor Phase sec) Infrared sec) Thermal Resistance Junction-to-Ambient JA,TSSOP-16 Junction-to-Case TSSOP-16 Package Power Dissipation
Rating -0.3 +0.3 -0.3 -40°C +85°C 150°C -65°C +150°C 215°C 220°C 150°C/W 28°C/W TA)/JA
Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions above those indicated operational section this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
CAUTION
Maximum terminal current bounded maximum current handling switches, maximum power dissipation package, maximum applied voltage across terminals given resistance. Includes programming nonvolatile memory.
Rev. Page
AD5235 CONFIGURATION FUNCTION DESCRIPTIONS
02816-005
AD5235
VIEW (Not Scale)
Figure Configuration
Table Function Descriptions
Mnemonic Description Serial Input Register Clock. Shifts time positive clock edges. Serial Data Input. Shifts time positive clock edges. loads first. Serial Data Output. Serves readback daisy-chain functions. Command Command activate output readback function, delayed clock pulses, depending clock polarity before after data-word (see Figure Figure other commands, shifts previously loaded pattern, delayed clock pulses depending clock polarity (see Figure Figure This previously shifted used daisy-chaining multiple devices. Whenever used, pull-up resistor range needed. Ground Pin, Logic Ground Reference. Negative Supply. Connect single-supply applications. used dual supply, must able sink when storing data EEMEM. Terminal RDAC1. Wiper terminal RDAC1. ADDR (RDAC1) 0x0. Terminal RDAC1. Terminal RDAC2. Wiper terminal RDAC2. ADDR (RDAC2) 0x1. Terminal RDAC2. Positive Power Supply. Optional Write Protect. When active low, prevents changes present contents, except strobe. CMD_1 COMD_8 refresh RDAC register from EEMEM. Execute instruction before returning high. VDD, used. Optional Hardware Override Preset. Refreshes scratchpad register with current contents EEMEM register. Factory default loads midscale 51210 until EEMEM loaded with value user. activated logic high transition. VDD, used. Serial Register Chip Select Active Low. Serial register operation takes place when returns logic high. Ready. Active high open-drain output. Identifies completion Instruction Instruction Instruction Instruction Instruction
Rev. Page
AD5235 TYPICAL PERFORMANCE CHARACTERISTICS
R-DNL ERROR (LSB)
ERROR (LSB)
+85°C +25°C -40°C
+85°C +25°C -40°C
-0.2 -0.4 -0.6 -0.8
02816-006
-0.2
-0.4
-0.6
1000
DIGITAL CODE
DIGITAL CODE
Figure Code, -40°C, +25°C, +85°C Overlay,
Figure R-DNL Code, -40°C, +25°C, +85°C Overlay,
ERROR (LSB)
POTENTIOMETER MODE TEMPCO (ppm/°C)
+85°C +25°C -40°C
02816-010
02816-011
VDD/VSS 5V/0V 25°C VERSION 250k VERSION
-0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4
02816-007
1000
1023
DIGITAL CODE
CODE (Decimal)
Figure Code, -40°C, +25°C, +85°C Overlay,
-0.2 -0.4 -0.6 +85°C +25°C -40°C
Figure (VW/VW)/T Potentiometer Mode Tempco
RHEOSTAT MODE TEMPCO (ppm/°C) VERSION 250k VERSION 1023 VDD/VSS 5V/0V 25°C
R-INL ERROR (LSB)
02816-008
1000
DIGITAL CODE
CODE (Decimal)
Figure R-INL Code, -40°C, +25°C, +85°C Overlay,
Figure (RWB/RWB)/T Rheostat Mode Tempco
Rev. Page
02816-009
-1.0
-0.8
1000
AD5235
25°C 0.28 0.24 0.20 VDD/VSS ±2.5V
WIPER RESISTANCE
NOISE
250k 0.16 0.12 0.08 0.04 0.01k
02816-012
CODE (Decimal)
FREQUENCY (Hz)
Figure Wiper Resistance Code
Figure Noise Frequency
VDD/VSS 5V/0V
CURRENT (µA)
GAIN (dB)
250k
VDD/VSS 5V/0V VDD/VSS 2.7V/0V VDD/VSS 2.7V/0V
02816-013
f-3dB 12kHz f-3dB 125kHz
CODE (Decimal)
FREQUENCY (Hz)
Figure Temperature,
0.25
Figure Bandwidth Resistance (See Figure
CODE 0x200
VDD/VSS 5V/0V
FULL SCALE MIDSCALE
0.20
0x100 0x080
(mA) ZERO SCALE
GAIN (dB)
0.15
0x040 0x020 0x010
0.10
0.05
0x008 0x004 0x002
0x001
02816-014
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure Clock Frequency,
Figure Gain Frequency Code, (See Figure
Rev. Page
02816-017
100k
02816-016
VDD/VSS ±2.5V MIDSCALE 100k
02816-015
1000
1200
0.1k
100k
AD5235
CODE 0x200 0x100 0x080 2.64 2.62 2.60 2.58 CODE 0x200 0x1FF
AMPLITUDE
GAIN (dB)
0x040 0x020 0x010
2.56 2.54 2.52 2.50 2.48 2.46 2.44
0x008 0x004
0x002 0x001
FREQUENCY (Hz)
02816-018
100k
TIME (µs)
Figure Gain Frequency Code, (See Figure
250k
Figure Midscale Glitch Energy, Code 0x200 Code 0x1FF
2.65
100mV MEASURED WITH CODE 0x200 25°C
2.60
AMPLITUDE
PSRR (dB)
2.55
2.50
2.45 0.01k 2.40
FREQUENCY (Hz)
02816-019
0.1k
100k
TIME (µs)
Figure PSRR Frequency
Figure Midscale Glitch Energy, Code 0x200 Code 0x1FF
2.25V 25°C 0.5V/DIV
0.5V/DIV 5V/DIV
0.5/DIV 5V/DIV
MIDSCALE 5V/DIV
02816-020
20mA/DIV 4ms/DIV
Figure Power-On Reset, 2.25 Previously Stored Code 0x2AA
Figure Time when Storing Data EEMEM
Rev. Page
02816-023
50µs/DIV
02816-022
02816-021
2.42
AD5235
5V/DIV
OPEN 25°C
THEORECTICAL (IWB_MAX
5V/DIV
5V/DIV
250k
IDD* 2mA/DIV 4ms/DIV *SUPPLY CURRENT RETURNS MINIMUM POWER CONSUMPTION, INSTRUCTION (NOP) EXECUTED IMMEDIATELY AFTER INSTRUCTION (READ EEMEM).
02816-024
1024
CODE (Decimal)
Figure Time when Restoring Data from EEMEM
Figure IWB_MAX Code
TEST CIRCUITS
Figure Figure define test conditions used Specifications section.
02816-026
±10% PSRR (dB) (%/%) VMS%
02816-029 02816-030
VDD%
CONNECT
Figure Resistor Position Nonlinearity Error (Rheostat Operation; R-INL, R-DNL)
Figure Power Supply Sensitivity (PSS, PSRR)
OFFSET
02816-027
OP279 OFFSET BIAS VOUT
1LSB V+/2N
Figure Potentiometer Divider Nonlinearity Error (INL, DNL)
Figure Inverting Gain
VMS2
VDD/RNOMINAL
OFFSET
02816-028
OP279
VOUT
VMS1
[VMS1 VMS2]/IW
OFFSET BIAS
Figure Wiper Resistance
Figure Noninverting Gain
Rev. Page
02816-031
02816-025
0.01
AD5235
RDAC2 VOUT
OFFSET 2.5V
+15V
RDAC1
OP42
VOUT
02816-032
-15V
LOG[VOUT/VIN] CONNECT
Figure Gain Frequency
0.1V
Figure Analog Crosstalk
200µA
CODE 0x00 0.1V
OUTPUT
50pF 200µA
(MIN) (MAX)
02816-036
02816-033
Figure Incremental Resistance
Figure Load Circuit Measuring (The diode bridge test circuit equivalent application circuit with RPULL-UP
02816-034
CONNECT
Figure Common-Mode Leakage Current
Rev. Page
02816-035
AD5235 THEORY OPERATION
AD5235 digital potentiometer designed operate true variable resistor. resistor wiper position determined RDAC register contents. RDAC register acts scratchpad register, allowing unlimited changes resistance settings. scratchpad register programmed with position setting using standard serial interface loading 24-bit data-word. format data-word, first four bits commands, following four bits addresses, last bits data. When specified value set, this value stored corresponding EEMEM register. During subsequent power-ups, wiper setting automatically loaded that value. Storing data EEMEM register takes about consumes approximately During this time, shift register locked, preventing changes from taking place. pulses indicate completion this EEMEM storage. There also addresses with bytes each user-defined data that stored EEMEM register from Address Address following instructions facilitate programming needs user (see Table details): nothing. Restore EEMEM content RDAC. Store RDAC setting EEMEM. Store RDAC setting user data EEMEM. Decrement Decrement Decrement step. Decrement step. Reset EEMEM content RDAC. Read EEMEM content from SDO. Read RDAC wiper setting from SDO. Write data RDAC. Increment Increment Increment step. Increment step.
SCRATCHPAD EEMEM PROGRAMMING
scratchpad RDAC register directly controls position digital potentiometer wiper. example, when scratchpad register loaded with wiper connected Terminal variable resistor. scratchpad register standard logic register with restriction number changes allowed, EEMEM registers have program erase/write cycle limitation.
BASIC OPERATION
basic mode setting variable resistor wiper position (programming scratchpad register) accomplished loading serial data input register with Instruction (0xB), Address desired wiper position data. When proper wiper position determined, user load serial data input register with Instruction (0x2), which stores wiper position data EEMEM register. After wiper position permanently stored nonvolatile memory. Table provides programming example listing sequence serial data input (SDI) words with serial data output appearing hexadecimal format. Table Write Store RDAC Settings EEMEM Registers
0xB00100 0x20XXXX 0xB10200 0x21XXXX 0xXXXXXX 0xB00100 0x20XXXX 0xB10200 Action Writes data 0x100 RDAC1 register, Wiper moves full-scale position. Stores RDAC1 register content into EEMEM1 register. Writes Data 0x200 RDAC2 register, Wiper moves full-scale position. Stores RDAC2 register contents into EEMEM2 register.
Table Table provide programming examples that some these commands.
system power-on, scratchpad register automatically refreshed with value previously stored corresponding EEMEM register. factory-preset EEMEM value midscale. scratchpad register also refreshed with contents EEMEM register three different ways. First, executing Instruction (0x1) restores corresponding EEMEM value. Second, executing Instruction (0x8) resets EEMEM values both channels. Finally, pulsing refreshes both EEMEM settings. Operating hardware control function requires complete pulse signal. When goes low, internal logic sets wiper midscale. EEMEM value loaded until returns high.
Rev. Page
AD5235
EEMEM PROTECTION
write protect (WP) disables changes scratchpad register contents, except EEMEM setting, which still restored using Instruction Instruction pulse. Therefore, used provide hardware EEMEM protection feature. disable recommended execute instruction before returning logic high.
INPUT
DIGITAL INPUT OUTPUT CONFIGURATION
digital inputs protected, high input impedance that driven directly from most digital sources. Active logic low, must tied VDD, they used. internal pull-up resistors present digital input pins. avoid floating digital pins that might cause false triggering noisy environment, pull-up resistors. This applicable when device detached from driving source when programmed. pins open-drain digital outputs that only need pull-up resistors these functions used. optimize speed power trade-off, pull-up resistors. equivalent serial data input output logic shown Figure open-drain output disabled whenever chip-select (CS) logic high. protection digital inputs shown Figure Figure
VALID COMMAND COUNTER
Figure Equivalent Input Protection
SERIAL DATA INTERFACE
AD5235 contains 4-wire SPI-compatible digital interface (SDI, SDO, CLK). 24-bit serial data-word must loaded with first. format word shown Table command bits control operation digital potentiometer according command shown Table address bits. used address RDAC1 RDAC2. Address Address accessible users extra EEMEM. Address reserved factory usage. Table provides address EEMEM locations. values RDAC registers. values EEMEM registers. AD5235 internal counter that counts multiple bits frame) proper operation. example, AD5235 works with 24-bit 48-bit word, cannot work properly with 23-bit 25-bit word. prevent data from mislocking (due noise, example), counter resets, count multiple four when goes high remains register multiple four. addition, AD5235 subtle feature that, pulsed without SDI, part repeats previous command (except during power-up). result, care must taken ensure that excessive noise exists line that might alter effective number-of-bits pattern. interface used slave modes: CPHA CPOL CPHA CPOL CPHA CPOL refer control bits that dictate timing following MicroConverters® microprocessors: ADuC812, ADuC824, M68HC11, MC68HC16R1, MC68HC916R1.
COMMAND PROCESSOR ADDRESS DECODE
RPULL-UP SERIAL REGISTER (FOR DAISY CHAIN ONLY)
AD5235
Figure Equivalent Digital Input Output Logic
02816-037
DAISY-CHAIN OPERATION
LOGIC PINS INPUTS
Figure Equivalent Digital Input Protection
serial data output (SDO) serves purposes. used read contents wiper setting EEMEM values using Instruction Instruction respectively. remaining instructions (Instruction Instruction Instruction Instruction valid daisy-chaining multiple devices simultaneous operations. Daisy-chaining minimizes number port pins required from controlling (see Figure 39). contains open-drain N-Ch that requires pull-up resistor, this function used. shown Figure users need package next package. Users need increase clock period because pull-up resistor capacitive loading SDO-to-SDI interface require additional time delay between subsequent devices.
Rev. Page
02816-038
02816-039
AD5235
When AD5235s daisy-chained, bits data required. first bits (formatted 4-bit command, 4-bit address, 16-bit data) second bits with same format Keep until bits clocked into their respective serial registers. then pulled high complete operation.
Power-Up Sequence
Because there diodes limit voltage compliance Terminal Terminal Terminal (see Figure 40), important power first before applying voltage Terminal Terminal Terminal Otherwise, diode forward-biased such that powered unintentionally. example, applying across Terminal Terminal prior causes terminal exhibit destructive device, might affect rest user's system. ideal power-up sequence GND, VSS, digital inputs, order powering digital inputs important long they powered after VSS. Regardless power-up sequence ramp rates power supplies, when powered, power-on preset activates, which restores EEMEM values RDAC registers.
AD5235
MOSI MICROCONTROLLER SCLK
2.2k
AD5235
02816-040
Figure Daisy-Chain Configuration Using
TERMINAL VOLTAGE OPERATING RANGE
positive negative power supplies AD5235 define boundary conditions proper 3-terminal digital potentiometer operation. Supply signals present Terminal Terminal Terminal that exceed clamped internal forward-biased diodes (see Figure 40).
Layout Power Supply Bypassing
good practice employ compact, minimum lead-length layout design. leads input should direct possible with minimum conductor length. Ground paths should have resistance inductance. Similarly, good practice bypass power supplies with quality capacitors optimum stability. Bypass supply leads device with 0.01 disk chip ceramic capacitors. Also, apply ESR, tantalum electrolytic capacitors supplies minimize transient disturbance (see Figure 41).
02816-041
AD5235
10µF 10µF 0.1µF 0.1µF
Figure Maximum Terminal Voltages
AD5235 primarily used digital ground reference. minimize digital ground bounce, AD5235 ground terminal should joined remotely common ground (see Figure 41). digital input control signals AD5235 must referenced device ground (GND) must satisfy logic level defined Specifications section. internal level-shift circuit ensures that common-mode voltage range three terminals extends from VDD, regardless digital input level.
02816-042
Figure Power Supply Bypassing
Rev. Page
AD5235
Table command bits address bits Data Data applicable RDAC, applicable EEMEM. Table 24-Bit Serial Data-Word
RDAC EEMEM Command Byte Data Byte Data Byte
Command instruction codes defined Table Table Command Operation Truth Table
Command Byte Command Number Data Byte Data Byte
Operation NOP. nothing. Table Restore EEMEM (A0) contents RDAC (A0) register. This command leaves device read program power state. return part idle state, perform Instruction Table Store wiper setting. Store RDAC (A0) setting EEMEM (A0). Table Store contents Serial Register Data Byte Serial Register Data Bytes (total bits) EEMEM (ADDR). Table Decrement Right-shift contents RDAC (A0) register, stop Decrement Right-shift contents RDAC registers, stop Decrement contents RDAC (A0) stop Decrement contents RDAC registers stop Reset. Refresh RDACs with their corresponding EEMEM previously stored values. Read contents EEMEM (ADDR) from output next frame. Table Read RDAC wiper setting from output next frame. Table Write contents Serial Register Data Byte Serial Register Data Byte (total bits) RDAC (A0). Table Increment Left-shift contents RDAC (A0), stop Table Increment Left-shift contents RDAC registers, stop Increment contents RDAC (A0) stop Table Increment contents RDAC registers stop
output shifts last bits data clocked into serial register daisy-chain operation. Exception: instruction following Instruction Instruction selected internal register data present Data Byte Data Byte instructions following Instruction Instruction must also full 24-bit data-word completely clock contents serial register. RDAC register volatile scratchpad register that refreshed power-on from corresponding nonvolatile EEMEM register. Execution these operations takes place when strobe returns logic high. Instruction writes data bytes bits data) EEMEM. case Address Address only last bits valid wiper position setting. increment, decrement, shift instructions ignore contents shift register, Data Byte Data Byte
Rev. Page
AD5235
ADVANCED CONTROL MODES
AD5235 digital potentiometer includes user programming features address wide number applications these universal adjustment devices. programming features include following: Scratchpad programming desirable values Nonvolatile memory storage scratchpad RDAC register value EEMEM register Increment decrement instructions RDAC wiper register Left right shift RDAC wiper register achieve level changes extra bytes user-addressable nonvolatile memory RDAC register then Code Similarly, data RDAC register greater than equal midscale data shifted left, then data RDAC register automatically full scale. This makes left-shift function ideal logarithmic adjustment possible. Right-Shift instruction Right-Shift instruction ideal only (ideal logarithmic error). right-shift function generates linear half-LSB error, which translates number-of-bits dependent logarithmic error, shown Figure Figure shows error numbers bits AD5235. Table Detail Left-Shift Right-Shift Functions Step Increment Decrement
Left-Shift dB/Step) 0000 0000 0000 0001 0000 0010 0000 0100 0000 1000 0001 0000 0010 0000 0100 0000 1000 0000 0000 0000 0000 0000 1111 1111 1111 1111 Right-Shift(-6 dB/Step) 1111 1111 1111 1111 1111 1111 0111 1111 0011 1111 0001 1111 0000 1111 0000 0111 0000 0011 0000 0001 0000 0000 0000 0000 0000 0000
Linear Increment Decrement Instructions
increment decrement instructions (Instruction Instruction Instruction Instruction useful linear step adjustment applications. These commands simplify microcontroller software coding allowing controller send just increment decrement command device. adjustment individual ganged potentiometer arrangement where both wiper positions changed same time. increment command, executing Instruction automatically moves wiper next resistance segment position. master increment command, Instruction moves resistor wipers position.
Logarithmic Taper Mode Adjustment
Four programming instructions produce logarithmic taper increment decrement wiper position control individual potentiometer ganged potentiometer arrangement where both wiper positions changed same time. increment activated Instruction Instruction decrement activated Instruction Instruction example, starting with wiper connected Terminal executing increment instructions (Command Instruction moves wiper steps from (Terminal position 100% position AD5235 10-bit potentiometer. When wiper position near maximum setting, last increment instruction causes wiper full-scale 1023 code position. Further increment instructions change wiper position beyond full scale (see Table step increments step decrements achieved shifting internally left right, respectively. following information explains nonideal step adjustment under certain conditions. Table illustrates operation shifting function RDAC register data bits. Each table represents successive shift operation. Note that left-shift instructions were modified such that, data RDAC register equal zero data shifted left,
Actual conformance logarithmic curve between data contents RDAC register wiper position each Right-Shift command Right-Shift command execution contains error only numbers bits. Even numbers bits ideal. Figure shows plots error log10 (error/code)] AD5235. example, Code error log10 (0.5/3) -15.56 which worst case. error plot more significant lower codes (see Figure 42).
GAIN (dB)
CODE (From 1023 103)
Figure Error Conformance Numbers Bits Only (Even Numbers Bits Ideal)
Rev. Page
02816-043
AD5235
Using Re-Execute Previous Command
Another subtle feature AD5235 that subsequent strobe, without clock data, repeats previous command. example, RAB_RATED data shows XXXX XXXX 1001 1100 0000 1111, RAB_ACTUAL calculated follows: MSB: positive Next LSB: 1100 LSB: 0000 1111 0.06 tolerance 28.06% Therefore, RAB_ACTUAL 320.15
Using Additional Internal Nonvolatile EEMEM
AD5235 contains additional user EEMEM registers storing 16-bit data such memory data other components, look-up tables, system identification information. Table provides address internal storage registers shown functional block diagram (see Figure EEMEM1, EEMEM2, bytes addresses bytes each) User EEMEM. Table EEMEM Address
EEMEM
RDAC STRUCTURE
patent-pending RDAC contains multiple strings equal resistor segments with array analog switches that acts wiper connection. number positions resolution device. AD5235 1024 connection points, allowing provide better than 0.1% setability resolution. Figure shows equivalent structure connections among three terminals RDAC. always while switches, SW(0) SW(2N time, depending resistance position decoded from data bits. Because switch ideal, there wiper resistance, Wiper resistance function supply voltage temperature. lower supply voltage higher temperature, higher resulting wiper resistance. Users should aware wiper resistance dynamics, accurate prediction output resistance needed.
SW(2N-1)
Address 0000 0001 0010 0011 1110 1111
EEMEM Content RDAC11, RDAC2 USER13 USER2 USER13 RAB1 tolerance4
RDAC data stored EEMEM locations transferred corresponding RDAC register power-on, when Instruction Instruction executed. Execution Instruction leaves device read mode power consumption state. After last Instruction executed, user should perform NOP, Instruction return device power idling state. USERx internal nonvolatile EEMEM registers available store retrieve constants other 16-bit information using Instruction Instruction respectively. Read only.
Calculating Actual End-to-End Terminal Resistance
resistance tolerance stored EEMEM register during factory testing. actual end-to-end resistance can, therefore, calculated, which valuable calibration, tolerance matching, precision applications. Note that this value read only RAB2 matches with RAB1, typically 0.1%. resistance tolerance percentage contained last bits data EEMEM Register format sign magnitude binary format with designate sign negative positive), next designate integer number, designate decimal number (see Table 11).
RDAC WIPER REGISTER DECODER
SW(2N-2)
SW(1)
RAB/2N DIGITAL CIRCUITRY OMITTED CLARITY
SW(0)
Figure Equivalent RDAC Structure
Table Nominal Individual Segment Resistor Values
Device Resolution 1024-Step 24.4
Table Calculating End-to-End Terminal Resistance
Sign Sign
Bits Integer Number
Decimal Point
Bits Decimal Number
Rev. Page
02816-044
AD5235
PROGRAMMING VARIABLE RESISTOR
Rheostat Operation
nominal resistance RDAC between Terminal Terminal RAB, available with with 1024 positions (10-bit resolution). final digits part number determine nominal resistance value, example, 24.4 10-bit data-word RDAC latch decoded select 1024 possible settings. following description provides calculation resistance, RWB, different codes part. first connection wiper starts Terminal Data 0x000. RWB(0) because wiper resistance, independent nominal resistance. second connection first point where RWB(1) becomes 24.4 74.4 Data 0x001. third connection next point representing RWB(2) 48.8 98.8 Data 0x002, Each data value increase moves wiper resistor ladder until last point reached RWB(1023) 25026 Figure simplified diagram equivalent RDAC circuit. When used, Terminal left floating tied wiper.
Table Selected Codes
(Dec) 1023 RWB(D) 25,026 12,550 74.4 Output State Full scale Midscale Zero scale (wiper contact resistor)
Note that, zero-scale condition, finite wiper resistance present. Care should taken limit current flow between this state more than avoid degradation possible destruction internal switches. Like mechanical potentiometer that RDAC replaces, AD5235 part symmetrical. resistance between Wiper Terminal also produces digitally controlled complementary resistance, RWA. Figure shows symmetrical programmability various terminal connections. When used, Terminal left floating tied wiper. Setting resistance value starts maximum value resistance decreases data loaded latch increased value. general transfer equation this operation
1024 1024
RWA(D), RWB(D) RWF)
example, output resistance values Table given RDAC latch codes (applies digital potentiometers).
Table RWA(D) Selected Codes
(Dec) 1023
02816-045
RWA(D) 74.4 12,550 25,026 25,050
Output State Full scale Midscale Zero scale (wiper contact resistance)
CODE (Decimal)
1023
Figure RWA(D) RWB(D) Decimal Code
general equation that determines programmed output resistance between Terminal Terminal
typical distribution from channel channel ±0.2% within same package. Device-to-device matching process dependent upon worst case ±30% variation. However, change with temperature ppm/°C temperature coefficient.
PROGRAMMING POTENTIOMETER DIVIDER
Voltage Output Operation
digital potentiometer configured generate output voltage wiper terminal that proportional input voltages applied Terminal Terminal example, connecting Terminal Terminal ground produces output voltage wiper that value from Each voltage equal voltage applied across Terminal Terminal divided position resolution potentiometer divider.
1024
where: decimal equivalent data contained RDAC register. nominal resistance between Terminal Terminal wiper resistance. example, output resistance values Table given RDAC latch codes (applies digital potentiometers).
Rev. Page
AD5235
Because AD5235 also supplied dual supplies, general equation defining output voltage with respect ground given input voltages applied Terminal Terminal
1024 Table Restoring EEMEM Values RDAC Registers
0x10XXXX 0x00XXXX 0xXXXXXX 0x10XXXX Action Restores EEMEM1 value RDAC1 register. NOP. Recommended step minimize power consumption.
Equation assumes that buffered that effect wiper resistance minimized. Operation digital potentiometer divider mode results more accurate operation over temperature. Here, output voltage dependent ratio internal resistors absolute value; therefore, drift improves ppm/°C. There voltage polarity restriction between Terminal Terminal Terminal long terminal voltage (VTERM) stays within VTERM VDD.
Table Using Left-Shift Increment Steps
0xC0XXXX 0xXXXXXX Action Moves Wiper double present data contained RDAC1 register. Moves Wiper double present data contained RDAC2 register.
0xC1XXXX
0xC0XXXX
PROGRAMMING EXAMPLES
following programming examples illustrate typical sequence events various features AD5235. Table instructions data-word format. instruction numbers, addresses, data appearing pins hexadecimal format.
Table Scratchpad Programming
0xB00100 0xXXXXXX Action Writes Data 0x100 into RDAC1 register, Wiper moves full-scale position. Loads Data 0x200 into RDAC2 register, Wiper moves full-scale position.
Table Storing Additional User Data EEMEM
0x32AAAA 0xXXXXXX Action Stores Data 0xAAAA extra EEMEM location USER1. (Allowable address locations with maximum bits data.) Stores Data 0x5555 extra EEMEM location USER2. (Allowable address locations with maximum bits data.)
0x335555
0x32AAAA
0xB10200
0xB00100
Table Reading Back Data from Memory Locations
0x92XXXX 0x00XXXX 0xXXXXXX 0x92AAAA Action Prepares data read from USER1 EEMEM location. Instruction sends 24-bit word SDO, where last bits contain contents USER1 EEMEM location. command ensures that device returns idle power dissipation state.
Table Incrementing RDAC Followed Storing Wiper Setting EEMEM
0xB00100 0xXXXXXX Action Writes Data 0x100 into RDAC1 register, Wiper moves fullscale position. Increments RDAC1 register 0x101. Increments RDAC1 register 0x102. Continue until desired wiper position reached. Stores RDAC2 register data into EEMEM1. Optionally, protect EEMEM values.
0xE0XXXX 0xE0XXXX
0xB00100 0xE0XXXX
Table Reading Back Wiper Settings
0xB00200 0xC0XXXX 0xA0XXXX 0xXXXXXX 0xXXXXXX 0xB00200 0xC0XXXX 0xA003FF Action Writes RDAC1 midscale. Doubles RDAC1 from midscale full scale. Prepares reading wiper setting from RDAC1 register. Reads back full-scale value from SDO.
0x20XXXX
0xXXXXXX
EEMEM values RDACs restored poweron, strobing pin, commands shown Table
EVAL-AD5235EBZ EVALUATION
Analog Devices, Inc., offers user-friendly EVAL-AD5235EBZ evaluation that controlled through printer port. driving program self-contained; programming languages skills needed.
Rev. Page
AD5235 APPLICATIONS INFORMATION
BIPOLAR OPERATION FROM DUAL SUPPLIES
AD5235 operated from ±2.5 dual supplies, which enable control ground referenced signals bipolar operation. signals high applied directly across Terminal Terminal with output taken from Terminal Figure typical circuit connection.
+2.5V SCLK MOSI MICROCONTROLLER ±1.25V
Alternatively, avoids ringing oscillation worst case. critical applications, find empirically suit oscillation. general, range picofarads more than tenths picofarads usually adequate compensation. Similarly, terminal capacitances connected output (not shown); their effect this node less significant compensation avoided most cases.
HIGH VOLTAGE OPERATION
±2.5V
AD5235
MIDSCALE -2.5V
02816-046
Figure Bipolar Operation from Dual Supplies
digital potentiometer placed directly feedback input path gain control, provided that voltage across Terminal Terminal Terminal Terminal Terminal Terminal does exceed When high voltage gain needed, fixed gain digital potentiometer control adjustable input. Figure shows simple implementation.
02816-048
02816-049
GAIN CONTROL COMPENSATION
digital potentiometer commonly used gain control such noninverting gain amplifier shown Figure
2.2pF 250k 11pF
AD5235
Figure Voltage Span Control
02816-047
Figure Typical Noninverting Gain Amplifier
Similarly, compensation capacitor, needed dampen potential ringing when digital potentiometer changes steps. This effect prominent when stray capacitance inverted node augmented large feedback resistor. Typically, picofarad Capacitor adequate combat problem.
When RDAC terminal parasitic capacitance connected noninverting node, introduces zero term with dB/dec, whereas typical gain bandwidth product (GBP) dB/dec characteristics. large finite cause frequency this zero fall well below crossover frequency. Therefore, rate closure becomes dB/dec, system phase margin crossover frequency. input rectangular pulse step function, output ring oscillate. Similarly, also likely ring when switching between gain values; this equivalent stop change input. Depending GBP, reducing feedback resistor might extend frequency zero enough overcome problem. better approach include compensation capacitor, cancel effect caused Optimum compensation occurs when This option because variation result, previous relationship scale were maximum value. Doing this might overcompensate compromise performance when values.
operation (see Figure 48), common buffer output digital potentiometer unless load much larger than RWB. buffer serves purpose impedance conversion drive heavier loads.
VOUT AD1582
AD5235
AD8601
Figure Unipolar 10-Bit
Rev. Page
AD5235
BIPOLAR PROGRAMMABLE GAIN AMPLIFIER
applications requiring bipolar gain, Figure shows implementation. Digital Potentiometer sets adjustment range; wiper voltage (VW2) can, therefore, programmed between -KVI given setting. Configure OP2177 (A2) noninverting amplifier that yields transfer function
Without consideration wiper resistance, output this circuit approximately VREF 1024
+2.5V
1024 where ratio RWB1/RWA1
VOUT TRIM +2.5VREF
+2.5V
AD8552
-2.5V
-2.5VREF
AD5235
OP2177
ADR421
AD8552
AD5235
02816-051
MIDSCALE
-2.5V
Figure 10-Bit Bipolar
AD5235
OP2177
02816-050
PROGRAMMABLE VOLTAGE SOURCE WITH BOOSTED OUTPUT
applications that require high current adjustment, such laser diode driver tunable laser, boosted voltage source considered (see Figure 51).
Figure Bipolar Programmable Gain Amplifier
simpler (and much more usual) case where simplified
1024
AD5235
2N7002 SIGNAL
RBIAS
Table shows result adjusting with OP2177 (A2) configured unity gain, gain gain result bipolar amplifier with linearly programmable gain 1024-step resolution.
Table Result Bipolar Gain Amplifier
1023 -0.5 0.992 1.984 9.92
AD8601
Figure Programmable Booster Voltage Source
this circuit, inverting input forces equal wiper voltage digital potentiometer. load current then delivered supply N-Ch (see Figure 51). power handling must adequate dissipate power. This circuit source maximum with supply. precision applications, voltage reference, such ADR421, ADR03, ADR370, applied Terminal digital potentiometer.
10-BIT BIPOLAR
circuit Figure changed with input taken from precision reference, midscale, AD8552 (A2) configured buffer, 10-bit bipolar realized shown Figure 50). Compared conventional DAC, this circuit offers comparable resolution precision because wiper resistance effects. Degradation nonlinearity temperature coefficient prominent near values adjustment range. Alternatively, this circuit offers unique nonvolatile memory feature that, some cases, outweighs shortfalls precision.
Rev. Page
02816-052
AD5235
PROGRAMMABLE CURRENT SOURCE
programmable current source implemented with circuit shown Figure
150k
+15V
10pF
(2.048V
+2.5V
+15V 150k
SLEEP OUTPUT
OP2177 -15V
AD5235
REF191
-2.5V
OP2177 -15V
14.95k
AD5235
-2.048V
OP1177
Figure Programmable Bidirectional Current Source
02861-053
Figure Programmable Current Source
REF191 unique supply headroom high current handling precision reference that deliver 2.048 load current simply voltage across Terminal Terminal digital potentiometer divided VREF 1024
R2B, theory, made small necessary achieve current needed within output current driving capability. this circuit, OP2177 delivers either direction, voltage compliance approaches Without additions output impedance (looking into
R2A) (R2A R2B)
circuit simple aware that there issues. First, dual-supply amps ideal because ground potential REF191 swing from -2.048 zero scale full scale potentiometer setting. Although circuit works under single supply, programmable resolution system reduced half. Second, voltage compliance limited equivalently, load. When higher voltage compliance needed, consider digital potentiometers, such AD5260, AD5280, AD7376. Figure shows alternate circuit high voltage compliance. achieve higher current, such when driving high power LED, replace with LDO, reduce resistor series with terminal digital potentiometer. This limits current potentiometer increases current adjustment resolution.
infinite, Resistors match precisely with R2B, respectively, which desirable. other hand, resistors match, negative cause oscillation. result, range picofarad, needed prevent oscillation from negative impedance.
PROGRAMMABLE LOW-PASS FILTER
analog-to-digital conversions (ADCs), common include antialiasing filter band limit sampling signal. Therefore, dual-channel AD5235 used construct second-order Sallen-Key low-pass filter, shown Figure
+2.5V ADJUSTED CONCURRENTLY AD8601 -2.5V
02816-055
PROGRAMMABLE BIDIRECTIONAL CURRENT SOURCE
applications that require bidirectional current control higher voltage compliance, Howland current pump solution (see Figure 53). resistors matched, load current
Figure Sallen-Key Low-Pass Filter
design equations (10)
(11) (12)
Rev. Page
02816-054
AD5235
First, users should select convenient values capacitors. achieve maximally flat bandwidth, where 0.707, twice size equal result, user adjust concurrently same setting achieve desirable bandwidth. Figure Figure frequency tuning requires that both RDACs adjusted concurrently same settings. Because channels might adjusted time, intermediate state occurs that might acceptable some applications. course, increment/decrement instructions (Instruction Instruction Instruction Instruction used. Different devices also used daisy-chain mode that parts programmed same settings simultaneously.
PROGRAMMABLE OSCILLATOR
classic Wien bridge oscillator, Wien network (R||C, R'C') provides positive feedback, whereas provide negative feedback (see Figure 55).
FREQUENCY ADJUSTMENT 2.2nF 2.2nF
OPTICAL TRANSMITTER CALIBRATION WITH ADN2841
AD5235, together with multirate Gbps laser diode driver, ADN2841, forms optical supervisory system which dual digital potentiometers used laser average optical power extinction ratio (see Figure 56). AD5235 particularly suited optical parameter settings because high resolution superior temperature coefficient characteristics.
+2.5V
OP1177 -2.5V AD5235 AD5231 1N4148 2.1k
AMPLITUDE ADJUSTMENT
02816-056
AD5235
RDAC1 RDAC2
IMPD
Figure Programmable Oscillator with Amplitude Control
ADN2841
EEMEM CONTROL EEMEM PSET IMODP IBIAS
resonant frequency, overall phase shift zero, positive feedback causes circuit oscillate. With /(R2B RDIODE), oscillation frequency 1024 1024 (13)
ERSET
DATAN DATAP CLKN CLKP
where equal such that (14)
CLKN CLKP DATAP DATAN
resonance, setting R2/R1 balances bridge. practice, R2/R1 should slightly larger than ensure that oscillation start. other hand, alternate turn-on diodes, ensures that R2/R1 smaller than momentarily stabilizing oscillation. When frequency set, oscillation amplitude turned because (15)
Figure Optical Supervisory System
interdependent variables. With proper selection R2B, equilibrium reached such that converges. series with discrete resistor increase amplitude, total resistance cannot large saturate output.
ADN2841 Gbps laser diode driver that uses unique control algorithm manage average power extinction ratio laser after initial factory calibration. ADN2841 stabilizes data transmission laser continuously monitoring optical power correcting variations caused temperature degradation laser over time. ADN2841, IMPD monitors laser diode current. Through dual-loop power extinction ratio control calibrated dual RDACs AD5235, internal driver controls bias current, IBIAS, consequently average power. also regulates modulation current, IMODP, changing modulation current linearly with slope efficiency. Therefore, changes laser threshold current slope efficiency compensated for. result, optical supervisory system minimizes laser characterization efforts and, therefore, enables designers apply comparable lasers from multiple sources.
Rev. Page
02816-057
AD5235
RESISTANCE SCALING
AD5235 offers nominal resistance. When users need lower resistance must maintain number adjustment steps, they parallel multiple devices. example, Figure shows simple scheme paralleling channels RDACs. adjust half resistance linearly step, program both RDACs concurrently with same settings.
02816-058
RESISTANCE TOLERANCE, DRIFT, TEMPERATURE COEFFICIENT MISMATCH CONSIDERATIONS
rheostat mode operation, such gain control, tolerance mismatch between digital potentiometer discrete resistor cause repeatability issues among various systems (see Figure 60). Because inherent matching silicon process, practical apply dual-channel device this type application. such, replaced channels digital potentiometer programmed specific value. used adjustable gain. Although adds cost, this approach minimizes tolerance temperature coefficient mismatch between This approach also tracks resistance drift over time. result, these less than ideal parameters become less sensitive system variations.
Figure Reduce Resistance Half with Linear Adjustment Characteristics
voltage divider mode, paralleling discrete resistor, shown Figure proportionately lower voltage appears Terminal Terminal This translates into finer degree precision because step size Terminal smaller. voltage found (RAB 1024
(16)
AD8601
02816-061
REPLACED WITH ANOTHER CHANNEL RDAC
Figure Linear Gain Control with Tracking Resistance Tolerance, Drift, Temperature Coefficient
02816-059
Figure Lowering Nominal Resistance
Note that circuit Figure track tolerance, temperature coefficient, drift this particular application. characteristic transfer function however, pseudo rather than linear gain function.
02816-060
Figure Nonlinear Gain Control with Tracking Resistance Tolerance Drift
Figure Resistor Scaling with Pseudo Adjustment Characteristics
equation approximated
EQUIVALENT 1024
(17)
Users should also aware need tolerance matching well temperature coefficient matching components.
Rev. Page
02816-062
Figure Figure show that digital potentiometers change steps linearly. Alternatively, pseudo taper adjustment usually preferred applications such audio control. Figure shows another type resistance scaling. this configuration, smaller with respect RAB, more pseudo taper characteristic circuit behaves.
AD8601
AD5235
RDAC CIRCUIT SIMULATION MODEL
internal parasitic capacitances external capacitive loads dominate characteristics RDACs. Configured potentiometer divider, bandwidth AD5235 resistor) measures half scale. Figure provides large signal bode plot characteristics available resistor versions, parasitic simulation model shown Figure
following code provides macro model list RDAC:
.PARAM 1024, RDAC 25E3 .SUBCKT DPOT 11E-12 {(1-D/1024)* RDAC 80E-12 {D/1024 RDAC 11E-12 .ENDS DPOT
RDAC
11pF
11pF
Figure RDAC Circuit Simulation Model (RDAC
02816-063
80pF
Rev. Page
AD5235 OUTLINE DIMENSIONS
5.10 5.00 4.90
4.50 4.40 4.30
6.40
0.15 0.05 0.65 0.30 0.19 COPLANARITY 0.10 1.20
0.20 0.09
SEATING PLANE
0.75 0.60 0.45
COMPLIANT JEDEC STANDARDS MO-153-AB
Figure 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown millimeters
ORDERING GUIDE
Model AD5235BRU25 AD5235BRU25-RL7 AD5235BRUZ25 AD5235BRUZ25-RL72 AD5235BRU250 AD5235BRUZ2502 AD5235BRUZ250-R72 EVAL-AD5235EBZ2
WB_FS
R-DNL
R-INL
Temperature Range -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C
Package Description 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP 16-Lead TSSOP Evaluation Board
Package Option RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16
Ordering Quantity 1,000 1,000 1,000
Branding 5235B25 5235B25 5235B25 5235B25 5235B250 5235B250 5235B250
Line contains logo followed date code, YYWW. Line contains model number followed end-to-end resistance value (note: -OR- Line contains model number. Line contains logo followed end-to-end resistance value. Line contains date code, YYWW. RoHS Compliant Part.
©2004-2009 Analog Devices, Inc. rights reserved. Trademarks registered trademarks property their respective owners. D02816-0-4/09(C)
Rev. Page
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