Rail-to-Rail Input/Output, Amps Rail-to-Rail Input/Output Wide Ba

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Rail-to-Rail Input/Output, Amps Rail-to-Rail Input/Output Wide Ba

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MCP6021/1R/2/3/4
Rail-to-Rail Input/Output, Amps
Rail-to-Rail Input/Output Wide Bandwidth: (typical) Noise: nV/Hz, (typical) Offset Voltage: Industrial Temperature: ±500 (maximum) Extended Temperature: ±250 (maximum) Mid-Supply VREF: MCP6021 MCP6023 Supply Current: (typical) Total Harmonic Distortion: 0.00053% (typical, V/V) Unity Gain Stable Power Supply Range: 2.5V 5.5V Temperature Range: Industrial: -40°C +85°C Extended: -40°C +125°C
Description
MCP6021, MCP6021R, MCP6022, MCP6023 MCP6024 from Microchip Technology Inc. rail-torail input output amps with high performance. specifications include: wide bandwidth MHz), noise (8.7 nV/Hz), input offset voltage distortion (0.00053% THD+N). MCP6023 also offers Chip Select (CS) that gives power savings when part use. single MCP6021 MCP6021R available SOT-23-5. single MCP6021, single MCP6023 dual MCP6022 available 8-lead PDIP, SOIC TSSOP. Extended Temperature single MCP6021 available 8-lead MSOP. quad MCP6024 offered 14-lead PDIP, SOIC TSSOP packages. MCP6021/1R/2/3/4 family available Industrial Extended temperature ranges. power supply range 2.5V 5.5V.
Applications
Automotive Multi-Pole Active Filters Audio Processing Buffer Test Equipment Medical Instrumentation
Package Types
MCP6021 SOT-23-5
VOUT VIN+ VIN-
MCP6022 PDIP SOIC, TSSOP
VOUTA VINA- VINA+ VOUTB VINB- VINB+
Design Aids
SPICE Macro Models FilterLab® Software MindiCircuit Designer Simulator Microchip Advanced Part Selector (MAPS) Analog Demonstration Evaluation Boards Application Notes
MCP6021R SOT-23-5
VOUT VIN+ VIN-
MCP6023 PDIP SOIC, TSSOP
VIN- VIN+ VOUT VREF
MCP6021 PDIP SOIC, MSOP, TSSOP
Typical Application
Photo Detector MCP6021 VDD/2 Transimpedance Amplifier
VIN- VIN+
VOUT VREF
MCP6024 PDIP SOIC, TSSOP
VOUTA VINA- VINA+ VINB+ VINB- VOUTB VOUTD VIND- VIND+ VINC+ VINC- VOUTC
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MCP6021/1R/2/3/4
ELECTRICAL CHARACTERISTICS
Notice: Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability. Section 4.1.2 Input Voltage Current Limits".
Absolute Maximum Ratings
.7.0V Current Analog Input Pins (VIN+, VIN-).±2 Analog Inputs (VIN+, VIN-) 1.0V 1.0V Other Inputs Outputs 0.3V 0.3V Difference Input Voltage |VDD VSS| Output Short Circuit Current Continuous Current Output Supply Pins .±30 Storage Temperature -65° +150° Maximum Junction Temperature (TJ). .+150° Protection Pins (HBM; 200V
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2 VDD/2. Parameters Input Offset Input Offset Voltage: Industrial Temperature Parts Extended Temperature Parts Extended Temperature Parts Input Offset Voltage Temperature Drift Power Supply Rejection Ratio Input Current Impedance Input Bias Current Industrial Temperature Parts Extended Temperature Parts Input Offset Current Common-Mode Input Impedance Differential Input Impedance Common-Mode Common-Mode Input Range Common-Mode Rejection Ratio VCMR CMRR CMRR CMRR Voltage Reference (MCP6021 MCP6023 only) VREF Accuracy (VREF VDD/2) VREF Temperature Drift Open-Loop Gain Open-Loop Gain (Large Signal) Output Maximum Output Voltage Swing Output Short Circuit Current VOL, VSS+15 VDD-20 0.5V input overdrive 2.5V 5.5V VOUT VSS+0.3V VDD-0.3V VREF_ACC VREF/T
Units
Conditions
VOS/TA PSRR ZDIFF
-500 -250 -2.5 VSS-0.3
±3.5 1013||6 1013||3 ±100
+500 +250 +2.5 5,000 VDD+0.3
5.0V 5.0V -40°C +125°C
µV/°C -40°C +125°C ||pF ||pF µV/°C -40°C +125°C -0.3V 5.3V 3.0V 5.3V -0.3V 3.0V +85°C +125°C
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MCP6021/1R/2/3/4
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Parameters Power Supply Supply Voltage Quiescent Current Amplifier Response Gain Bandwidth Product Phase Margin Settling Time, 0.2% Slew Rate kHz, kHz, V/V, kHz, kHz, kHz, +100 Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density µVp-p fA/Hz nV/Hz GBWP tSETTLE THD+N THD+N THD+N THD+N THD+N 0.00053 0.00064 0.0014 0.0009 0.005 V/µs VOUT 0.25V 3.25V (1.75V 1.50VPK), 5.0V, VOUT 0.25V 3.25V (1.75V 1.50VPK), 5.0V, VOUT 4VP-P, 5.0V, VOUT 4VP-P, 5.0V, VOUT 4VP-P, 5.0V, V/V, VOUT mVp-p 1.35 Units Conditions
Total Harmonic Distortion Plus Noise
MCP6023 CHIP SELECT (CS) ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Parameters Specifications Logic Threshold, Input Current, High Specifications Logic Threshold, High Input Current, High Current Amplifier Output Leakage Dynamic Specifications Amplifier Output Turn-on Time High Amplifier Output High-Z Time Hysteresis tOFF VHYST 0.01 VSS, 0.2VDD VOUT 0.45VDD time VSS, 0.8VDD VOUT 0.05VDD time 5.0V, Internal Switch ICSH IO(LEAK) 0.01 -0.05 0.01 ICSL -1.0 0.01 Units Conditions
DS21685D-page
2009 Microchip Technology Inc.
MCP6021/1R/2/3/4
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, +2.5V +5.5V GND. Parameters Temperature Ranges Industrial Temperature Range Extended Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SOT-23 Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Thermal Resistance, 8L-TSSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note °C/W °C/W °C/W °C/W °C/W °C/W °C/W °C/W +125 +125 +150 Note Units Conditions
industrial temperature devices operate over this extended temperature range, with reduced performance. case, internal junction temperature (TJ) must exceed absolute maximum specification 150°C.
VOUT High-Z Amplifier (typical) tOFF High-Z
Test Circuits
test circuits used tests shown Figure Figure 1-3. bypass capacitors laid according rules discussed Section "Supply Bypass". MCP6021 VOUT
(typical) (typical)
(typical) (typical)
(typical)
FIGURE 1-1: Timing diagram MCP6023.
VDD/2
FIGURE 1-2: Test Circuit Most Non-Inverting Gain Conditions.
MCP6021 VOUT
VDD/2
FIGURE 1-3: Test Circuit Most Inverting Gain Conditions.
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Note:
TYPICAL PERFORMANCE CURVES
graphs tables provided following this note statistical summary based limited number samples provided informational purposes only. performance characteristics listed herein tested guaranteed. some graphs tables, data presented outside specified operating range (e.g., outside specified power supply range) therefore outside warranted range.
Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
-500 -400 -300 -200 -100
Percentage Occurances
Percentage Occurances
I-Temp Parts
1192 Samples +25°C
I-Temp Parts
1192 Samples -40°C +85°C
Input Offset Voltage (µV)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-1: Input Offset Voltage, (Industrial Temperature Parts).
FIGURE 2-4: Input Offset Voltage Drift, (Industrial Temperature Parts).
Percentage Occurances
-240
-200
-160
-120
Percentage Occurances
E-Temp Parts
Samples 5.0V +25°C
E-Temp Parts
Samples -40°C +125°C
Input Offset Voltage (µV)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-2: Input Offset Voltage, (Extended Temperature Parts).
2.5V -100 -200 -300 -400 -500 -0.5
FIGURE 2-5: Input Offset Voltage Drift, (Extended Temperature Parts).
-100 -200 -300 -400 -500
Input Offset Voltage (µV)
-40°C +25°C +85°C +125°C
Input Offset Voltage (µV)
5.5V
-40°C +25°C +85°C +125°C
-0.5
Common Mode Input Voltage
Common Mode Input Voltage
FIGURE 2-3: Input Offset Voltage Common Mode Input Voltage with 2.5V.
FIGURE 2-6: Input Offset Voltage Common Mode Input Voltage with 5.5V.
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Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
Input Offset Voltage (µV) Input Offset Voltage (µV) -100 -150 -200 -250 -300 Ambient Temperature (°C) 5.0V -100 -150 -200 Output Voltage 2.5V 5.5V
VDD/2
FIGURE 2-7: Temperature.
1,000 Input Noise Voltage Density (nV/Hz)
Input Offset Voltage
FIGURE 2-10: Output Voltage.
Input Noise Voltage Density (nV/Hz)
Input Offset Voltage
5.0V
1.E-01
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
Frequency (Hz)
100k
-0.5
Common Mode Input Voltage
FIGURE 2-8: Frequency.
CMRR, PSRR (dB)
1.E+02 1.E+03
Input Noise Voltage Density
FIGURE 2-11: Input Noise Voltage Density Common Mode Input Voltage.
PSRR+ PSRRPSRR, CMRR (dB)
PSRR (VCM CMRR
CMRR
1.E+04
1.E+05
1.E+06
Ambient Temperature (°C)
Frequency (Hz)
100k
FIGURE 2-9: Frequency.
CMRR, PSRR
FIGURE 2-12: Temperature.
CMRR, PSRR
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MCP6021/1R/2/3/4
Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
Input Bias, Offset Currents (pA) 10,000
1,000
Input Bias, Offset Currents (pA)
5.5V
+125°C IOS, +125°C +85°C
10,000
5.5V
1,000
IOS, +85°C
Common Mode Input Voltage
Ambient Temperature (°C)
FIGURE 2-13: Input Bias, Offset Currents Common Mode Input Voltage.
FIGURE 2-16: Temperature.
Input Bias, Offset Currents
Quiescent Current (mA/amplifier)
5.5V 2.5V
+125°C +85°C +25°C -40°C
Quiescent Current (mA/amplifier)
0.5V Ambient Temperature (°C)
Power Supply Voltage
FIGURE 2-14: Supply Voltage.
Output Short Circuit Current (mA)
Quiescent Current
FIGURE 2-17: Temperature.
Quiescent Current
+125°C +85°C +25°C -40°C Supply Voltage
1.E+00
Phase -105 -120 -135 -150 Gain -165 -180 -195 -210 100k 100M
1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08
Open-Loop Gain (dB)
Frequency (Hz)
FIGURE 2-15: Output Short-Circuit Current Supply Voltage.
FIGURE 2-18: Frequency.
Open-Loop Gain, Phase
2009 Microchip Technology Inc.
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Open-Loop Phase
MCP6021/1R/2/3/4
Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
Open-Loop Gain (dB) Open-Loop Gain (dB) 5.5V 2.5V
1.E+02
1.E+03 1.E+04 1.E+05
5.5V
2.5V
Load Resistance
100k
Ambient Temperature (°C)
FIGURE 2-19: Load Resistance.
Open-Loop Gain (dB)
Open-Loop Gain
FIGURE 2-22: Temperature.
Gain Bandwidth Product (MHz)
Open-Loop Gain
Phase Margin, 5.0V Common Mode Input Voltage Phase Margin, Gain Bandwidth Product
VDD/2 5.5V 0.00 2.5V
0.05
0.10
0.15
0.20
0.25
0.30
Output Voltage Headroom (V);
FIGURE 2-20: Small Signal Open-Loop Gain Output Voltage Headroom.
FIGURE 2-23: Gain Bandwidth Product, Phase Margin Common Mode Input Voltage.
Gain Bandwidth Product Phase Margin, 5.0V VDD/2 Output Voltage Phase Margin,
Gain Bandwidth Product (MHz)
Phase Margin,
Gain Bandwidth Product (MHz)
GBWP, 5.5V GBWP, 2.5V 2.5V 5.5V
Ambient Temperature (°C)
FIGURE 2-21: Gain Bandwidth Product, Phase Margin Temperature.
FIGURE 2-24: Gain Bandwidth Product, Phase Margin Output Voltage.
DS21685D-page
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MCP6021/1R/2/3/4
Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
Maximum Output Voltage Swing (VP-P)
Falling, 5.5V Rising, 5.5V
5.5V 2.5V
Slew Rate (V/µs)
Falling, 2.5V Rising, 2.5V
Ambient Temperature (°C)
1.E+04
1.E+05
1.E+06
1.E+07
100k Frequency (Hz)
FIGURE 2-25:
Slew Rate Temperature.
FIGURE 2-28: Maximum Output Voltage Swing Frequency.
0.1000% +100
0.1000%
BWMeas 5.0V THD+N +100
THD+N
0.0100%
0.0100%
0.0010% 0.0001% Output Voltage (VP-P)
0.0010%
BWMeas 5.0V
0.0001% Output Voltage (VP-P)
FIGURE 2-26: Total Harmonic Distortion plus Noise Output Voltage with kHz.
Input, Output Voltage Time µs/div) VOUT 5.0V
FIGURE 2-29: Total Harmonic Distortion plus Noise Output Voltage with kHz.
Channel Channel Separation (dB)
1.E+03 1.E+04 1.E+05 1.E+06
100k Frequency (Hz)
FIGURE 2-27: MCP6021/1R/2/3/4 family shows phase reversal under overdrive.
FIGURE 2-30: Channel-to-Channel Separation Frequency (MCP6022 MCP6024 only).
2009 Microchip Technology Inc.
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Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
1,000 Output Voltage Headroom; VDD-VOH VOL-VSS (mV) Output Voltage Headroom VDD-VOH VOL-VSS (mV)
0.01
Output Current Magnitude (mA)
Ambient Temperature (°C)
FIGURE 2-31: Output Voltage Headroom Output Current.
6.E-02
FIGURE 2-34: Temperature.
6.E-02
Output Voltage Headroom
5.E-02
Output Voltage mV/div)
5.E-02
Output Voltage mV/div)
4.E-02
4.E-02
3.E-02
3.E-02
2.E-02
2.E-02
1.E-02
1.E-02
0.E+00
0.E+00
-1.E-02
-1.E-02
-2.E-02
-2.E-02
-3.E-02
-3.E-02
-4.E-02
-4.E-02
-5.E-02
-5.E-02
-6.E-02 0.E+00 2.E-07 4.E-07 6.E-07 8.E-07 1.E-06 1.E-06 1.E-06 2.E-06 2.E-06 2.E-06
-6.E-02 0.E+00 2.E-07 4.E-07 6.E-07 8.E-07 1.E-06 1.E-06 1.E-06 2.E-06 2.E-06 2.E-06
Time (200 ns/div)
Time (200 ns/div)
FIGURE 2-32: Pulse Response.
Output Voltage
0.E+00 5.E-07 1.E-06 2.E-06
Small-Signal Non-inverting
FIGURE 2-35: Response.
Small-Signal Inverting Pulse
Output Voltage
2.E-06
3.E-06
3.E-06
4.E-06
4.E-06
5.E-06
5.E-06
0.E+00
5.E-07
1.E-06
2.E-06
2.E-06
3.E-06
3.E-06
4.E-06
4.E-06
5.E-06
5.E-06
Time (500 ns/div)
Time (500 ns/div)
FIGURE 2-33: Pulse Response.
Large-Signal Non-inverting
FIGURE 2-36: Response.
Large-Signal Inverting Pulse
DS21685D-page
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MCP6021/1R/2/3/4
Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
Power Supply Voltage
VREF Accuracy; DD/2 (mV)
VREF Accuracy; DD/2 (mV)
Representative Part
5.5V 2.5V
Ambient Temperature (°C)
FIGURE 2-37: VREF Accuracy Supply Voltage (MCP6021 MCP6023 only).
Quiescent Current (mA/amplifier) Chip Select Voltage 2.5V 1.25V swept high swept high Hysteresis
FIGURE 2-40: VREF Accuracy Temperature (MCP6021 MCP6023 only).
Quiescent Current (mA/amplifier)
turns here
shuts here
turns here
shuts here Hysteresis
swept high 5.5V 2.75V
swept high
Chip Select Voltage
FIGURE 2-38: Chip Select (CS) Hysteresis (MCP6023 only) with 2.5V.
-0.5
FIGURE 2-41: Chip Select (CS) Hysteresis (MCP6023 only) with 5.5V.
1.E-02 1.E-03 1.E-04 100µ 1.E-05 1.E-06 100n 1.E-07 1.E-08 1.E-09 100p 1.E-10 1.E-11 1.E-12
Chip Select Voltage, Output Voltage
Voltage
VOUT
Input Current Magnitude
5.0V
Output
Output High-Z
Output
+125°C +85°C +25°C -40°C
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1
0.0E+00 5.0E-06 1.0E-05 1.5E-05 2.0E-05 2.5E-05 3.0E-05 3.5E-05
Time µs/div)
Input Voltage
FIGURE 2-39: Chip Select (CS) Amplifier Output Response Time (MCP6023 only).
FIGURE 2-42: Measured Input Current Input Voltage (below VSS).
2009 Microchip Technology Inc.
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DESCRIPTIONS
Descriptions pins listed Table 3-1.
TABLE 3-1:
MCP6021 PDIP, SOIC, MSOP, TSSOP (Note
Note
FUNCTION TABLE
MCP6021R MCP6022 MCP6023 MCP6024 SOT-23-5 (Note PDIP, SOIC, TSSOP PDIP, SOIC, TSSOP PDIP, SOIC, TSSOP Symbol Description
SOT-23-5
VOUT, VOUTA Analog Output VIN-, VINA- VIN+, VINA+ VINB+ VINB- VOUTB VOUTC VINC- VINC+ VIND+ VIND- VOUTD VREF Inverting Input Non-inverting Input Positive Power Supply Non-inverting Input Inverting Input Analog Output Analog Output Inverting Input Non-inverting Input Negative Power Supply Non-inverting Input Inverting Input Analog Output Reference Voltage Chip Select Internal Connection
MCP6021 8-pin TSSOP package only available I-temp (Industrial Temperature) parts. MCP6021R only available 5-pin SOT-23 package, E-temp (Extended Temperature) parts.
Analog Outputs
Chip Select Digital Input (CS)
output pins low-impedance voltage sources.
This CMOS, Schmitt-triggered input that places part into power mode operation.
Analog Inputs
Power Supply (VSS VDD)
non-inverting inverting inputs highimpedance CMOS inputs with bias currents.
Reference Voltage (VREF, MCP6021 MCP6023
positive power supply (VDD) 2.5V 6.0V higher than negative power supply (VSS). normal operation, other pins voltages between VDD. Typically, these parts used single (positive) supply configuration. this case, connected ground connected supply. will need bypass capacitor.
Mid-supply reference voltage provided single amps (except SOT-23-5 package). This unbuffered, resistor voltage divider internal part.
2009 Microchip Technology Inc.
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APPLICATIONS INFORMATION
(minimum expected (minimum expected MCP602X MCP6021/1R/2/3/4 family operational amplifiers fabricated Microchip's state-of-the-art CMOS process. They unity-gain stable suitable wide range general-purpose applications.
4.1.1
Rail-to-Rail Input
PHASE REVERSAL
MCP6021/1R/2/3/4 designed prevent phase reversal when input pins exceed supply voltages. Figure 2-42 shows input voltage exceeding supply voltage without phase reversal.
4.1.2
INPUT VOLTAGE CURRENT LIMITS
protection inputs depicted shown Figure 4-1. This structure chosen protect input transistors, minimize input bias current (IB). input diodes clamp inputs when they more than diode drop below VSS. They also clamp voltages that above VDD; their breakdown voltage high enough allow normal operation, enough bypass quick events within specified limits.
FIGURE 4-2: Inputs.
Protecting Analog
also possible connect diodes left resistors this case, current through diodes needs limited some other mechanism. resistors then serve in-rush current limiters; current into input pins (VIN+ VIN-) should very small. significant amount current flow inputs when common mode voltage (VCM) below ground (VSS); Figure 2-42. Applications that high impedance need limit useable voltage range.
Bond
VIN+ Bond
Input Stage
Bond
4.1.3
NORMAL OPERATION
Bond
input stage MCP6021/1R/2/3/4 amps differential CMOS input stages parallel. operates common mode input voltage (VCM), while other operates high VCM. WIth this topology, device operates with 0.3V above 0.3V below VSS.
FIGURE 4-1: Structures.
Simplified Analog Input
Rail-to-Rail Output
order prevent damage and/or improper operation these amps, circuit they must limit currents voltages VIN+ VIN- pins (see Absolute Maximum Ratings beginning Section "Electrical Characteristics"). Figure shows recommended approach protecting these inputs. internal diodes prevent input pins (VIN+ VIN-) from going below ground, resistors limit possible current drawn input pins. Diodes prevent input pins (VIN+ VIN-) from going above VDD, dump currents onto VDD. When implemented shown, resistors also limit current through
Maximum Output Voltage Swing maximum swing possible under particular output load. According specification table, output reach within either supply rail when Figure 2-31 Figure 2-34 more information concerning typical performance.
Capacitive Loads
Driving large capacitive loads cause stability problems voltage feedback amps. load capacitance increases, feedback loop's phase margin decreases, closed loop bandwidth reduced. This produces gain-peaking frequency response, with overshoot ringing step response.
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MCP6021/1R/2/3/4
When driving large capacitive loads with these amps (e.g., when +1), small series resistor output (RISO Figure 4-3) improves feedback loop's phase margin (stability) making load resistive higher frequencies. bandwidth will generally lower than bandwidth with capacitive load. (unity gain). also reduces phase margin feedback loop both non-inverting inverting gains.
VOUT
MCP602X
RISO VOUT
FIGURE 4-3: Output Resistor RISO Stabilizes Large Capacitive Loads.
Figure gives recommended RISO values different capacitive loads gains. x-axis normalized load capacitance (CL/GN), where circuit's noise gain. non-inverting gains, Signal Gain equal. inverting gains, 1+|Signal Gain| (e.g., gives V/V).
1,000 Recommended RISO
FIGURE 4-5: Non-inverting Gain Circuit with Parasitic Capacitance.
largest value Figure that should used function noise gain (see Section "Capacitive Loads") Figure shows results various conditions. Other compensation techniques used, they tend more complicated design.
1.E+05 100k
Maximum
1.E+04
1.E+03
1.E+02
1,000 10,000 Normalized Capacitance; CL/GN (pF)
Noise Gain; (V/V)
FIGURE 4-4: Recommended RISO values capacitive loads.
After selecting RISO your circuit, double-check resulting frequency response peaking step response overshoot. Modify RISO's value until response reasonable. Evaluation bench simulations with MCP6021/1R/2/3/4 Spice macro model helpful.
FIGURE 4-6: Non-inverting gain circuit with parasitic capacitance.
MCP6023 Chip Select (CS)
Gain Peaking
Figure 2-35 Figure 2-36 avoid (frequency response) gain peaking (step response) overshoot. capacitance ground inverting input (CG) amp's common mode input capacitance plus board parasitic capacitance. parallel with which causes increase gain high frequencies non-inverting gains greater than
MCP6023 single amplifier with chip select (CS). When pulled high, supply current drops (typical) flows through VSS. When this happens, amplifier output into high-impedance state. pulling low, amplifier enabled. internal (typical) pulldown resistor connected VSS, will left floating. Figure Figure 2-39 show output voltage supply current response pulse.
DS21685D-page
2009 Microchip Technology Inc.
MCP6021/1R/2/3/4
MCP6021 MCP6023 Reference Voltage
VOUT
single amps (MCP6021 MCP6023), SOT-23-5 package, have internal mid-supply reference voltage connected VREF (see Figure 4-7). MCP6021 internally tied VSS, which always keeps always provides mid-supply reference. With MCP6023, taking high conserves power shutting down both VREF circuitry. Taking turns VREF circuitry. VREF
VREF
FIGURE 4-9: Inverting gain circuit using VREF (MCP6021 MCP6023 only).
don't need mid-supply reference, leave VREF open.
Supply Bypass
With this family operational amplifiers, power supply (VDD single supply) should have local bypass capacitor (i.e., 0.01 within good, high-frequency performance. also needs bulk capacitor (i.e., larger) within provide large, slow currents. This bulk capacitor shared with nearby analog parts.
tied internally MCP6021)
Unused Amps
FIGURE 4-7: Simplified internal VREF circuit (MCP6021 MCP6023 only).
Figure non-inverting gain circuit using internal mid-supply reference. DC-blocking capacitor (CB) also reduces noise coupling input source.
unused quad package (MCP6024) should configured shown Figure 4-10. These circuits prevent output from toggling causing crosstalk. Circuits sets minimum noise gain. resistor divider produces desired reference voltage within output voltage range amp; buffers that reference voltage. Circuit uses minimum number components operates comparator, draw more current. MCP6024 MCP6024 VREF
VOUT VREF
FIGURE 4-8: Non-inverting gain circuit using VREF (MCP6021 MCP6023 only).
internal mid-supply reference inverting gain circuit, connect VREF non-inverting input, shown Figure 4-9. capacitor helps reduce power supply noise output.
FIGURE 4-10:
Unused Amps.
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Surface Leakage
applications where input bias current critical, (printed circuit board) surface-leakage effects need considered. Surface leakage caused humidity, dust other contamination board. Under humidity conditions, typical resistance between nearby traces 1012. difference would cause current flow, which greater than MCP6021/1R/2/3/4 family's bias current +25°C typical). easiest reduce surface leakage guard ring around sensitive pins traces). guard ring biased same voltage sensitive pin. Figure 4-11 shows example this type layout. Guard Ring VIN- VIN+ Separate digital from analog, speed from high speed power from high power. This will reduce interference. Keep sensitive traces short straight. Separating them from interfering components traces. This especially important high-frequency (low rise-time) signals. Sometimes helps place guard traces next victim traces. They should both sides victim trace, close possible. Connect guard trace ground plane both ends, middle long traces. coax cables inductance wiring) route signal power from PCB.
4.11
4.11.1
Typical Applications
CONVERTER DRIVER ANTI-ALIASING FILTER
FIGURE 4-11: Layout.
Example Guard Ring
Figure 4-12 shows third-order Butterworth filter that used converter driver. bandwidth reasonable step response. will work well conversion rates ksps greater attenuation kHz).
Non-inverting Gain Unity-Gain Buffer. Connect guard ring inverting input (VIN-); this biases guard ring common mode input voltage. Connect non-inverting (VIN+) input with wire that does touch surface. Inverting (Figure 4-11) Transimpedance Gain Amplifiers (convert current voltage, such photo detectors). Connect guard ring non-inverting input (VIN+). This biases guard ring same reference voltage amp's input (e.g., VDD/2 ground). Connect inverting (VIN-) input with wire that does touch surface.
8.45 14.7 33.2 MCP602X
FIGURE 4-12: Converter Driver Anti-aliasing Filter with Cutoff Frequency.
This filter easily adjusted another bandwidth multiplying capacitors same factor. Alternatively, resistors scaled another common factor adjust bandwidth.
4.10
High Speed Layout
their speed capabilities, little extra care (Printed Circuit Board) layout make significant difference performance these amps. Good board layout techniques will help achieve performance shown Section "Electrical Characteristics" Section "Typical Performance Curves", while also helping minimize (Electro-Magnetic Compatibility) issues. solid ground plane connect bypass local capacitor(s) this plane with minimal length traces. This cuts down inductive capacitive crosstalk.
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4.11.2 OPTICAL DETECTOR AMPLIFIER
Figure 4-13 shows MCP6021 used transimpedance amplifier photo detector circuit. photo detector looks like capacitive current source, resistor gains input signal reasonable level. capacitor stabilizes this circuit produces flat frequency response with bandwidth kHz. MCP6021 VDD/2
Photo Detector
FIGURE 4-13: Transimpedance Amplifier Optical Detector.
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DESIGN AIDS
Microchip provides basic design tools needed MCP6021/1R/2/3/4 family amps.
Analog Demonstration Evaluation Boards
SPICE Macro Model
latest SPICE macro model available MCP6021/1R/2/3/4 amps Microchip's site www.microchip.com. This model intended initial design tool that works well amp's linear region operation room temperature. Within macro model file information capabilities. Bench testing very important part design cannot replaced with simulations. Also, simulation results using this macro model need validated comparing them data sheet specifications characteristic curves.
Microchip offers broad spectrum Analog Demonstration Evaluation Boards that designed help achieve faster time market. complete listing these boards their corresponding user's guides technical information, visit Microchip site www.microchip.com/analogtools. Some boards that especially useful are: MCP6XXX Amplifier Evaluation Board MCP6XXX Amplifier Evaluation Board MCP6XXX Amplifier Evaluation Board MCP6XXX Amplifier Evaluation Board Active Filter Demo Board 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board, P/N: SOIC8EV 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N: SOIC14EV
FilterLab® Software
Microchip's FilterLab® software innovative software tool that simplifies analog active filter (using amps) design. Available cost from Microchip site www.microchip.com/filterlab, FilterLab design tool provides full schematic diagrams filter circuit with component values. also outputs filter circuit SPICE format, which used with macro model simulate actual filter performance.
Application Notes
following Microchip Application Notes available Microchip site www.microchip. com/ appnotes recommended supplemental reference resources. ADN003: "Select Right Operational Amplifier your Filtering Circuits", DS21821 AN722: "Operational Amplifier Topologies Specifications", DS00722 AN723: "Operational Amplifier Specifications Applications", DS00723 AN884: "Driving Capacitive Loads With Amps", DS00884 AN990: "Analog Sensor Conditioning Circuits Overview", DS00990 AN1177: Precision Design: Errors", DS01177 AN1228: Precision Design: Random Noise", DS01228 These application notes others listed design guide: "Signal Chain Design Guide", DS21825
MindiCircuit Designer Simulator
Microchip's MindiCircuit Designer Simulator aids design various circuits useful active filter, amplifier power-management applications. free online circuit designer simulator available from Microchip site www.microchip.com/mindi. This interactive circuit designer simulator enables designers quickly generate circuit diagrams, simulate circuits. Circuits developed using Mindi Circuit Designer Simulator downloaded personal computer workstation.
Microchip Advanced Part Selector (MAPS)
MAPS software tool that helps semiconductor professionals efficiently identify Microchip devices that particular design requirement. Available cost from Microchip site www.microchip.com/ maps, MAPS overall selection tool Microchip's product portfolio that includes Analog, Memory, MCUs DSCs. Using this tool define filter sort features parametric search devices export side-by-side technical comparison reports. Helpful links also provided Data sheets, Purchase, Sampling Microchip parts.
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PACKAGING INFORMATION
Package Marking Information
5-Lead SOT-23 (MCP6021/MCP6021R) Example: (E-temp)
Device
E-Temp Code EYNN EZNN
XXNN
MCP6021 MCP6021R
EY25
Note: Applies 5-Lead SOT-23
8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW
Example: MCP6021 I/P256 0903 MCP6021 E/P^^256 0903
8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW
Example: MCP6021 I/SN0903 MCP6021E SN^^0903
8-Lead MSOP XXXXXX YWWNNN
Example: 6021E 903256
8-Lead TSSOP
Example:
XXXX YYWW
6021 E903
Legend: XX.X
Customer-specific information Year code (last digit calendar year) Year code (last digits calendar year) Week code (week January week `01') Alphanumeric traceability code Pb-free JEDEC designator Matte (Sn) This package Pb-free. Pb-free JEDEC designator found outer packaging this package.
Note:
event full Microchip part number cannot marked line, will carried over next line, thus limiting number available characters customer-specific information.
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Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6024) Example:
XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN
MCP6024-I/P XXXXXXXXXXXXXX 0903256
MCP6024 E/P^^ 0903256
14-Lead SOIC (150 mil) (MCP6024)
Example:
XXXXXXXXXX XXXXXXXXXX YYWWNNN
MCP6024ISL XXXXXXXXXX 0903256
MCP6024 E/SL^^ 0903256
14-Lead TSSOP (MCP6024)
Example:
XXXXXX YYWW
6024E 0903
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APPENDIX REVISION HISTORY
Revision (November 2003)
Second Release this Document
Revision (February 2009)
following list modifications: Changed references 6.0V back 5.5V throughout document. Design Aids: Name change Mindi Simulation Tool. Section "Electrical Characteristics", Electrical Specifications: Corrected "Maximum Output Voltage Swing" condition from 0.9V Input Overdrive 0.5V Input Overdrive. Section "Electrical Characteristics", Electrical Specifications: Changed Phase Margin condition from V/V. Section "Electrical Characteristics", Electrical Specifications: Changed Settling Time, 0.2% condition from V/V. Section "Electrical Characteristics": Added Section Test Circuits. Section "Design AIDS": Name change Mindi Simulation Tool. Added boards Section "Analog Demonstration Evaluation Boards" application notes Section "Application Notes". Updates Appendix "Revision History"
Revision (November 2001)
Original Release this Document.
Revision (March 2006)
following list modifications: Added SOT-23-5 package option single amps MCP6021 MCP6021R (E-temp only). Added MSOP-8 package option E-temp single (MCP6021). Corrected package drawing front page dual (MCP6022). Clarified spec conditions (ISC, THD+N) Section "Typical Performance Curves". Added Section "Pin Descriptions". Updated Section "Applications information" THD+N, unused amps, gain peaking discussions. Corrected updated package marking information Section "Packaging Information". Added Appendix "Revision History".
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PRODUCT IDENTIFICATION SYSTEM
order obtain information, e.g., pricing delivery, refer factory listed sales office. PART Device Temperature Range Package
Device: MCP6021 MCP6021T Single Single (Tape Reel SOT-23, SOIC, TSSOP, MSOP) MCP6021R Single MCP6021RT Single (Tape Reel SOT-23) MCP6022 Dual MCP6022T Dual (Tape Reel SOIC TSSOP) MCP6023 Single MCP6023T Single (Tape Reel SOIC TSSOP) MCP6024 Quad MCP6024T Quad (Tape Reel SOIC TSSOP)
Examples:
MCP6021T-E/OT: Tape Reel, Extended temperature, SOT-23. MCP6021-E/P: Extended temperature, PDIP. MCP6021-E/SN: Extended temperature, SOIC. MCP6021RT-E/OT:Tape Reel, Extended temperature, SOT-23. MCP6022-I/P: Industrial temperature, PDIP. MCP6022-E/P: Extended temperature, PDIP. MCP6022T-E/ST: Tape Reel, Extended temperature, TSSOP. Industrial temperature, PDIP. MCP6023-E/P: Extended temperature, PDIP. MCP6023-E/SN: Extended temperature, SOIC.
MCP6023-I/P:
Temperature Range:
-40°C +85°C -40°C +125°C
Package:
Plastic Small Outline Transistor (SOT-23), 5-lead (MCP6021, E-Temp; MCP6021R, E-Temp) Plastic MSOP, 8-lead (MCP6021, E-Temp) Plastic (300 Body), 8-lead, 14-lead Plastic SOIC (150mil Body), 8-lead Plastic SOIC (150 Body), 14-lead Plastic TSSOP, 8-lead (MCP6021,I-Temp; MCP6022, I-Temp, E-Temp; MCP6023, I-Temp, E-Temp;) Plastic TSSOP, 14-lead
MCP6024-I/SL:
Industrial temperature, 14LD SOIC. MCP6024-E/SL: Extended temperature, 14LD SOIC. MCP6024T-E/ST: Tape Reel, Extended temperature, 14LD TSSOP.
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Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable."
Code protection constantly evolving. Microchip committed continuously improving code protection features products. Attempts break Microchip's code protection feature violation Digital Millennium Copyright Act. such acts allow unauthorized access your software other copyrighted work, have right relief under that Act.
Information contained this publication regarding device applications like provided only your convenience superseded updates. your responsibility ensure that your application meets with your specifications. MICROCHIP MAKES REPRESENTATIONS WARRANTIES KIND WHETHER EXPRESS IMPLIED, WRITTEN ORAL, STATUTORY OTHERWISE, RELATED INFORMATION, INCLUDING LIMITED CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY FITNESS PURPOSE. Microchip disclaims liability arising from this information use. Microchip devices life support and/or safety applications entirely buyer's risk, buyer agrees defend, indemnify hold harmless Microchip from damages, claims, suits, expenses resulting from such use. licenses conveyed, implicitly otherwise, under Microchip intellectual property rights.
Trademarks Microchip name logo, Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC, SmartShunt UNI/O registered trademarks Microchip Technology Incorporated U.S.A. other countries. FilterLab, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL, SmartSensor Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock ZENA trademarks Microchip Technology Incorporated U.S.A. other countries. SQTP service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2009, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved. Printed recycled paper.
Microchip received ISO/TS-16949:2002 certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona; Gresham, Oregon design centers California India. Company's quality system processes procedures PIC® MCUs dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory analog products. addition, Microchip's quality system design manufacture development systems 9001:2000 certified.
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Worldwide Sales Service
AMERICAS
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02/04/09
DS21685D-page
2009 Microchip Technology Inc.

Rail-to-Rail Input/Output, Amps Rail-to-Rail Input/Output Wide Ba

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