PIC24FJ256GA110 Family Data Sheet Errata Device Data Sheet (DS399
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PIC24FJ256GA110 FAMILY
PIC24FJ256GA110 Family Data Sheet Errata
Device Data Sheet (DS39905B), following clarifications corrections should noted. silicon issues related PIC24FJ256GA110 family will reported separate silicon errata. Please check Microchip site existing issues.
Module: Electrical Characteristics
following tables changed with modified values shown bold text: Table 27-4: Characteristics: Operating Current (IDD) Table 27-5: Characteristics: Idle Current (iIDLE) Table 27-6: Characteristics: Power-Down Current (IPD)
2009 Microchip Technology Inc.
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TABLE 27-4: CHARACTERISTICS: OPERATING CURRENT (IDD)
Standard Operating Conditions: 2.0V 3.6V (unless otherwise stated) Operating temperature -40°C +85°C Industrial Units Conditions CHARACTERISTICS Parameter Typical(1)
Operating Current (IDD)(2) DC20 DC20a DC20b DC20d DC20e DC20f DC23 DC23a DC23b DC23d DC23e DC23f DC24 DC24a DC24b DC24d DC24e DC24f DC31 DC31a DC31b DC31d DC31e DC31f Note 0.83 0.83 0.83 18.2 18.2 18.2 18.2 18.2 18.2 15.0 15.0 20.0 57.0 57.0 95.0 24.0 24.0 24.0 24.0 24.0 24.0 35.0 35.0 50.0 75.0 75.0 124.0 -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C 3.3V(4) 2.0V(3) LPRC kHz) 3.3V(4) 2.5V(3) MIPS 3.3V(4) 2.0V(3) MIPS 3.3V(4) 2.0V(3) MIPS
Data "Typical" column 3.3V, 25°C unless otherwise stated. Parameters design guidance only tested. supply current mainly function operating voltage frequency. Other factors, such loading switching rate, oscillator type, internal code execution pattern temperature, also have impact current consumption. test conditions measurements follows: OSCI driven with external square wave from rail rail. pins configured inputs pulled VDD. MCLR VDD; FSCM disabled. CPU, SRAM, program memory data memory operational. peripheral modules operating Peripheral Module Disable (PMD) bits set. On-chip voltage regulator disabled (ENVREG tied VSS). On-chip voltage regulator enabled (ENVREG tied VDD), Low-Voltage Detect (LVD) Brown-out Detect (BOD) enabled.
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PIC24FJ256GA110 FAMILY
TABLE 27-5: CHARACTERISTICS: IDLE CURRENT (IIDLE)
Standard Operating Conditions: 2.0V 3.6V (unless otherwise stated) Operating temperature -40°C +85°C Industrial Units Conditions CHARACTERISTICS Parameter Typical(1)
Idle Current (IIDLE)(2) DC40 DC40a DC40b DC40d DC40e DC40f DC43 DC43a DC43b DC43d DC43e DC43f DC47 DC47a DC47b DC47c DC47d DC47e DC50 DC50a DC50b DC50d DC50e DC50f DC51 DC51a DC51b DC51d DC51e DC51f Note 0.85 0.85 0.87 10.0 44.0 44.0 70.0 60.0 60.0 115.0 -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C 3.3V(4) 2.0V(3) LPRC kHz) 3.3V(4) 2.0V(3) MIPS) 3.3V(4) 2.5V(3) MIPS 3.3V(4) 2.0V(3) MIPS 3.3V(4) 2.0V(3) MIPS
Data "Typical" column 3.3V, 25°C unless otherwise stated. Parameters design guidance only tested. Base IIDLE current measured with core off, OSCI driven with external square wave from rail rail. pins configured inputs pulled VDD. MCLR VDD; FSCM disabled. peripheral modules operating Peripheral Module Disable (PMD) bits set. On-chip voltage regulator disabled (ENVREG tied VSS). On-chip voltage regulator enabled (ENVREG tied VDD), Low-Voltage Detect (LVD) Brown-out Detect (BOD) enabled.
2009 Microchip Technology Inc.
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PIC24FJ256GA110 FAMILY
TABLE 27-6: CHARACTERISTICS: POWER-DOWN CURRENT (IPD)
Standard Operating Conditions: 2.0V 3.6V (unless otherwise stated) Operating temperature -40°C +85°C Industrial Units Conditions CHARACTERISTICS Parameter Typical(1)
Power-Down Current (IPD)(2) DC60 DC60a DC60b DC60c DC60d DC60e DC60f DC60g DC60h DC61 DC61a DC61b DC61c DC61d DC61e DC61f DC61g DC61h DC62 DC62a DC62b DC62c DC62d DC62e DC62f DC62g DC62h Note 0.15 0.25 11.0 1.75 1.75 1.75 18.0 27.0 10.0 10.0 36.0 10.0 10.0 10.0 -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C -40°C +25°C +85°C 3.3V(4) 2.5V(3) RTCC Timer1 w/32 Crystal: RTCC ITI32(5) 2.0V(3) 3.3V(4) 2.5V(3) Watchdog Timer Current: IWDT(5) 2.0V(3) 3.3V(4) 2.5V(3) Base Power-Down Current(5) 2.0V(3)
Data Typical column 3.3V, 25°C unless otherwise stated. Parameters design guidance only tested. Base measured with peripherals clocks shut down. I/Os configured inputs pulled high. WDT, etc., switched off, Peripheral Module Disable (PMD) bits unused peripherals set. On-chip voltage regulator disabled (ENVREG tied VSS). On-chip voltage regulator enabled (ENVREG tied VDD), Low-Voltage Detect (LVD) Brown-out Detect (BOD) enabled. current additional current consumed when module enabled. This current should added base current.
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2009 Microchip Technology Inc.
PIC24FJ256GA110 FAMILY
Module: Electrical Specifications
specification, BO10, device Brown-out Reset voltage (VBOR), been added Table 27-3 device data sheet. shown bold below (bold text from original table removed clarity).
Module: Electrical Specifications
specification Internal Reference Band Voltage, VBG, been added Table 27-10 device data sheet. shown bold below (bold text from original table removed clarity).
TABLE 27-3:
CHARACTERISTICS: TEMPERATURE VOLTAGE SPECIFICATIONS
Standard Operating Conditions: 2.0V 3.6V (unless otherwise stated) Operating temperature -40°C +85°C Industrial Typ(1) Units Conditions
CHARACTERISTICS Param Symbol Characteristic
Operating Voltage DC10 Supply Voltage VDDCORE DC12 DC16 VPOR Data Retention Voltage(2) Start Voltage Ensure Internal Power-on Reset Signal Rise Rate Ensure Internal Power-on Reset Signal Brown-out Reset Voltage VDDCORE 2.75 Regulator enabled Regulator disabled Regulator disabled
DC17
SVDD
V/ms
0-3.3V 0.1s 0-2.5V
BO10
VBOR
2.05
Note
Data "Typ" column 3.3V, 25°C unless otherwise stated. Parameters design guidance only tested. This limit which lowered without losing data.
TABLE 27-10: INTERNAL VOLTAGE REGULATOR SPECIFICATIONS
Operating Conditions: -40°C +85°C (unless otherwise stated) Param Symbol VRGOUT CEFC Characteristics Regulator Output Voltage Internal Band Reference External Filter Capacitor Value Units Series resistance recommended; required. ENVREG tied ENVREG tied Comments
TVREG TPWRT
2009 Microchip Technology Inc.
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Module: Diagrams
64-pin device diagram page reference SCK1 deleted. correct complete designation this "RPI45/ INT0/CN72/RF6". SCK1 function available only through Peripheral Select (PPS), permanently multiplexed this device.
Module: Memory Organization (SFR Space)
Table 3-18 device data sheet (PORTG Register Map), footnote references columns incorrect. These bits, their corresponding channels, actually available 80-pin devices. amended version table with correct footnote shown Table 3-18 (additions changes bold).
Module: Memory Organization (SFR Space)
Table device data sheet (Interrupt Controller Register Map), bits INTCON2 incorrectly shown unimplemented. These positions actually implemented INT4EP INT3EP, respectively. amended partial version table with correct footnote shown Table (additions bold).
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2009 Microchip Technology Inc.
2009 Microchip Technology Inc. DS80385B-page
TABLE 3-5:
File Name INTCON1 INTCON2 Legend: Addr 0080 0082
INTERRUPT CONTROLLER REGISTER (PARTIAL REPRESENTATION)
NSTDIS ALTIVT DISI INT0EP Resets 0000 0000
MATHERR ADDRERR STKERR OSCFAIL INT4EP INT3EP INT2EP INT1EP
unimplemented, read `0'. Reset values shown hexadecimal.
TABLE 3-18:
File Name TRISG PORTG LATG ODCG Legend: Note Addr 02F0 02F2 02F4 02F6
PORTG REGISTER
15(1) 14(1) 13(1) 12(1) TRISG9 LATG9 ODG9 TRISG8 LATG8 ODG8 TRISG7 LATG7 ODG7 TRISG6 LATG6 ODG6 TRISG3 LATG3 ODG3 TRISG2 LATG2 ODG2 1(2) TRISG1 LATG1 ODG1 0(2) TRISG0 LATG0 ODG0 Resets F3CF xxxx xxxx 0000
TRISG15 TRISG14 TRISG13 TRISG12 RG15 LATG15 ODG15 RG14 LATG14 ODG14 RG13 LATG13 ODG13 RG12 LATG12 ODG12
unimplemented, read `0'. Reset values shown hexadecimal. Reset values shown 100-pin devices. Bits unimplemented 64-pin 80-pin devices; read `0'. Bits unimplemented 64-pin devices; read `0'.
PIC24FJ256GA110 FAMILY
PIC24FJ256GA110 FAMILY
Module: Interrupt Controller
Register (INTCON2), bits INTCON2, currently shown unimplemented, fact implemented INT4EP INT3EP, respectively. amended partial version this register shown below (changes bold).
Module: Timer2/3 Timer4/5
bulleted list paragraph Section 11.0 "Timer2/3 Timer4/5", stated that event trigger only associated with Timer4/5. fact, trigger only associated with Timer2/3. This correctly noted other occurrences chapter.
REGISTER 6-4:
R/W-0 ALTIVT Legend: Readable Value 13-5
INTCON2: INTERRUPT CONTROL REGISTER (PARTIAL REPRESENTATION)
DISI R/W-0 INT4EP R/W-0 INT3EP R/W-0 INT2EP R/W-0 INT1EP R/W-0 INT0EP
Writable
Unimplemented bit, read cleared unknown
Unimplemented: Read INT4EP: External Interrupt Edge Detect Polarity Select Interrupt negative edge Interrupt positive edge INT3EP: External Interrupt Edge Detect Polarity Select Interrupt negative edge Interrupt positive edge
DS80385B-page
2009 Microchip Technology Inc.
PIC24FJ256GA110 FAMILY
Module: 10-Bit High-Speed Converter
Register 20-1 (AD1CON1), descriptions provided various combinations SSRC<2:0> bits (ADCON1<7:5>) incorrect. Specifically, while number type trigger sources reported correctly, several associated with wrong combinations. correct order trigger sources listed below (changes bold).
Module: Special Features
Register 24-3 (CW3), explanatory text with Configuration bits, WPFP<8:0> (CW3<8:0>), changed agree with text Section 24.4.2 "Code Segment Protection". register text follows (change bold): "Designates 512-byte program code page that boundary protected code segment, starting with Page bottom program memory."
REGISTER 20-1:
AD1CON1: CONTROL REGISTER (PARTIAL REPRESENTATION)
SSRC2:SSRC0: Conversion Trigger Source Select bits Internal counter ends sampling starts conversion (auto-convert) CTMU event ends sampling starts conversion Reserved Timer5 compare ends sampling starts conversion Reserved Timer3 compare ends sampling starts conversion Active transition INT0 ends sampling starts conversion Clearing SAMP ends sampling starts conversion
2009 Microchip Technology Inc.
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REVISION HISTORY
Document (7/2008) Initial release this data sheet errata. Includes Data Sheet Clarification (Electrical Characteristics). Document (1/2009) Added Data Sheet Clarifications (Electrical Characteristics), (Pin Diagrams), (Memory Organization), (Interrupt Controller), (Timer2/3 Timer4/5), (10-Bit High-Speed Converter) (Special Features).
DS80385B-page
2009 Microchip Technology Inc.
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