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MHz, Amps Gain Bandwidth Product: (typical) Short Circuit Current
Top Searches for this datasheetMCP631/2/3/5 MHz, Amps Gain Bandwidth Product: (typical) Short Circuit Current: (typical) Noise: nV/Hz (typical, MHz) Rail-to-Rail Output Slew Rate: V/µs (typical) Supply Current: (typical) Power Supply: 2.5V 5.5V Extended Temperature Range: -40°C +125°C Description Microchip Technology, Inc. MCP631/2/3/5 family operational amplifiers features high gain bandwidth product MHz, typical) high output short circuit current typical). Some also provide Chip Select (CS) that supports power mode operation. These amplifiers optimized high speed, noise distortion, single-supply operation with rail-to-rail output input that includes negative rail. This family offered single (MCP631), single with (MCP633), dual (MCP632) dual with pins (MCP635). devices fully specified from -40°C +125°C. Typical Applications Driving Converters Power Amplifier Control Loops Barcode Scanners Optical Detector Amplifier Typical Application Circuit VDD/2 MCP63X Power Driver with High Gain VOUT Design Aids SPICE Macro Models FilterLab® Software MindiCircuit Designer Simulator Microchip Advanced Part Selector (MAPS) Analog Demonstration Evaluation Boards Application Notes Package Types MCP631 SOIC VIN- VIN+ VOUT MCP632 SOIC VOUTA VINA- VINA+ VOUTB VINB- VINB+ MCP633 SOIC VIN- VIN+ VOUT MCP635 MSOP VOUTA VINA- VINA+ VOUTB VINB- VINB+ MCP632 VOUTA VINA- VINA+ VOUTB VINB- VINB+ VOUTA VINA- VINA+ MCP635 VOUTB VINB- VINB+ Includes Exposed Thermal (EP); Table 3-1. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 NOTES: DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings .6.5V Current Input Pins Analog Inputs (VIN+ VIN-) 1.0V 1.0V other Inputs Outputs 0.3V 0.3V Output Short Circuit Current Continuous Current Output Supply Pins .±150 Storage Temperature .-65°C +150°C Max. Junction Temperature +150°C protection pins (HBM, 200V Notice: Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability. Section 4.1.2 "Input Voltage Current Limits". Specifications ELECTRICAL SPECIFICATIONS TABLE 1-1: Electrical Characteristics: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, (refer Figure 1-2). Parameters Input Offset Input Offset Voltage Input Offset Voltage Drift Power Supply Rejection Ratio Input Current Impedance Input Bias Current Across Temperature Across Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common-Mode Input Voltage Range Common-Mode Rejection Ratio Open Loop Gain Open Loop Gain (large signal) Output Maximum Output Voltage Swing VOS/TA PSRR ZDIFF VCMR CMRR CMRR VOL, VOL, ±1.8 ±2.0 1500 1013||2 5,000 ±130 ±110 Units Conditions µV/°C -40°C +125°C ||pF ||pF Load Current (Note 2.5V, -0.3 1.2V 5.5V, -0.3 4.2V 2.5V, VOUT 0.3V 2.2V 5.5V, VOUT 0.3V 5.2V 2.5V, 0.5V Input Overdrive 5.5V, 0.5V Input Overdrive 2.5V (Note 5.5V (Note +85°C +125°C Output Short Circuit Current Power Supply Supply Voltage Quiescent Current Amplifier Note Figure temperature effects. specifications design guidance only; they tested. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 TABLE 1-2: ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2, (refer Figure 1-2). Parameters Response Gain Bandwidth Product Phase Margin Open Loop Output Impedance Distortion Total Harmonic Distortion plus Noise Step Response Rise Time, Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density GBWP ROUT THD+N 0.0015 Units Conditions VOUT 2VP-P, kHz, 5.5V, VOUT mVP-P V/µs µVP-P nV/Hz fA/Hz TABLE 1-3: DIGITAL ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2, (refer Figure Figure 1-2). Parameters Specifications Logic Threshold, Input Current, High Specifications Logic Threshold, High Input Current, High Current Internal Pull Down Resistor Amplifier Output Leakage Dynamic Specifications Input Hysteresis High Amplifier Time (output goes High-Z) Amplifier Time Units Conditions ICSL ICSH IO(LEAK) VHYST tOFF 0.2VDD 0.8VDD VDD, +125°C 0.25 V/V, 0.8VDD VOUT 0.1(VDD/2) V/V, VSS, 0.2VDD VOUT 0.9(VDD/2) DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 TABLE 1-4: TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, limits specified for: +2.5V +5.5V, GND. Parameters Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range 149.5 +125 +125 +150 Units °C/W °C/W °C/W °C/W (Note (Note (Note Conditions Thermal Package Resistances Thermal Resistance, 8L-3x3 Thermal Resistance, 8L-SOIC Thermal Resistance, 10L-3x3 Thermal Resistance, 10L-MSOP Note Operation must cause exceed Maximum Junction Temperature specification (+150°C). Measured standard JC51-7, four layer printed circuit board with ground plane vias. Timing Diagram (typical) VOUT High-Z -2.5 (typical) tOFF High-Z (typical) EQUATION 1-1: Where: Differential Mode Gain Noise Gain Amp's Common Mode Input Voltage VOST Amp's Total Input Offset Voltage (V/V) (V/V) (mV) (typical) (typical) (typical) FIGURE 1-1: Timing Diagram. VIN+ MCP63X VIN- VOUT Test Circuits circuit used most tests shown Figure 1-2. independently sets VOUT; Equation 1-1. circuit's common mode voltage VM)/2, VCM. VOST includes plus effects temperature, CMRR, PSRR AOL. VREF VDD/2 FIGURE 1-2: Test Circuit Most Specifications. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 NOTES: DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 Note: TYPICAL PERFORMANCE CURVES graphs tables provided following this note statistical summary based limited number samples provided informational purposes only. performance characteristics listed herein tested guaranteed. some graphs tables, data presented outside specified operating range (e.g., outside specified power supply range) therefore outside warranted range. Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. Percentage Occurrences Signal Inputs Samples +25°C 2.5V 5.5V -1.0 -1.2 -1.4 -1.6 -1.8 -2.0 -2.2 -2.4 -2.6 -2.8 -3.0 Representative Part Input Offset Voltage (mV) 2.5V 5.5V Input Offset Voltage (mV) Output Voltage FIGURE 2-1: Input Offset Voltage. FIGURE 2-4: Output Voltage. Input Common Mode Headroom -0.1 -0.2 -0.3 -0.4 -0.5 Input Offset Voltage Percentage Occurrences Samples 2.5V 5.5V -40°C +125°C (VCMR_L VSS) 2.5V 5.5V Input Offset Voltage Drift (µV/°C) Ambient Temperature (°C) FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-5: Input Common Mode Voltage Headroom Ambient Temperature. High Input Common Mode Headroom 5.5V 2.5V High (VDD VCMR_H) -2.0 -2.2 -2.4 -2.6 -2.8 -3.0 -3.2 -3.4 -3.6 -3.8 -4.0 Input Offset Voltage (mV) Representative Part +125°C +85°C +25°C -40°C Power Supply Voltage Ambient Temperature (°C) FIGURE 2-3: Input Offset Voltage Power Supply Voltage with 2009 Microchip Technology Inc. FIGURE 2-6: High Input Common Mode Voltage Headroom Ambient Temperature. DS22197A-page MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. Input Offset Voltage (mV) -0.5 -1.0 -1.5 -2.0 -0.5 Input Common Mode Voltage Open-Loop Gain (dB) 2.5V Representative Part +125°C +85°C +25°C -40°C Ambient Temperature (°C) 5.5V 2.5V FIGURE 2-7: Input Offset Voltage Common Mode Voltage with 2.5V. Input Offset Voltage (mV) -0.5 -1.0 -1.5 -2.0 -0.5 Input Common Mode Voltage 5.5V Representative Part +125°C +85°C +25°C -40°C FIGURE 2-10: Open-Loop Gain Ambient Temperature. Open-Loop Gain (dB) 1.E+02 1.E+03 1.E+04 Load Resistance 100k 1.E+05 2.5V 5.5V FIGURE 2-8: Input Offset Voltage Common Mode Voltage with 5.5V. FIGURE 2-11: Load Resistance. 1.E-08 Input Bias, Offset Currents (pA) 1.E-09 100p 1.E-10 1.E-11 5.5V VCMR_H Open-Loop Gain CMRR, PSRR (dB) CMRR, 2.5V CMRR, 5.5V PSRR 1.E-12 Ambient Temperature (°C) Ambient Temperature (°C) FIGURE 2-9: CMRR PSRR Ambient Temperature. FIGURE 2-12: Input Bias Offset Currents Ambient Temperature with +5.5V. DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. 1.E-03 Input Current Magnitude 100µ 1.E-04 1.E-05 1.E-06 100n 1.E-07 1.E-08 1.E-09 100p 1.E-10 1.E-11 1.E-12 +125°C +85°C +25°C -40°C 2000 Input Bias, Offset Currents (pA) 1500 1000 -500 -1000 -1500 Representative Part +125°C 5.5V -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 Input Voltage Common Mode Input Voltage FIGURE 2-13: Input Bias Current Input Voltage (below VSS). FIGURE 2-15: Input Bias Offset Currents Common Mode Input Voltage with +125°C. Input Bias, Offset Currents (pA) -100 -150 -200 Common Mode Input Voltage Representative Part +85°C 5.5V FIGURE 2-14: Input Bias Offset Currents Common Mode Input Voltage with +85°C. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. Other Voltages Currents 1000 5.5V Output Voltage Headroom (mV) Supply Current (mA/amplifier) Power Supply Voltage +125°C +85°C +25°C -40°C 2.5V Output Current Magnitude (mA) FIGURE 2-16: Output Voltage Headroom Output Current. FIGURE 2-19: Supply Voltage. Supply Current (mA/amplifier) Supply Current Power Output Headroom (mV) 5.5V 5.5V 2.5V 2.5V -0.5 Common Mode Input Voltage Ambient Temperature (°C) FIGURE 2-17: Output Voltage Headroom Ambient Temperature. -100 FIGURE 2-20: Supply Current Common Mode Input Voltage. Output Short Circuit Current (mA) +125°C +85°C +25°C -40°C Power Supply Voltage FIGURE 2-18: Output Short Circuit Current Power Supply Voltage. DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. Frequency Response Gain Bandwidth Product (MHz) 1.E+3 100k 1.E+5 Frequency (Hz) 1.E+4 1.E+6 1.E+7 -0.5 Common Mode Input Voltage GBWP Phase Margin Phase Margin 5.5V 2.5V CMRR, PSRR (dB) 1.E+2 CMRR PSRR+ PSRR- FIGURE 2-21: Frequency. CMRR PSRR FIGURE 2-24: Gain Bandwidth Product Phase Margin Common Mode Input Voltage. Gain Bandwidth Product (MHz) Output Voltage GBWP Open-Loop Gain (dB) 5.5V 2.5V -120 -150 -180 -210 -240 Open-Loop Phase 1.E+5 1.E+7 1.E+8 1.E+0 1.E+1 1.E+2 1.E+3 1.E+4 100k 1.E+6 100M Frequency (Hz) FIGURE 2-22: Frequency. Gain Bandwidth Product (MHz) 5.5V 2.5V Open-Loop Gain FIGURE 2-25: Gain Bandwidth Product Phase Margin Output Voltage. Phase Margin Closed-Loop Output Impedance GBWP Ambient Temperature (°C) 1.0E+04 100k 1.0E+05 1.0E+06 1.0E+07 Frequency (Hz) 100M 1.0E+08 FIGURE 2-23: Gain Bandwidth Product Phase Margin Ambient Temperature. FIGURE 2-26: Closed-Loop Output Impedance Frequency. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. 1.0E-11 100p 1.0E-10 1.0E-09 Normalized Capacitive Load; CL/GN Channel-to-Channel Separation; (dB) Gain Peaking (dB) 1.E+03 1.E+04 VDD/2 100k 1.E+05 1.E+06 Frequency (Hz) 1.E+07 FIGURE 2-27: Gain Peaking Normalized Capacitive Load. FIGURE 2-28: Channel-to-Channel Separation Frequency. DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. Input Noise Voltage Density (V/Hz) 1.E+4 Noise Distortion Input Noise; ni(t) (µV) 1.E+0 1.E+1 1.E+2 Frequency (Hz) 1.E+3 1.E+4 100k 1.E+6 1.E+7 1.E+5 Analog NPBW Sample Rate -3150 Representative Part 1.E+3 100n 1.E+2 1.E+1 1.E+0 1.E-1 Time (min) FIGURE 2-29: Frequency. Input Noise Voltage Density FIGURE 2-32: Filter. Input Noise Time with Input Noise Voltage Density (nV/Hz) 2.5V Noise 5.5V 0.01 0.001 5.0V VOUT VP-P -0.5 0.0001 1.E+2 1.E+3 Common Mode Input Voltage 1.E+4 Frequency (Hz) 100k 1.E+5 FIGURE 2-30: Input Noise Voltage Density Input Common Mode Voltage with FIGURE 2-33: THD+N Frequency. Input Noise Voltage Density (nV/Hz) 2.5V 5.5V -0.5 Common Mode Input Voltage FIGURE 2-31: Input Noise Voltage Density Input Common Mode Voltage with MHz. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. Time Response 5.5V VOUT Output Voltage mV/div) Output Voltage 5.5V VOUT Time (µs) Time (µs) FIGURE 2-34: Step Response. Non-inverting Small Signal FIGURE 2-37: Response. Input, Output Voltages Inverting Large Signal Step 5.5V 5.5V VOUT Output Voltage VOUT Time (µs) Time (ms) FIGURE 2-35: Step Response. Non-inverting Large Signal FIGURE 2-38: MCP631/2/3/5 family shows input phase reversal with overdrive. Output Voltage mV/div) Falling Edge 5.5V 2.5V 5.5V Slew Rate (V/µs) VOUT Rising Edge Time (µs) Ambient Temperature (°C) FIGURE 2-36: Response. Inverting Small Signal Step FIGURE 2-39: Temperature. Slew Rate Ambient DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. Maximum Output Voltage Swing 5.5V 2.5V 100k 1.E+05 1.E+06 1.E+07 Frequency (Hz) 100M 1.E+08 FIGURE 2-40: Maximum Output Voltage Swing Frequency. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. Chip Select Response 0.40 0.35 Hysteresis 0.30 0.25 0.20 0.15 0.10 0.05 0.00 2.5V 5.5V Current (µA) Power Supply Voltage Ambient Temperature (°C) FIGURE 2-41: Supply Voltage. -0.5 Current Power FIGURE 2-44: Temperature. Turn Time (µs) Hysteresis Ambient 2.5V 2.5V VOUT 5.5V Time (µs) Ambient Temperature (°C) FIGURE 2-42: Output Voltages Time with 2.5V. Time (µs) VOUT 5.5V FIGURE 2-45: Turn Time Ambient Temperature. Pull-down Resistor Ambient Temperature (°C) Representative Part FIGURE 2-43: Output Voltages Time with 5.5V. FIGURE 2-46: CS's Pull-down Resistor (RPD) Ambient Temperature. DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 Note: Unless otherwise indicated, +25°C, +2.5V 5.5V, GND, VDD/3, VOUT VDD/2, VDD/2, VSS. -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 -2.0 -2.2 1.E-06 Output Leakage Current 1.E-07 100n 1.E-08 1.E-09 100p 1.E-10 1.E-11 Output Voltage +25°C +125°C +85°C 5.5V Negative Power Supply Current; (µA) -40°C +25°C +85°C +125°C Power Supply Voltage FIGURE 2-47: Quiescent Current Shutdown Power Supply Voltage. FIGURE 2-48: Output Voltage. Output Leakage Current 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 NOTES: DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 DESCRIPTIONS Descriptions pins listed Table 3-1. TABLE 3-1: MCP631 SOIC 1,5,8 FUNCTION TABLE MCP632 SOIC MCP633 SOIC MCP635 MSOP Symbol VOUT, VOUTA VIN-, VINA- VIN+, VINA+ VINB+ VINB- VOUTB Description Output Inverting Input Non-inverting Input Negative Power Supply Chip Select Digital Input Chip Select Digital Input Non-inverting Input Inverting Input Output Positive Power Supply Internal Connection Exposed Thermal (EP); must connected Analog Outputs Chip Select Digital Input (CS) analog output pins (VOUT) low-impedance voltage sources. This input (CS) CMOS, Schmitt-triggered input that places part into power mode operation. Analog Inputs Exposed Thermal (EP) non-inverting inverting inputs (VIN+, VIN-, high-impedance CMOS inputs with bias currents. There internal connection between Exposed Thermal (EP) pin; they must connected same potential Printed Circuit Board (PCB). This connected ground plane provide larger heat sink. This improves package thermal resistance (JA). Power Supply Pins positive power supply (VDD) 2.5V 5.5V higher than negative power supply (VSS). normal operation, other pins between VDD. Typically, these parts used single (positive) supply configuration. this case, connected ground connected supply. will need bypass capacitors. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 NOTES: DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 APPLICATIONS MCP63X VOUT (minimum expected (minimum expected MCP631/2/3/5 family amps manufactured using Microchip's state CMOS process. designed cost, power high speed applications. supply voltage, quiescent current wide bandwidth make MCP631/2/3/5 ideal battery-powered applications. 4.1.1 Input PHASE REVERSAL input devices designed exhibit phase inversion when input pins exceed supply voltages. Figure 2-38 shows input voltage exceeding both supplies with phase inversion. 4.1.2 INPUT VOLTAGE CURRENT LIMITS FIGURE 4-2: Inputs. Protecting Analog protection inputs depicted shown Figure 4-1. This structure chosen protect input transistors, minimize input bias current (IB). input diodes clamp inputs when they more than diode drop below VSS. They also clamp voltages that above VDD; their breakdown voltage high enough allow normal operation, enough bypass quick events within specified limits. Bond also possible connect diodes left resistor this case, currents through diodes need limited some other mechanism. resistors then serve in-rush current limiters; current into input pins (VIN+ VIN-) should very small. significant amount current flow inputs (through diodes) when common mode voltage (VCM) below ground (VSS); Figure 2-13. Applications that high impedance need limit usable voltage range. 4.1.3 NORMAL OPERATION VIN+ Bond Input Stage Bond input stage MCP631/2/3/5 amps uses differential PMOS input stage. operates common mode input voltages (VCM), with between 0.3V 1.3V. ensure proper operation, input offset voltage (VOS) measured both 0.3V 1.3V. Figure Figure temperature effects. When operating very non-inverting gains, output voltage limited range 1.3V); Figure 4-3. Bond FIGURE 4-1: Structures. Simplified Analog Input MCP63X VOUT order prevent damage and/or improper operation these amplifiers, circuit must limit currents (and voltages) input pins (see Section "Absolute Maximum Ratings Figure shows recommended approach protecting these inputs. internal diodes prevent input pins (VIN+ VIN-) from going below ground, resistors limit possible current drawn input pins. Diodes prevent input pins (VIN+ VIN-) from going above VDD, dump currents onto VDD. When implemented shown, resistors also limit current through 1.3V FIGURE 4-3: Unity Gain Voltage Limitations Linear Operation. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 4.2.1 Rail-to-Rail Output MAXIMUM OUTPUT VOLTAGE IOUT VOUT RSER Maximum Output Voltage (see Figure 2-16 Figure 2-17) describes output range given load. instance, output voltage swings within negative rail with load tied VDD/2. MCP63X 4.2.2 OUTPUT CURRENT Figure shows possible combinations output voltage (VOUT) output current (IOUT), when 5.5V. IOUT positive when flows into external circuit. -0.5 FIGURE 4-5: Calculations. Diagram Power instantaneous power (POA(t)), RSER power (PRSER(t)) load power (PL(t)) are: (VDD 5.5V) Limited EQUATION 4-2: +ISC Limited -ISC Limited VOUT POA(t) (VDD VOUT) (VSS VOUT) PRSER(t) IOUT2RSER PL(t) IL2RL maximum power, resistive loads, occurs when VOUT halfway between halfway between VLG: Limited -120 -100 IOUT (mA) FIGURE 4-4: 4.2.3 Output Current. EQUATION 4-3: POAmax max2(VDD VSS) 4(RSER POWER DISSIPATION Since output short circuit current (ISC) specified (typical), these amps capable both delivering dissipating significant power. Figure show quantities used following power calculations single amp. RSER most applications; used limit IOUT. VOUT amp's output voltage, voltage load, load's ground point. usually ground (0V). input currents assumed negligible. currents shown approximately: maximum ambient junction temperature rise (TJA) junction temperature (TJ) calculated using POAmax, ambient temperature (TA), package thermal resistance (JA) found Table 1-4, number amps package (assuming equal power dissipations): EQUATION 4-4: EQUATION 4-1: IOUT VOUT RSER Where: POA(t) POAmaxJA number amps package max(0, IOUT) min(0, IOUT) Where: quiescent supply current DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 power de-rating across temperature particular package easily calculated (assuming equal power dissipations): Figure gives recommended RISO values different capacitive loads gains. x-axis normalized load capacitance (CL/GN), where circuit's noise gain. non-inverting gains, Signal Gain equal. inverting gains, 1+|Signal Gain| (e.g., gives V/V). 1,000 Recommended EQUATION 4-5: POAmax Jmax Where: TJmax absolute maximum junction temperature Several techniques available reduce given POAmax: Lower another package layout (ground plane, etc.) Heat sinks flow Reduce POAmax Increase Limit IOUT (using RSER) Decrease 1.E-12 100p 1.E-11 1.E-10 1.E-09 Normalized Capacitance; CL/GN 1.E-08 FIGURE 4-7: Recommended RISO Values Capacitive Loads. After selecting RISO your circuit, double check resulting frequency response peaking step response overshoot. Modify RISO's value until response reasonable. Bench evaluation simulations with MCP631/2/3/5 SPICE macro model helpful. 4.3.1 Improving Stability CAPACITIVE LOADS Driving large capacitive loads cause stability problems voltage feedback amps. load capacitance increases, feedback loop's phase margin decreases closed-loop bandwidth reduced. This produces gain peaking frequency response, with overshoot ringing step response. unity gain buffer most sensitive capacitive loads, though gains show same general behavior. When driving large capacitive loads with these amps (e.g., when +1), small series resistor output (RISO Figure 4-6) improves feedback loop's phase margin (stability) making output load resistive higher frequencies. bandwidth will generally lower than bandwidth with capacitive load. RISO VOUT MCP63X 4.3.2 GAIN PEAKING Figure shows circuit that represents non-inverting amplifiers voltage input) inverting amplifiers voltage input). capacitances represent total capacitance input pins; they include amp's common mode input capacitance (CCM), board parasitic capacitance capacitor placed parallel. MCP63X VOUT FIGURE 4-8: Capacitance. Amplifier with Parasitic FIGURE 4-6: Output Resistor, RISO stabilizes large capacitive loads. acts parallel with (except gain V/V), which causes increase gain high frequencies. also reduces phase margin feedback loop, which becomes less stable. This effect reduced either reducing 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 form low-pass filter that affects signal This filter single real pole 1/(2RNCN). largest value that should used depends noise gain (see Section 4.3.1 "Capacitive Loads"), open-loop gain's phase shift. Figure shows maximum recommended several values. Some applications modify these values reduce either output loading gain peaking (step response overshoot). 1.E+05 100k MCP633 MCP635 Chip Select Maximum Recommended 1.E+04 MCP633 single amplifier with Chip Select (CS). When pulled high, supply current drops (typical) flows through VSS. When this happens, amplifier output into high-impedance state. pulling low, amplifier enabled. internal (typical) pulldown resistor connected VSS, will left floating. Figure 1-1, Figure 2-42 Figure 2-43 show output voltage supply current response pulse. MCP635 dual amplifier with pins; controls controls These amps controlled independently, with enabled quiescent current (IQ) mA/amplifier (typical) disabled µA/amplifier (typical). seen supply pins amps' typical value MCP635's will when there amplifiers enabled, respectively. 1.E+03 1.E+02 Noise Gain; (V/V) Power Supply FIGURE 4-9: Gain. Maximum Recommended Figure 2-34 Figure 2-35 show small signal large signal step responses V/V. unity gain buffer usually open. Figure 2-36 Figure 2-37 show small signal large signal step responses V/V. Since noise gain resistors were chosen 500. also possible capacitor (CF) parallel with compensate de-stabilizing effect This makes possible larger values conditions stability summarized Equation 4-6. With this family operational amplifiers, power supply (VDD single supply) should have local bypass capacitor (i.e., 0.01 within good high frequency performance. Surface mount, multilayer ceramic capacitors, their equivalent, should used. These amps require bulk capacitor (i.e., larger) within provide large, slow currents. Tantalum capacitors, their equivalent, good choice. This bulk capacitor shared with other nearby analog parts long crosstalk through supplies does prove problem. High Speed Layout EQUATION 4-6: Given: need: GBWP GBWP These amps fast enough that little extra care (Printed Circuit Board) layout make significant difference performance. Good board layout techniques will help achieve performance shown specifications Typical Performance Curves; will also help minimize (Electro-Magnetic Compatibility) issues. solid ground plane. Connect bypass local capacitor(s) this plane with minimal length traces. This cuts down inductive capacitive crosstalk. Separate digital from analog, speed from high speed, power from high power. This will reduce interference. Keep sensitive traces short straight. Separate them from interfering components traces. This especially important high frequency (low rise time) signals. DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 Sometimes, helps place guard traces next victim traces. They should both sides victim trace, close possible. Connect guard traces ground plane both ends, middle long traces. coax cables, inductance wiring, route signal power from PCB. Mutual self inductance power wires often cause crosstalk unusual behavior. 4.7.3 H-BRIDGE DRIVER Figure 4-12 shows MCP632 dual used H-bridge driver. load could speaker motor. MCP632 4.7.1 Typical Applications POWER DRIVER WITH HIGH GAIN Figure 4-10 shows power driver with high gain R2/R1). MCP631/2/3/5 amp's short circuit current makes possible drive significant loads. calibrated input offset voltage supports accurate response high gains. should small, equal R1||R2, order minimize bias current induced offset. VDD/2 MCP632 FIGURE 4-12: H-Bridge Driver. VDD/2 VOUT MCP63X This circuit automatically makes noise gains (GN) equal, when gains properly, that frequency responses match well magnitude phase). Equation shows calculate that both amps have same gains; needs selected first. FIGURE 4-10: 4.7.2 Power Driver. EQUATION 4-7: Equation gives resulting common mode differential mode output voltages. OPTICAL DETECTOR AMPLIFIER Figure 4-11 shows transimpedance amplifier, using MCP63X amp, photo detector circuit. photo detector capacitive current source. provides enough gain produce VOUT. stabilizes gain limits transimpedance bandwidth about MHz. RF's parasitic capacitance (e.g., 0805 SMD) acts parallel with Photo Detector 30pF MCP63X VDD/2 EQUATION 4-8: VOUT FIGURE 4-11: Transimpedance Amplifier Optical Detector. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 NOTES: DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 DESIGN AIDS Microchip provides basic design aids needed MCP631/2/3/5 family amps. Analog Demonstration Evaluation Boards SPICE Macro Model latest SPICE macro model MCP631/2/3/5 amps available Microchip site www.microchip.com. This model intended initial design tool that works well amp's linear region operation over temperature range. model file information capabilities. Bench testing very important part design cannot replaced with simulations. Also, simulation results using this macro model need validated comparing them data sheet specifications characteristic curves. Microchip offers broad spectrum Analog Demonstration Evaluation Boards that designed help customers achieve faster time market. complete listing these boards their corresponding user's guides technical information, visit Microchip site www.microchip.com/analog tools. Some boards that especially useful are: MCP6XXX Amplifier Evaluation Board MCP6XXX Amplifier Evaluation Board MCP6XXX Amplifier Evaluation Board MCP6XXX Amplifier Evaluation Board Active Filter Demo Board 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board, SOIC8EV FilterLab® Software Microchip's FilterLab® software innovative software tool that simplifies analog active filter (using amps) design. Available cost from Microchip site www.microchip.com/filterlab, Filter-Lab design tool provides full schematic diagrams filter circuit with component values. also outputs filter circuit SPICE format, which used with macro model simulate actual filter performance. Application Notes following Microchip Application Notes available Microchip site www.microchip. com/appnotes recommended supplemental reference resources. ADN003: "Select Right Operational Amplifier your Filtering Circuits", DS21821 AN722: "Operational Amplifier Topologies Specifications", DS00722 AN723: "Operational Amplifier Specifications Applications", DS00723 AN884: "Driving Capacitive Loads With Amps", DS00884 AN990: "Analog Sensor Conditioning Circuits Overview", DS00990 AN1228: Precision Design: Random Noise", DS01228 Some these application notes, others, listed design guide: "Signal Chain Design Guide", DS21825 MindiCircuit Designer Simulator Microchip's MindiCircuit Designer Simulator aids design various circuits useful active filter, amplifier power management applications. free online circuit designer simulator available from Microchip site www.microchip.com/mindi. This interactive circuit designer simulator enables designers quickly generate circuit diagrams, simulate circuits. Circuits developed using Mindi Circuit Designer Simulator downloaded personal computer workstation. Microchip Advanced Part Selector (MAPS) MAPS software tool that helps efficiently identify Microchip devices that particular design requirement. Available cost from Microchip website www.microchip.com/maps, MAPS overall selection tool Microchip's product portfolio that includes Analog, Memory, MCUs DSCs. Using this tool, customer define filter sort features parametric search devices export side-by-side technical comparison reports. Helpful links also provided Data sheets, Purchase Sampling Microchip parts. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 NOTES: DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 PACKAGING INFORMATION Package Marking Information 8-Lead (MCP632) Device MCP632 Note: Example Code DABM Applies 8-Lead XXXX YYWW DABM 0931 8-Lead SOIC (150 mil) (MCP631, MCP632, MCP633) XXXXXXXX XXXXYYWW Example: MCP631E 0931 10-Lead (MCP635) Example Code BAFB Applies 10-Lead XXXX YYWW Device MCP635 Note: BAFB 0931 10-Lead MSOP (MCP635) Example: XXXXXX YWWNNN 635EUN 931256 Legend: XX.X Note: Customer-specific information Year code (last digit calendar year) Year code (last digits calendar year) Week code (week January week `01') Alphanumeric traceability code Pb-free JEDEC designator Matte (Sn) This package Pb-free. Pb-free JEDEC designator found outer packaging this package. event full Microchip part number cannot marked line, will carried over next line, thus limiting number available characters customer-specific information. 2009 Microchip Technology Inc. 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MCP631/2/3/5 APPENDIX REVISION HISTORY Revision (August 2009) Original Release this Document. 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 NOTES: DS22197A-page 2009 Microchip Technology Inc. MCP631/2/3/5 PRODUCT IDENTIFICATION SYSTEM order obtain information, e.g., pricing delivery, refer factory listed sales office. PART Device Temperature Range MCP631 MCP631T MCP632 MCP632T MCP633 MCP633T MCP635 MCP635T Package Examples: MCP631T-E/SN: Tape Reel Extended temperature, SOIC package MCP632T-E/MF: Tape Reel Extended temperature, package MCP632T-E/SN: Tape Reel Extended temperature, SOIC package MCP633T-E/SN: Tape Reel Extended temperature, SOIC package MCP635T-E/MF: Tape Reel Extended temperature, 10LD package MCP635T-E/UN: Tape Reel Extended temperature, 10LD MSOP package Device: Single Single (Tape Reel) (SOIC) Dual Dual (Tape Reel) (DFN SOIC) Single with Single with (Tape Reel) (SOIC) Dual with Dual with (Tape Reel) (DFN MSOP) Temperature Range: Package: -40°C +125°C Plastic Dual Flat, Lead DFN), 8-lead, 10-lead Plastic Small Outline (3.90 mm), 8-lead Plastic Micro Small Outline (MSOP), 10-lead 2009 Microchip Technology Inc. DS22197A-page MCP631/2/3/5 NOTES: DS22197A-page 2009 Microchip Technology Inc. Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable." Code protection constantly evolving. Microchip committed continuously improving code protection features products. Attempts break Microchip's code protection feature violation Digital Millennium Copyright Act. such acts allow unauthorized access your software other copyrighted work, have right relief under that Act. Information contained this publication regarding device applications like provided only your convenience superseded updates. your responsibility ensure that your application meets with your specifications. MICROCHIP MAKES REPRESENTATIONS WARRANTIES KIND WHETHER EXPRESS IMPLIED, WRITTEN ORAL, STATUTORY OTHERWISE, RELATED INFORMATION, INCLUDING LIMITED CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY FITNESS PURPOSE. Microchip disclaims liability arising from this information use. Microchip devices life support and/or safety applications entirely buyer's risk, buyer agrees defend, indemnify hold harmless Microchip from damages, claims, suits, expenses resulting from such use. licenses conveyed, implicitly otherwise, under Microchip intellectual property rights. Trademarks Microchip name logo, Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC UNI/O registered trademarks Microchip Technology Incorporated U.S.A. other countries. FilterLab, Hampshire, HI-TECH Linear Active Thermistor, MXDEV, MXLAB, SEEVAL Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock ZENA trademarks Microchip Technology Incorporated U.S.A. other countries. SQTP service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2009, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved. Printed recycled paper. Microchip received ISO/TS-16949:2002 certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona; Gresham, Oregon design centers California India. Company's quality system processes procedures PIC® MCUs dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory analog products. addition, Microchip's quality system design manufacture development systems 9001:2000 certified. 2009 Microchip Technology Inc. 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