SFP+ Controller with Analog Interface DS1873 controls monitors fu

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19-4986; 11/09
SFP+ Controller with Analog Interface
DS1873 controls monitors functions SFF, SFP, SFP+ modules including SFF-8472 functionality. DS1873 provides loop, modulation current control, safety functionality. DS1873 continuously monitors high output current, high bias current, high transmit power ensure that laser shutdown safety requirements without adding external components. channels monitor VCC, temperature, four external monitor inputs (MON1-MON4) that used meet monitoring requirements. MON3 differential with support common mode VCC. digital-to-analog (DAC) outputs with temperatureindexed lookup tables (LUTs) available additional monitoring control functionality.
Features
Meets SFF-8472 Control Monitoring Requirements Analog Monitor Channels: Temperature, VCC, MON1-MON4 MON1-MON4 Support Internal External Calibration Scalable Dynamic Range Internal Direct-to-Digital Temperature Sensor Alarm Warning Flags Monitored Channels Four 10-Bit Delta-Sigma Outputs with Entry Temperature LUTs Laser Bias Controlled Loop Temperature Compensate Tracking Error Laser Modulation Controlled 72-Entry Temperature Additional DACs Controlled 72-Entry 36-Entry Temperature Digital Pins: Five Inputs, Five Outputs Comprehensive Fault-Measurement System with Maskable Laser Shutdown Capability Flexible, Two-Level Password Scheme Provides Three Levels Security
DS1873
Applications
SFF, SFP, SFP+ Transceiver Modules
Configuration
BIAS N.C. DS1873 MON1 MON3N MON3P MON4 TXDOUT RSEL
VIEW
REFIN N.C. DAC1 DAC2 LOSOUT OUT1 RSELOUT
MON2
Bytes Password-1 Protected Memory Bytes Password-2 Protected Memory Main Device Address Additional Bytes Located Slave Address I2C-Compatible Interface +2.85V +3.9V Operating Voltage Range -40°C +95°C Operating Temperature Range 28-Pin TQFN (5mm 5mm) Package
Ordering Information
PART DS1873T+ DS1873T+T&R TEMP RANGE -40°C +95°C -40°C +95°C PIN-PACKAGE TQFN-EP* TQFN-EP*
THIN (5mm 0.8mm)
*EXPOSED PAD.
+Denotes lead(Pb)-free/RoHS-compliant package. Tape reel. Exposed pad.
Maxim Integrated Products
pricing, delivery, ordering information, please contact Maxim Direct 1-888-629-4642, visit Maxim's website www.maxim-ic.com.
SFP+ Controller with Analog Interface DS1873
TABLE CONTENTS
Absolute Maximum Ratings Recommended Operating Conditions Electrical Characteristics MOD, BIAS, DAC1, DAC2 Electrical Characteristics Analog Quick Trip Characteristics Analog Voltage Monitoring Characteristics Digital Thermometer Characteristics Electrical Characteristics Timing Characteristics (Control Loop Quick Trip) Electrical Characteristics Nonvolatile Memory Characteristics Typical Operating Characteristics Description Block Diagram Typical Operating Circuit Detailed Description BIAS DAC/APC Control BIAS Output Control During Power-Up BIAS DACs Function Transmit Disable (TXD) Quick-Trip Timing Monitors Fault Detection Monitors Five Quick-Trip Monitors Alarms Monitors Alarms Timing Right-Shifting Result Differential MON3 Input Enhanced RSSI Monitoring (Dual-Range Functionality) Low-Voltage Operation Power-On Analog (POA) Delta-Sigma Outputs Digital Pins LOS, LOSOUT IN1, RSEL, OUT1, RSELOUT TXF, TXD, TXDOUT Transmit Fault (TXF) Output Identification
SFP+ Controller with Analog Interface DS1873
TABLE CONTENTS (continued)
Communication Definitions Protocol Memory Organization Shadowed EEPROM Register Descriptions Lower Memory Register Table Register Table Register Table Register Table Register Table Register Table Register Table Register Auxiliary Memory Register Lower Memory Register Descriptions Table Register Descriptions Table Register Descriptions Table Register Description Table Register Descriptions Table Register Descriptions Table Register Descriptions Auxiliary Memory Register Descriptions Applications Information Power-Supply Decoupling Pullup Resistors Package Information
SFP+ Controller with Analog Interface DS1873
LIST FIGURES
Figure Power-Up Timing Figure Timing Figure Loop Quick-Trip Sample Timing Figure Round-Robin Timing Figure MON3 Differential Input High-Side RSSI Figure RSSI Flowchart Figure RSSI with Crossover Enabled Figure RSSI with Crossover Disabled Figure Low-Voltage Hysteresis Example Figure Recommended Filter DAC1/DAC2 Figure 3-Bit Delta-Sigma Example Figure MOD, DAC1, DAC2 Offset LUTs Figure Logic Diagram Figure Logic Diagram Figure 15a. Nonlatched Operation Figure 15b. Latched Operation Figure Timing Figure Example Timing Figure Memory
LIST TABLES
Table Acronyms Table Default Monitor Full-Scale Ranges Table MON3 Hysteresis Threshold Values Table MON3 Configuration Registers
SFP+ Controller with Analog Interface
ABSOLUTE MAXIMUM RATINGS
Voltage Range MON1-MON4, RSEL, IN1, LOS, TXF, Pins Relative Ground .-0.5V (VCC 0.5V)* Voltage Range VCC, SDA, SCL, OUT1, RSELOUT, LOSOUT Pins Relative Ground.-0.5V +4.2V *Subject exceeding +4.2V.
Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
DS1873
Operating Temperature Range .-40°C +95°C Programming Temperature Range .0°C +95°C Storage Temperature Range .-55°C +125°C Soldering Temperature.Refer IPC/JEDEC J-STD-020 Specification.
RECOMMENDED OPERATING CONDITIONS
-40°C +95°C, unless otherwise noted.)
PARAMETER Main Supply Voltage High-Level Input Voltage (SDA, SCL) Low-Level Input Voltage (SDA, SCL) High-Level Input Voltage (TXD, TXF, RSEL, IN1, LOS) Low-Level Input Voltage (TXD, TXF, RSEL, IN1, LOS) SYMBOL VIH:1 VIL:1 VIH:2 VIL:2 (Note CONDITIONS +2.85 -0.3 -0.3 +3.9 +0.8 UNITS
ELECTRICAL CHARACTERISTICS
(VCC +2.85V +3.9V, -40°C +95°C, unless otherwise noted.)
PARAMETER Supply Current Output Leakage (SDA, OUT1, RSELOUT, LOSOUT, TXF) Low-Level Output Voltage (SDA, MOD, BIAS, OUT1, RSELOUT, LOSOUT, TXDOUT, DAC1, DAC2, TXF) High-Level Output Voltage (MOD, BIAS, DAC1, DAC2, TXDOUT) TXDOUT Before EEPROM Recall MOD, BIAS, DAC1, DAC2 Before Recall Input Leakage Current (SCL, TXD, LOS, RSEL, IN1) Digital Power-On Reset Analog Power-On Reset SYMBOL Figure Figure 2.75 (Notes CONDITIONS UNITS
SFP+ Controller with Analog Interface DS1873
MOD, BIAS, DAC1, DAC2 ELECTRICAL CHARACTERISTICS
(VCC +2.85V +3.9V, -40°C +95°C, unless otherwise noted.)
PARAMETER Main Oscillator Frequency Delta-Sigma Input-Clock Frequency Reference Voltage Input (REFIN) Output Range Output Resolution Output Impedance SYMBOL VREFIN Minimum 0.1F CONDITIONS OSC/2 VREFIN UNITS Bits
ANALOG QUICK TRIP CHARACTERISTICS
(VCC +2.85V +3.9V, -40°C +95°C, unless otherwise noted.)
PARAMETER MON2, FullScale Voltage HBIAS Full-Scale Voltage MON2 Input Resistance Resolution Error Integral Nonlinearity Differential Nonlinearity Temperature Drift Offset +25°C -2.5 SYMBOL VAPC CONDITIONS 1.25 +2.5 UNITS Bits
ANALOG VOLTAGE MONITORING CHARACTERISTICS
(VCC +2.85V +3.9V, -40°C +95°C, unless otherwise noted.)
PARAMETER Resolution Input/Supply Accuracy (MON1-MON4, VCC) Update Rate Temperature, MON1-MON4, Input/Supply Offset (MON1-MON4, VCC) MON1-MON4 Factory Setting MON3 Fine (Note (Note factory setting SYMBOL CONDITIONS 0.25 6.5536 312.5 0.50 UNITS Bits
SFP+ Controller with Analog Interface
DIGITAL THERMOMETER CHARACTERISTICS
(VCC +2.85V +3.9V, -40°C +95°C, unless otherwise noted.)
PARAMETER Thermometer Error SYMBOL CONDITIONS -40°C +95°C UNITS
DS1873
ELECTRICAL CHARACTERISTICS
(VCC +2.85V +3.9V, -40°C +95°C, unless otherwise noted.)
PARAMETER Enable Recovery from Disable (Figure Recovery After Power-Up Fault Reset Time Fault Assert Time LOSOUT Assert Time LOSOUT Deassert Time SYMBOL tINIT_DAC INITR1 INITR2 tFAULT tLOSS_ON tLOSS_OFF CONDITIONS From BIAS disable From BIAS enable From From From alarm (Note alarm (Note UNITS
After HTXP, LTXP, HBATH, IBIASMAX (Note LLOS (Notes HLOS (Notes
TIMING CHARACTERISTICS (CONTROL LOOP QUICK TRIP)
(VCC +2.85V +3.9V, -40°C +95°C, unless otherwise noted.)
PARAMETER Output-Enable Time Following Binary Search Time SYMBOL INIT tSEARCH (Note (Note CONDITIONS UNITS BIAS Samples
SFP+ Controller with Analog Interface DS1873
ELECTRICAL CHARACTERISTICS
(VCC +2.85V +3.9V, -40°C +95°C, timing referenced VIL(MAX) VIH(MIN), unless otherwise noted.) (See Figure 16.)
PARAMETER Clock Frequency Clock Pulse-Width Clock Pulse-Width High Bus-Free Time Between STOP START Condition START Hold Time START Setup Time Data Hold Time Data Setup Time Rise Time Both Signals Fall Time Both Signals STOP Setup Time EEPROM Write Time Capacitive Load Each Line SYMBOL tLOW tHIGH tBUF tHD:STA SU:STA tHD:DAT SU:DAT SU:STO (Note CONDITIONS 0.1CB 0.1CB UNITS
(Note (Note (Note
NONVOLATILE MEMORY CHARACTERISTICS
(VCC +2.85V +3.9V, unless otherwise noted.)
PARAMETER EEPROM Write Cycles SYMBOL +25°C +85°C CONDITIONS 200,000 50,000 UNITS
voltages referenced ground. Current into positive, current negative. Inputs supply rail. Outputs loaded. This parameter guaranteed design. Full-scale user programmable. temperature conversion completed value recalled from been measured above alarm. Note sampling time 1.6µs cycle. Each input sampled every cycles. Note This specification time takes from MON3 voltage falling below LLOS trip threshold LOSOUT asserted high. Note This specification time takes from MON3 voltage rising above HLOS trip threshold LOSOUT asserted low. Note Assuming appropriate initial step programmed that would cause power exceed point within four steps, bias output will within within time specified binary search time. BIAS Output Control During Power-Up section. Note interface timing shown fast mode (400kHz). This device also backward compatible with standard mode timing. Note CB-the total capacitance line Note EEPROM write begins after STOP condition occurs. Note Note Note Note Note
SFP+ Controller with Analog Interface
Typical Operating Characteristics
(VCC +2.85V +3.9V, +25°C, unless otherwise noted.)
DS1873
SUPPLY CURRENT SUPPLY VOLTAGE
DS1873 toc01
SUPPLY CURRENT TEMPERATURE
DS1873 toc02
DAC1 DAC2
DAC1 DAC2 (LSB) -0.2 -0.4 -0.6
DS1873 toc03
SUPPLY CURRENT (mA) -40°C 2.85 3.15 3.45 3.75 +25°C +95°C
SUPPLY CURRENT (mA)
3.9V
2.8V
3.3V TEMPERATURE (°C)
-0.8 -1.0 1000 DAC1 DAC2 POSITION (DEC)
DAC1 DAC2
DS1873 toc04
MON1 MON4
DS1873 toc05
MON1 MON4
MON1 MON4 (LSB) -0.2 -0.4 -0.6 -0.8 -1.0 USING FACTORY PROGRAMMED FULL-SCALE VALUE 2.5V
DS1873 toc06
DAC1 DAC2 (LSB)
MON1 MON4 (LSB) -0.2 -0.4 -0.6 -0.8 -1.0 USING FACTORY PROGRAMMED FULL-SCALE VALUE 2.5V
1000
DAC1 DAC2 POSITION (DEC)
MON1 MON4 INPUT VOLTAGE
MON1 MON4 INPUT VOLTAGE
SETTLING TIME (40% 60%)
DS1873 toc07
SETTLING TIME (60% 40%)
DS1873 toc08
OUTPUT
OUTPUT
67.7% PEAK
33.3%
1.0193ms TIME
990.4s TIME
SFP+ Controller with Analog Interface DS1873
Typical Operating Characteristics (continued)
(VCC +2.85V +3.9V, +25°C, unless otherwise noted.)
OUTPUT RIPPLE 0001h
DS1873 toc09
OUTPUT RIPPLE 3FFFh
DS1873 toc10
POSITION 0001h FILTER OUTPUT
POSITION 3FFFh FILTER OUTPUT DAC2 OUTPUT
0.68mV
0.1mV
3V/div
3V/div DAC2 OUTPUT
TIME (100s/div)
TIME (100s/div)
Description
NAME RSELOUT RSEL TXDOUT MON4 MON3P, MON3N MON1 N.C. MON2 BIAS REFIN DAC1, DAC2 LOSOUT OUT1 Open-Drain Rate-Select Output Serial-Clock Input Serial-Data Input/Output Transmit-Fault Input Output. output open drain. Loss-of-Signal Input Digital Input. General-purpose input with SFF-8079 SFF-8431. Transmit-Disable Input Ground Connection Rate-Select Input Transmit-Disable Output External Monitor Input Differential External Monitor Input Quick Trip External Monitor Input HBATH Quick Trip Connection Power-Supply Input External Monitor Input Feedback voltage loop HTXP/LTXP quick trip. DAC, Delta-Sigma Output BIAS DAC, Delta-Sigma Output Reference Input DAC1 DAC2 Delta-Sigma Output Open-Drain Receive Loss-of-Signal Output Open-Drain Digital Output. General-purpose output with output SFF-8079 output SFF-8431. Exposed (Connect GND) FUNCTION
SFP+ Controller with Analog Interface
Block Diagram
DS1873
INTERFACE MAIN MEMORY EEPROM/SRAM CONFIGURATION/RESULTS, SYSTEM STATUS/CONTROL BITS, ALARMS/WARNINGS, LOOKUP TABLES, USER MEMORY DAC1 BITS
REFIN
DAC1
DAC2 BITS
DAC2
EEPROM BYTES
BITS
MON1 MON3P MON3N MON4 TEMPERATURE SENSOR ANALOG MON2
13-BIT INTEGRATOR 8-BIT
BIAS BITS
BIAS
POWER-ON ANALOG INTERRUPT
LOGIC CONTROL
TXDOUT
RSELOUT RSEL
OUT1 LOGIC CONTROL
LOSOUT
DS1873
SFP+ Controller with Analog Interface DS1873
Typical Operating Circuit
+3.3V ROSA
TOSA BIAS DISABLE
BIAS MON1 MON2 RMON MON3
DS1873 EEPROM QUICK TRIP TXDOUT TX_FAULT TX_DISABLE MODE_DEF2 (SDA) MODE_DEF1 (SCL)
LOSOUT
Detailed Description
DS1873 integrates control monitoring functionality required implement SFP+ system. components DS1873 shown Block Diagram described subsequent sections.
BIAS DAC/APC Control
DS1873 controls laser bias current using BIAS loop. loop's feedback DS1873 monitor diode (MON2) current, which converted voltage using external resistor. feedback sampled comparator
compared digital set-point value. output comparator three states: down, no-operation. no-operation state prevents output from excessive toggling once steady state reached. long comparator output either down states, bias adjusted incrementing decrementing BIAS setting. DS1873 allow point change function temperature compensate tracking error (TE). entries that determine setting windows between -40°C +100°C.
SFP+ Controller with Analog Interface
Table Acronyms
ACRONYM ROSA SFF-8472 SFP+ TOSA DEFINITION Analog-to-Digital Converter Automatic Gain Control Automatic Power Control Avalanche Photodiode Alarm Trap Bytes Burst Mode Digital-to-Analog Converter Loss Signal Lookup Table Nonvolatile Quick Trip Tracking Error Transimpedance Amplifier Receiver Optical Subassembly Shadowed EEPROM Small Form Factor Document Defining Register SFPs SFFs Small Form Factor Pluggable Enhanced Transmit Optical Subassembly Transmit Power
BIAS Output Control During Power-Up
power-up, DS1873 sets BIAS DACs After temperature conversion completed alarm enabled, additional conversion above customer-defined alarm level required before updated with value determined temperature conversion modulation LUT. When set, BIAS value equal ISTEP (see Figure startup algorithm checks this bias current causes feedback voltage above point, not, continues increasing BIAS ISTEP until setpoint exceeded. When point exceeded, device begins binary search quickly reach bias current corresponding proper power level. After binary search completed, integrator enabled single steps used tightly control average power. HBAL, BIAS alarms masked until binary search completed. However, BIAS alarm monitored during this time prevent BIAS from exceeding IBIASMAX. During bias current initialization, BIAS allowed exceed IBIASMAX. this occurs during ISTEP sequence, then binary search routine
DS1873
VPOA tINIT
tSEARCH ISTEP ISTEP BIAS ISTEP ISTEP INTEGRATOR BINARY SEARCH
BIAS SAMPLE
Figure Power-Up Timing
SFP+ Controller with Analog Interface
enabled. IBIASMAX exceeded during binary search, next smaller step activated. ISTEP binary increments that would cause BIAS exceed IBIASMAX taken. Masking alarms until completion binary search prevents false positive alarms during startup. ISTEP programmed customer using Table 02h, Register BBh. ISTEP should programmed maximum safe increase that allowable during startup. this value programmed low, DS1873 still operates, could take significantly longer algorithm converge hence control average power. fault detected, toggled reenable outputs, DS1873 powers following similar sequence initial power-up. only difference that DS1873 already determined present temperature, tINIT time required DS1873 recall points from EEPROM.
DS1873
Quick-Trip Timing
shown Figure DS1873's input comparator shared between control loop quick-trip alarms (TXP BIAS HI). comparator polls alarms multiplexed sequence. Five every eight comparator readings used loop bias-current control. other three updates used check HTXP/LTXP (monitor diode voltage), HBATH (MON1), (MON3) signals against internal APC, BIAS, MON3 reference, respectively. last comparison higher than point, makes HTXP comparison, lower, makes LTXP comparison. Depending results comparison, corresponding alarms warnings (TXP asserted deasserted. DS1873 programmable comparator sample time based internally generated clock facilitate wide variety external filtering options time delays. UPDATE RATE register (Table 02h, Register 88h) determines sampling time. Samples occur regular interval, tREP, which 1.6µs. Table shows sample rate options available. quick-trip alarm that detected default remains active until subsequent comparator sample shows condition longer exists. second bias current monitor (BIAS MAX) compares BIAS DAC's code digital value stored IBIASMAX register. This comparison made every bias current update ensure that high-bias current quickly detected. quick-trip comparator uses 1.6s window sample each input. After comparison that requires
BIAS DACs Function Transmit Disable (TXD)
asserted (logic during normal operation, outputs disabled within When deasserted (logic DS1873 sets register with value associated with present temperature, initializes BIAS using same search algorithm done startup. When asserted, soft (TXDC) (Lower Memory, Register 6Eh) would allow software control identical (see Figure
BIAS tOFF tOFF
SETTING
Figure Timing
QUICK-TRIP SAMPLE TIMES
HBIAS SAMPLE
SAMPLE tREP
SAMPLE
SAMPLE
SAMPLE
SAMPLE
HTXP/LTXP SAMPLE
SAMPLE
HBIAS SAMPLE
SAMPLE
Figure Loop Quick-Trip Sample Timing
SFP+ Controller with Analog Interface
update BIAS DAC, settling time calculated below) required allow feedback (MON2) stabilize. This time dependent time constant filter pole used delta-to-sigma BIAS output. During timing settling rate, comparisons comparisons ignored until sample periods (tREP) have passed. SettlingTime 51.2µs (APC_SR[3:0] power below specification. quick trip used LOSOUT pin.
DS1873
Monitors Fault Detection
Monitors Monitoring functions DS1873 include five quicktrip comparators channels. This monitoring combined with alarm enables (Table 01h/05h) determines when/if DS1873 turns BIAS DACs triggers TXDOUT outputs. monitoring levels interrupt masks user programmable. Five Quick-Trip Monitors Alarms Five quick-trip monitors provided detect potential laser safety issues status. These monitor following: High Bias Current (HBATH) Transmit Power (LTXP)
High Transmit Power (HTXP) Output Current (IBIASMAX) Loss-of-Signal (LOS high-transmit low-transmit power quick-trip registers (HTXP LTXP) thresholds used compare against MON2 voltage determine transmit power within specification. HBATH quick trip compares MON1 input (generally from laser driver's bias monitor output) against threshold setting determine present bias current above specification. BIAS quick trip determines BIAS above specification (IBIASMAX). When BIAS value calculated, compared against IBIAS register. BIAS allowed exceed value IBIASMAX register. When DS1873 detects that bias limit, sets BIASMAX status holds BIAS setting IBIASMAX level. bias power quick trips routed through interrupt masks allow combinations these alarms used trigger these outputs. user program eight different temperature-indexed threshold levels MON1 (Table 02h, Registers D0h-D7h). quick trip compares MON3 input against threshold setting determine present received
Monitors Alarms monitors channels that measure temperature (internal temp sensor), VCC, MON1-MON4 using analog multiplexer measure them round robin with single (see Timing section). five voltage channels have customer-programmable full-scale range channels have customer-programmable offset value that factory programmed default value (see Table Additionally, MON1-MON4 right-shift results bits before results compared alarm thresholds read over bus. This allows customers with specified ranges calibrate full scale factor 1/2n their specified range measure small signals. DS1873 then right-shift results bits maintain weight their specification (see Right-Shifting Result Enhanced RSSI Monitoring (Dual-Range Functionality) sections).
Table Default Monitor Full-Scale Ranges
SIGNAL Temperature (°C) MON1-MON4 SIGNAL 127.996 6.5528 2.4997 7FFF FFF8 FFF8 SIGNAL -128 8000 0000 0000
results (after right-shifting, used) compared alarm warning thresholds after each conversion, corresponding alarms set, which used trigger output. These thresholds user programmable, masking registers that used prevent alarms from triggering output.
Timing There analog channels that digitized round-robin fashion order shown Figure total time required convert channels (see Electrical Characteristics details). Right-Shifting Result weighting digital reading must conform predetermined full-scale (PFS) value defined standard's specification (e.g., SFF-8472), then right-shifting used adjust analog measurement range while maintaining weighting
SFP+ Controller with Analog Interface DS1873
ROUND-ROBIN CYCLE TEMP MON1 MON2 MON3 MON4 TEMP
NOTE: ALARM ENABLED POWER-UP, ROUND-ROBIN TIMING CYCLES BETWEEN TEMPERATURE ONLY UNTIL ABOVE ALARM THRESHOLD.
Figure Round-Robin Timing
MON3P MON3N ROSA DS1873
Figure This reduces board complexity eliminating need high-side differential amplifier current mirror.
Figure MON3 Differential Input High-Side RSSI
results. DS1873's range wide enough cover requirements; when maximum input value value, right-shifting used obtain greater accuracy. instance, maximum voltage might specified value, only converter's range effective over this range. alternative calibrate ADC's full-scale range readable value right-shift value With this implementation, resolution measurement increased factor because result digitally divided rightshifting, weight measurement still meets standard's specification (i.e., SFF-8472). right-shift operation result carried based contents right-shift control registers (Table 02h, Registers 8Eh-8Fh) EEPROM. Four analog channels, MON1-MON4, each have bits allocated number right-shifts. right-shift operations allowed executed part every conversion before results compared highalarm low-alarm levels, loaded into their corresponding measurement registers (Lower Memory, Registers 64h-6Bh). This true during setup internal calibration well during subsequent data conversions.
Differential MON3 Input DS1873 offers fully differential input MON3. This enables high-side monitoring RSSI, shown
Enhanced RSSI Monitoring (Dual-Range Functionality) DS1873 offers feature improve accuracy range MON3, which most commonly used monitoring RSSI. accuracy RSSI measurements increased small cost reduced range input signal swing). DS1873 eliminates this trade-off offering "dual range" calibration MON3 channel (see Figure This feature enables right-shifting (along with gain offset settings) when input signal below threshold (within range that benefits using right-shifting) then automatically disables right-shifting (recalling different gain offset settings) when input signal exceeds threshold. Also, prevent "chattering," hysteresis prevents excessive switching between modes addition ensuring that continuity maintained. Dual-range operation enabled default (factory programmed EEPROM). However, easily disabled through RSSI_FC RSSI_FF bits, which described Register Descriptions section. When dual-range operation disabled, MON3 operates identically other channels, although featuring differential input. Dual-range functionality consists modes operation: fine mode coarse mode. Each mode calibrated unique transfer function, hence term, dual range. Table highlights registers related MON3. Fine mode equivalent other channels. Fine mode calibrated using gain, offset, right-shifting registers locations shown Table ideal relatively small analog input voltages. Coarse mode automatically switched when input exceeds threshold discussed subsequent paragraph). Coarse mode calibrated using different gain offset registers, lacks right-shifting (since coarse mode only used large input signals). gain offset registers coarse mode also shown Table
SFP+ Controller with Analog Interface DS1873
Table MON3 Hysteresis Threshold Values
NUMBER RIGHT-SHIFTS
PERFORM FINEMODE CONVERSION
MON3 TIMESLICE
FINE MODE (hex) FFF8 7FFC 3FFE 1FFF 0FFF 07FF 03FF 01FF
COARSE MODE MIN* (hex) F000 7800 3C00 1E00 0F00 0780 03C0 01E0
PRIOR MON3 TIMESLICE RESULT COARSE CONVERSION? (LAST RSSI
CURRENT FINEMODE CONVERSION 93.75%
*This minimum reported coarse-mode conversion.
Table MON3 Configuration Registers
REGISTER GAIN OFFSET RIGHT-SHIFT0 CNFGC CONFIG (RSSIS BIT) MON3 VALUE FINE MODE 98h-99h, Table 8Fh, Table 8Bh, Table 77h, Lower Memory 68h-69h, Lower Memory COARSE MODE 9Ch-9Dh, Table
CURRENT FINEMODE CONVERSION REACH MAX?
PERFORM COARSEMODE CONVERSION
A8h-A9h, Table ADh-ACh, Table
LAST RSSI LAST RSSI
REPORT FINE CONVERSION RESULT
REPORT COARSE CONVERSION RESULT
MON3 TIMESLICE
Figure RSSI Flowchart
Additional information each registers found Register Descriptions section. Dual-range operation transparent user. results MON3 analog-to-digital conversions still stored/reported same memory locations (68h-69h, Lower Memory) regardless whether conversion performed fine mode coarse mode. only tell which mode generated digital result reading RSSIS bit. When DS1873 powered analog-to-digital conversions begin round-robin fashion. Every MON3
timeslice begins with fine mode analog-to-digital conversion (using fine mode's gain, offset, right-shifting settings). flowchart Figure more details. Then, depending whether last MON3 timeslice resulted coarse-mode conversion also depending value current fine conversion, decisions made whether current fine-mode conversion result make additional conversion (within same MON3 timeslice), using coarse mode (using coarse mode's gain offset settings rightshifting) reporting coarse-mode result. flowchart Figure also illustrates hysteresis implemented. fine-mode conversion compared thresholds. actual threshold values function number right-shifts being used. With right-shifting, fine mode full-scale programmed (1/2Nth) coarse mode full-scale. DS1873 auto ranges choose range that gives best resolution measurement. Hysteresis applied eliminate chatter when input resides boundary ranges. Figure details. Table shows threshold values each possible number right-shifts.
SFP+ Controller with Analog Interface
RSSI_FF RSSI_FC bits used force finemode coarse-mode conversions, disable dual-range functionality. Dual-range functionality enabled default (both RSSI_FC RSSI_FF factory programmed EEPROM). disabled setting RSSI_FC RSSI_FF These bits also useful when calibrating MON3. additional information, Figure dual-range calibration operate modes: crossover enabled crossover disabled. Crossover Enabled: systems with nonlinear relationships between input desired result, mode should crossover enabled. RSSI measurement receiver such application. Using crossoverenabled mode allows piecewise linear approxima-
DS1873
tion nonlinear response APD's gain factor. crossover point point between fine coarse points. result transitions between fine coarse ranges with hysteresis. Rightshifting, slope adjustment, offset configurable both fine coarse ranges. Figure Crossover Disabled: crossover-disabled mode intended systems with linear relationship between MON3 input desired result. Hysteresis allows nonjittery response when input crossover boundary fine coarse DAC. nonlinear system, hysteresis could cause significant errors result. Figure
RSSI RESULT
CROSSOVER POINT
IDEAL RESPONSE
MON3 INPUT
Figure RSSI with Crossover Enabled
RSSI RESULT
L-SC
FINE
HYSTERESIS MON3 INPUT COARSE
FINE
Figure RSSI with Crossover Disabled
SFP+ Controller with Analog Interface
Low-Voltage Operation
DS1873 contains power-on reset (POR) levels. lower level digital (POD) higher level analog (POA). startup, before supply voltage rises above POA, outputs disabled, SRAM locations their defaults, shadowed EEPROM (SEE) locations zero, analog circuitry disabled. When reaches POA, recalled, analog circuitry enabled. While remains above POA, device normal operating state, responds based nonvolatile configuration. during operation falls below POA, still above POD, then SRAM retains settings from first recall, device analog shut down outputs disabled. supply voltage recovers back above POA, then device immediately resumes normal operation. supply voltage falls below POD, then device SRAM placed default state another recall required reload nonvolatile settings. EEPROM recall occurs next time exceeds POA. Figure shows sequence events voltage varies. time above POD, interface used determine below level. This accomplished checking RDYB STATUS (Lower Memory, Register 6Eh) byte. RDYB when below POA; when rises above POA, RDYB timed (within 500µs) which point part fully functional. device addresses sourced from EEPROM (Table 02h, Register 8Ch), default device address until exceeds POA, allowing device address recalled from EEPROM.
DS1873
Power-On Analog (POA)
holds DS1873 reset until suitable level (VCC POA) device accurately measure with compare analog signals with quicktrip monitors. Because cannot measured when less than POA, also asserts alarm, which cleared conversion greater than customer-programmable alarm limit. This allows programmable limit ensure that headroom requirements transceiver satisfied during slow power-up. output does latch until there conversion above limit. alarm nonmaskable. output asserted when below POA. Low-Voltage Operation section more information.
Delta-Sigma Outputs
Four delta-sigma outputs provided: DAC, BIAS DAC, DAC1, DAC2. With addition external filter, these outputs provide 10-bit resolution analog outputs with full-scale range input REFIN. Each output either manually controlled controlled using temperature-indexed LUT, case BIAS DAC, controlled loop. delta-sigma digital output using pulse-density modulation. provides much lower output ripple than
RECALL VPOA VPOD
RECALL
PRECHARGED
RECALLED VALUE
PRECHARGED
RECALLED VALUE
PRECHARGED
Figure Low-Voltage Hysteresis Example
SFP+ Controller with Analog Interface
DAC1 high-resolution LUTs each have resolution. DAC2 high-resolution resolution. OFFSET LUTs located upper eight registers (F8h-FFh) table containing each highresolution LUT. DAC, DAC1 VALUE, DAC2 VALUE determined follows: (MOD OFFSET LUT) DAC1 VALUE DAC1 (DAC1 OFFSET LUT) DAC2 VALUE DAC1 (DAC1 OFFSET LUT) Example calculation DAC: Assumptions: Temperature 43°C. Table (MOD OFFSET LUT), Register 2Ah. Table (MOD LUT), Register 7Bh. Because temperature 43°C, index OFFSET index FCh. 123h When temperature controlled, DACs updated after each temperature conversion. reference input, REFIN, supply voltage four DACs. voltage connected REFIN decoupling must able support edge rate requirements delta-sigma outputs.
DS1873
3.24k
3.24k OUTPUT 0.01F 0.01F
DS1873
Figure Recommended Filter DAC1/DAC2
standard digital output given same clock rate filter components. Before tINIT, outputs high impedance. external filter components chosen based ripple requirements, output load, delta-sigma frequency, desired response time. recommended filter shown Figure DS1873's delta-sigma outputs bits. illustrative purposes, 3-bit example provided. Each possible output this 3-bit delta-sigma given Figure mode, MOD, DAC1, DAC2 each controlled with high-temperature resolution OFFSET with lower temperature resolution.
Figure 3-Bit Delta-Sigma Example
SFP+ Controller with Analog Interface DS1873
MOD, DAC1, DAC2 OFFSET LUTs (04h, 07h, 08h) EIGHT REGISTERS EACH OFFSET REGISTER INDEPENDENTLY BETWEEN 1020. 1020 FFh. THIS EXAMPLE ILLUSTRATES POSITIVE TEMPCO. MOD, DAC1, DAC2 OFFSET LUTs (04h, 07h, 08h) EIGHT REGISTERS EACH OFFSET REGISTER INDEPENDENTLY BETWEEN 1020. 1020 FFh. THIS EXAMPLE ILLUSTRATES POSITIVE NEGATVE TEMPCO.
1023 DELTA-SIGMA MOD, DAC1, DAC2
BITS BITS
1023 DELTA-SIGMA MOD, DAC1, DAC2
BITS BITS BITS BITS BITS
BITS
BITS BITS BITS BITS
BITS
BITS
BITS
BITS
-40°C -8°C +8°C +24°C +40°C +56°C +70°C +88°C +104°C
-40°C -8°C +8°C +24°C +40°C +56°C +70°C +88°C +104°C
Figure MOD, DAC1, DAC2 Offset LUTs
Digital Pins
Five digital input five digital output pins provided monitoring control.
EEPROM) does take effect until POA, allowing EEPROM recall.
LOS, LOSOUT default (LOSC Table 02h, Register 89h), used convert standard comparator output loss signal (LOS) open-collector output. This means shown Block Diagram default selects source LOSOUT output transistor. output read STATUS byte (Table 01h, Register 6Eh) bit. signal inverted (INV before driving open-drain output transistor using gate provided. Setting LOSC configures controlled which driven output quick trip (Table 02h, Registers BFh). setting (stored
IN1, RSEL, OUT1, RSELOUT digital input RSEL pins primarily serve meet rate-select requirements SFP+. They also serve general-purpose inputs. OUT1 RSELOUT driven combination IN1, RSEL, logic dictated control registers EEPROM (Figure 14). levels RSEL read using STATUS register (Lower Memory, Register 6Eh). open-drain output OUT1 controlled and/or inverted using CNFGB register (Table 02h, Register 8Ah). open-drain RSELOUT output software-controlled and/or inverted through STATUS register CNFGA register (Table 02h, Register 89h). External pullup resistors must provided OUT1 RSELOUT realize high logic levels.
SFP+ Controller with Analog Interface DS1873
TXDC TXDS BIAS FLAG ENABLE BIAS BIAS ENABLE HBAL FLAG HBAL ENABLE FLAG ENABLE FAULT RESET TIMER (130ms)
TXDIO
FETG
TXDFG
TXDOUT
TXDFLT
MINT HBAL FLAG FLAG FLAG BIAS FLAG
TXDEXT
POWER-ON RESET
PINS
Figure Logic Diagram
TXF, TXD, TXDOUT TXDOUT generated from combination TXF, TXD, internal signal FETG. software control identical available (TXDC, Lower Memory, Register 6Eh). pulse internally extended (TXDEXT) time tINITR1 inhibit latching alarms warnings related loop allow loop stabilize. nonlatching alarms warnings MON1-MON4 alarms warnings. addition, disabled from creating FETG. both input output (Figure 13). Transmit Fault (TXF) Output section detailed explanation TXF. Figure shows that same signals faults also used generate internal signal FETG (Table 01h/05h, Registers FBh). FETG used send fast "turn-off" command laser driver. intended direct connection laser driver's input this desired. When POA, TXDOUT high impedance.
IN1S INVOUT1 IN1C
OUT1
RSELS RSELC RSEL
RSELOUT
LOSC
LOSOUT
PINS
Figure Logic Diagram
SFP+ Controller with Analog Interface DS1873
DETECTION TXFOUT FAULT
TXFOUT
Figure 15a. Nonlatched Operation
DETECTION TXFOUT FAULT
TXFOUT RESET
TXFOUT
Figure 15b. Latched Operation
Transmit Fault (TXF) Output triggered alarms, warnings, quick trips (Figure 13). alarms, warnings, quick trips require enabling (Table 01h/05h, Registers FDh). Figures nonlatched latched operation. Latching alarms controlled CNFGB CNFGC registers (Table 02h, Registers 8Ah-8Bh).
Identification
DS1873 hardcoded die. registers (Table 02h, Registers CEh-CFh) assigned this feature. register reads identify part DS1873, while register reads current device version.
Communication
Definitions
following terminology commonly used describe data transfers. Master device: master device controls slave devices bus. master device generates clock pulses START STOP conditions.
Slave devices: Slave devices send receive data master's request. idle busy: Time between STOP START conditions when both inactive their logic-high states. START condition: START condition generated master initiate data transfer with slave. Transitioning from high while remains high generates START condition. Figure applicable timing. STOP condition: STOP condition generated master data transfer with slave. Transitioning from high while remains high generates STOP condition. Figure applicable timing. Repeated START condition: master repeated START condition data transfer indicate that will immediately initiate data transfer following current one. Repeated STARTs commonly used during read operations identify specific memory address begin data transfer. repeated START condition issued identically normal START condition. Figure applicable timing.
SFP+ Controller with Analog Interface
write: Transitions must occur during state SCL. data must remain valid unchanged during entire high pulse plus setup hold time requirements (Figure 16). Data shifted into device during rising edge SCL. read: write operation, master must release line proper amount setup time (Figure before next rising edge during read. device shifts each data falling edge previous pulse data valid rising edge current pulse. Remember that master generates clock pulses, including when reading bits from slave. Acknowledgement (ACK NACK): acknowledgement (ACK) acknowledge (NACK) always ninth transmitted during byte transfer. device receiving data (the master during read slave during write operation) performs transmitting zero during ninth bit. device performs NACK transmitting during bit. Timing (Figure NACK identical other writes. acknowledgment that device properly receiving data. NACK used terminate read sequence indication that device receiving data. Byte write: byte write consists bits information transferred from master slave (most significant first) plus 1-bit acknowledgement from slave master. bits transmitted master done according bit-write definition acknowledgement read using bit-read definition. Byte read: byte read 8-bit information transfer from slave master plus 1-bit NACK from master slave. bits information that transferred (most significant first) from slave master read master using bit-read definition, master transmits using bit-write definition receive additional data bytes. master must NACK last byte read terminate communication slave returns control master. Slave address byte: Each slave responds slave address byte sent immediately following START condition. slave address byte contains slave address most significant bits least significant bit. DS1873 responds slave addresses. auxiliary memory always responds fixed slave address, A0h. Lower Memory Tables 00h-08h respond slave addresses that configured value between 00h-FEh using DEVICE ADDRESS byte (Table 02h, Register 8Ch). user also must ASEL (Table 02h, Register 89h) this address active. writing correct slave address with master indicates will write data slave.
DS1873
tBUF tLOW tHD:STA
tHIGH tHD:STA tHD:DAT STOP START tSU:DAT REPEATED START
tSU:STA
tSU:STO
NOTE: TIMING REFERENCED VIL(MAX) VIH(MIN).
Figure Timing
SFP+ Controller with Analog Interface
master reads data from slave. incorrect slave address written, DS1873 assumes master communicating with another device ignores communications until next START condition sent. main device's slave address programmed A0h, access auxiliary memory disabled. Memory address: During write operation DS1873, master must transmit memory address identify memory location where slave store data. memory address always second byte transmitted during write operation following slave address byte. writes memory address, writes data bytes, generates STOP condition. DS1873 writes bytes (one page row) with single write transaction. This internally controlled address counter that allows data written consecutive addresses without transmitting memory address before each data byte sent. address counter limits write 8-byte page (one memory map). Attempts write additional pages memory without sending STOP condition between pages results address counter wrapping around beginning present row. example, 3-byte write starts address writes three data bytes (11h, 22h, 33h) three "consecutive" addresses. result that addresses would contain 22h, respectively, third data byte, 33h, would written address 00h. prevent address wrapping from occurring, master must send STOP condition page, then wait bus-free EEPROM write time elapse. Then master generate START condition write slave address
DS1873
Protocol Writing single byte slave: master must generate START condition, write slave address byte (R/W write memory address, write byte data, generate STOP condition. Remember master must read slave's acknowledgement during byte-write operations. Writing multiple bytes slave: write multiple bytes slave, master generates START condition, writes slave address byte (R/W
TYPICAL WRITE TRANSACTION START SLAVE SLAVE SLAVE STOP
SLAVE ADDRESS*
READ/ WRITE
REGISTER ADDRESS
DATA
ASEL SLAVE ADDRESS AUXILIARY MEMORY MAIN MEMORY. ASEL SLAVE ADDRESS DETERMINED TABLE 02h, REGISTER MAIN MEMORY. AUXILIARY MEMORY CONTINUES ADDRESSED A0h, EXCEPT WHEN PROGRAMMED ADDRESS MAIN MEMORY A0h. EXAMPLE TRANSACTIONS WITH MAIN MEMORY DEVICE ADDRESS SINGLE-BYTE WRITE -WRITE REGISTER START SLAVE SLAVE SLAVE
STOP
SINGLE-BYTE READ -READ REGISTER
START SLAVE SLAVE
REPEATED START
SLAVE
DATA DATA MASTER NACK STOP
TWO-BYTE WRITE -WRITE
START SLAVE SLAVE SLAVE SLAVE SLAVE SLAVE REPEATED START 10100011 SLAVE DATA
STOP
DATA MASTER NACK DATA MASTER NACK STOP
TWO-BYTE READ -READ
START
DATA
Figure Example Timing
SFP+ Controller with Analog Interface DS1873
byte (R/W first memory address next memory before continuing write data. Acknowledge polling: time EEPROM page written, DS1873 requires EEPROM write time (tW) after STOP condition write contents page EEPROM. During EEPROM write time, DS1873 will acknowledge slave address because busy. possible take advantage that phenomenon repeatedly addressing DS1873, which allows next page written soon DS1873 ready receive data. alternative acknowledge polling wait maximum period elapse before attempting write again DS1873. EEPROM write cycles: When EEPROM writes occur, DS1873 writes whole EEPROM memory page, even only single byte page modified. Writes that modify bytes page allowed corrupt remaining bytes memory same page. Because whole page written, bytes page that were modified during transaction still subject write cycle. This result whole page being worn over time writing single byte repeatedly. Writing page byte time wears EEPROM eight times faster than writing entire page once. DS1873's EEPROM write cycles specified Nonvolatile Memory Characteristics table. specification shown worst-case temperature. handle approximately times that many writes room temperature. Writing SRAMshadowed EEPROM memory with SEEB does count EEPROM write cycle when evaluating EEPROM's estimated lifetime. Reading single byte from slave: Unlike write operation that uses memory address byte define where data written, read operation occurs present value memory address counter. read single byte from slave, master generates START condition, writes slave address byte with reads data byte with NACK indicate transfer, generates STOP condition. Manipulating address counter reads: dummy write cycle used force address pointer particular value. this, master generates START condition, writes slave address byte (R/W writes memory address where desires read, generates repeated START condition, writes slave address byte (R/W reads data with NACK applicable, generates STOP condition.
Memory Organization
DS1873 features nine separate memory tables that internally organized into 8-byte rows. DS1873 passwords that each bytes long. lower level password (PW1) access normal user plus those made available with PW1. higher level password (PW2) access plus those made available with PW2. values passwords reside EEPROM inside memory. power-up, bits reads this location Lower Memory addressed from contains alarm warning thresholds, flags, masks, several control registers, password entry area (PWE), table-select byte. Table primarily contains user EEPROM (with level access) well alarm warning-enable bytes. Table multifunction space that contains configuration registers, scaling offset values, passwords, interrupt registers well other miscellaneous control bytes. Table contains temperature-indexed control modulation output. modulation programmed increments over -40°C +102°C range. table also contains temperature-indexed offsets. Table empty default. configured contain alarm- warning-enable bytes from Table 01h, Registers F8h-FFh with MASK enabled (Table 02h, Register 89h). this case Table empty. Table contains temperature-indexed that allows point change function temperature compensate tracking error (TE). entries that determine setting windows between -40°C +100°C. table also contains temperature-indexed HBIAS thresholds. Table contains temperature-indexed control DAC1. entries that determine setting windows between -40°C +100°C. table also contains temperature-indexed DAC1 offsets.
SFP+ Controller with Analog Interface
Table contains temperature-indexed control DAC2. entries that determine setting windows between -40°C +100°C. Auxiliary Memory (device A0h) contains bytes memory accessible from address 00h-FFh. selected with device address A0h. Register Descriptions section more complete details each byte's function, well read/write permissions each byte. DS1873 incorporates shadowed-EEPROM memory locations memory addresses that written many times. default shadowed-EEPROM bit, SEEB, these locations ordinary EEPROM. setting SEEB, these locations function like SRAM cells, which allow infinite number write cycles without concern wearing EEPROM. Setting SEEB also eliminates requirement EEPROM write time, Because changes made with SEEB enabled affect EEPROM, these changes retained through power cycles. power-on value last value written with SEEB disabled. This function used limit number EEPROM writes during calibration change monitor thresholds periodically during normal operation helping reduce number times EEPROM written. Figure indicates which locations shadowed EEPROM.
DS1873
Shadowed EEPROM
Many memory locations (listed within Register Descriptions section) actually shadowed EEPROM that controlled SEEB Table 02h, Register 80h.
ADDRESS
ADDRESS (DEFAULT) LOWER MEMORY
PASSWORD ENTRY (PWE) BYTES) AUXILIARY DEVICE TABLE-SELECT BYTE
NOTE ASEL THEN MAIN DEVICE SLAVE ADDRESS A2h. ASEL THEN MAIN DEVICE SLAVE ADDRESS DETERMINED VALUE TABLE 02h, REGISTER 8Ch. NOTE TABLE DOES EXIST. NOTE ALARM-ENABLE CONFIGURED EXIST TABLE TABLE USING MASK TABLE 02h, REGISTER 89h.
MAIN DEVICE
EEPROM (256 BYTES)
TABLE LOOKUP TABLE BYTES) OFFSET TABLE ALARM-ENABLE BYTES)
TABLE EEPROM (120 BYTES)
ALARMENABLE BYTES)
TABLE NONLOOKUP TABLE CONTROL CONFIGURATION REGISTERS
TABLE TRACKING ERROR LOOKUP TABLE BYTES)
TABLE DAC2 TABLE DAC1
HBIAS DAC1 OFFSET DAC2 OFFSET
Figure Memory
SFP+ Controller with Analog Interface DS1873
Register Descriptions
register maps show each byte/word bytes) terms memory. first byte located memory address (hexadecimal) leftmost column. Each subsequent byte one/two memory locations beyond previous byte/word's address. total bytes present each row. more information about each these bytes corresponding register description.
Lower Memory Register
LOWER MEMORY (hex) 30-5F NAME
<1>THRESHOLD0 <1>THRESHOLD1 <1>THRESHOLD2 <1>THRESHOLD3 <1>THRESHOLD4 <1>THRESHOLD5 <1>EEPROM <2>ADC
WORD BYTE BYTE TEMP ALARM ALARM MON1 ALARM MON2 ALARM MON3 ALARM MON4 ALARM
WORD BYTE BYTE TEMP ALARM ALARM MON1 ALARM MON2 ALARM MON3 ALARM MON4 ALARM
WORD BYTE BYTE TEMP WARN WARN MON1 WARN MON2 WARN MON3 WARN MON4 WARN
WORD BYTE BYTE TEMP WARN WARN MON1 WARN MON2 WARN MON3 WARN MON4 WARN
VALUES0
<0>ADC VALUES1 <2>ALARM/
TEMP VALUE
<2>MON3 VALUE
VALUE
<2>MON4 VALUE
MON1 VALUE
<2>RESERVED
MON2 VALUE
<0>STATUS <5>UPDATE
WARN
<0>TABLE
ALARM3
ALARM2
ALARM1
ALARM0
WARN3
WARN2
<6>PWE
RESERVED
<5>TBL
SELECT
<5>RESERVED
RESERVED
<6>PWE
access codes represent factory default values PW_ENA PW_ENB (Table 02h, Registers C0h-C1h). These registers also allow custom permissions.
ACCESS CODE Read Access Write Access each bit/byte separately DS1873 hardware mode <10> <11>
SFP+ Controller with Analog Interface DS1873
Table Register
TABLE (hex) 80-BF C0-F7 NAME
<7>EEPROM <8>EEPROM <8>ALARM
WORD BYTE ALARM BYTE ALARM
WORD BYTE BYTE ALARM
WORD BYTE BYTE WARN
WORD BYTE BYTE RESERVED
ENABLE
ALARM
WARN
RESERVED
ALARM ENABLE bytes (Registers F8h-FFh) configured exist Table instead here Table with MASK (Table 02h, Register 89h). configured exist Table 05h, then these locations empty Table 01h.
access codes represent factory default values PW_ENA PW_ENB (Table 02h, Registers C0h-C1h). These registers also allow custom permissions.
ACCESS CODE Read Access Write Access each bit/byte separately DS1873 hardware mode <10> <11>
SFP+ Controller with Analog Interface DS1873
Table Register
TABLE (hex) D8-E7 NAME
<0>CONFIG0 <8>CONFIG1 <8>SCALE0 <8>SCALE1 <8>OFFSET0 <8>OFFSET1 <9>PWD VALUE <8>THRESHOLD <8>PWD ENABLE <0>BIAS <8>APC
WORD BYTE
<8>MODE
WORD BYTE BYTE
<4>MOD
WORD BYTE DEVICE ADDRESS BYTE
<4>DAC1 VALUE
WORD BYTE BYTE
<4>DAC2 VALUE
BYTE
<4>TINDEX
UPDATE RATE
CNFGA
CNFGB
CNFGC
RSHIFT2
RSHIFT1
RSHIFT0
XOVER COARSE MON3 FINE SCALE XOVER FINE MON3 FINE OFFSET RANGING PW_ENA COMP RANGING PW_ENB
SCALE MON4 SCALE OFFSET MON4 OFFSET IBIASMAX RESERVED
<4>MAN_
MON1 SCALE MON3 COARSE SCALE MON1 OFFSET MON3 COARSE OFFSET HTXP RESERVED LTXP RESERVED RESERVED RESERVED EMPTY
MON2 SCALE RESERVED MON2 OFFSET INTERNAL TEMP OFFSET* HLOS POLARITY LLOS TBLSELPON
ISTEP RESERVED
<4>MAN BIAS <4>APC <4>HBIAS
CNTL RESERVED EMPTY
<10>BIAS
<10>DEVICE <10>DEVICE
RESERVED EMPTY
RESERVED EMPTY
EMPTY
EMPTY
RESERVED EMPTY
RESERVED EMPTY
EMPTY
*The final result must XORed with BB40h before writing this register.
access codes represent factory default values PW_ENA PW_ENB (Table 02h, Registers C0h-C1h). These registers also allow custom permissions.
ACCESS CODE Read Access Write Access each bit/byte separately DS1873 hardware mode <10> <11>
SFP+ Controller with Analog Interface DS1873
Table Register
TABLE (MODULATION LUT) (hex) C8-F7 NAME
<8>LUT4 <8>LUT4 <8>LUT4 <8>LUT4 <8>LUT4 <8>LUT4 <8>LUT4 <8>LUT4 <8>LUT4
WORD BYTE EMPTY BYTE EMPTY
WORD BYTE EMPTY BYTE EMPTY
WORD BYTE EMPTY BYTE EMPTY
WORD BYTE EMPTY BYTE EMPTY
EMPTY
<8>MOD
OFFSET
Table Register
TABLE (hex) 80-F7 NAME EMPTY
<8>ALARM
WORD BYTE EMPTY ALARM BYTE EMPTY ALARM
WORD BYTE EMPTY ALARM BYTE EMPTY ALARM
WORD BYTE EMPTY WARN BYTE EMPTY WARN
WORD BYTE EMPTY RESERVED BYTE EMPTY RESERVED
ENABLE
Table empty default. configured contain alarm warning-enable bytes from Table 01h, Registers F8h-FFh with MASK enabled (Table 02h, Register 89h). this case Table empty.
access codes represent factory default values PW_ENA PW_ENB (Table 02h, Registers C0h-C1h). These registers also allow custom permissions.
ACCESS CODE Read Access Write Access each bit/byte separately DS1873 hardware mode <10> <11>
SFP+ Controller with Analog Interface DS1873
Table Register
TABLE (APC LUT) (hex) 80-9F A8-F7 NAME
<8>LUT6 <8>LUT6 <8>LUT6 <8>LUT6 <8>LUT6
WORD BYTE EMPTY HBIAS BYTE EMPTY HBIAS
WORD BYTE EMPTY HBIAS BYTE EMPTY HBIAS
WORD BYTE RESERVED EMPTY HBIAS BYTE RESERVED EMPTY HBIAS
WORD BYTE RESERVED EMPTY HBIAS BYTE RESERVED EMPTY HBIAS
EMPTY
<8>HBATH
Table Register
TABLE (DAC1 LUT) (hex) C8-F7 NAME
<8>LUT7 <8>LUT7 <8>LUT7 <8>LUT7 <8>LUT7 <8>LUT7 <8>LUT7 <8>LUT7 <8>LUT7
WORD BYTE DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 EMPTY DAC1 BYTE DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 EMPTY DAC1
WORD BYTE DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 EMPTY DAC1 BYTE DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 EMPTY DAC1
WORD BYTE DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 EMPTY DAC1 BYTE DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 EMPTY DAC1
WORD BYTE DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 EMPTY DAC1 BYTE DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 DAC1 EMPTY DAC1
EMPTY
<8>DAC1
OFFSET
access codes represent factory default values PW_ENA PW_ENB (Table 02h, Registers C0h-C1h). These registers also allow custom permissions.
ACCESS CODE Read Access Write Access each bit/byte separately DS1873 hardware mode <10> <11>
SFP+ Controller with Analog Interface DS1873
Table Register
TABLE (DAC2 LUT) (hex) C8-F7 NAME
<8>LUT8 <8>LUT8 <8>LUT8 <8>LUT8 <8>LUT8
WORD BYTE DAC2 DAC2 DAC2 DAC2 DAC2 EMPTY DAC2 BYTE DAC2 DAC2 DAC2 DAC2 DAC2 EMPTY DAC2
WORD BYTE DAC2 DAC2 DAC2 DAC2 DAC2 EMPTY DAC2 BYTE DAC2 DAC2 DAC2 DAC2 DAC2 EMPTY DAC2
WORD BYTE DAC2 DAC2 DAC2 DAC2 RESERVED EMPTY DAC2 BYTE DAC2 DAC2 DAC2 DAC2 RESERVED EMPTY DAC2
WORD BYTE DAC2 DAC2 DAC2 DAC2 RESERVED EMPTY DAC2 BYTE DAC2 DAC2 DAC2 DAC2 RESERVED EMPTY DAC2
EMPTY
<8>DAC2
OFFSET
Auxiliary Memory Register
AUXILIARY MEMORY (A0h) (hex) 00-7F 80-FF NAME
<5>AUX <5>AUX
WORD BYTE BYTE
WORD BYTE BYTE
WORD BYTE BYTE
WORD BYTE BYTE
access codes represent factory default values PW_ENA PW_ENB (Table 02h, Registers C0h-C1h). These registers also allow custom permissions.
ACCESS CODE Read Access Write Access each bit/byte separately DS1873 hardware mode <10> <11>
SFP+ Controller with Analog Interface DS1873
Lower Memory Register Descriptions
Lower Memory, Register 00h-01h: TEMP ALARM Lower Memory, Register 04h-05h: TEMP WARN
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 7FFFh (PW1 WLOWER) Nonvolatile (SEE)
00h, 01h,
Temperature measurement updates above this two's complement threshold corresponding alarm warning bits. Temperature measurement updates equal below this threshold clear alarm warning bits.
Lower Memory, Register 02h-03h: TEMP ALARM Lower Memory, Register 06h-07h: TEMP WARN
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 8000h (PW1 WLOWER) Nonvolatile (SEE)
02h, 03h,
Temperature measurement updates below this two's complement threshold corresponding alarm warning bits. Temperature measurement updates equal above this threshold clear alarm warning bits.
SFP+ Controller with Analog Interface
Lower Memory, Register 08h-09h: ALARM Lower Memory, Register 0Ch-0Dh: WARN Lower Memory, Register 10h-11h: MON1 ALARM Lower Memory, Register 14h-15h: MON1 WARN Lower Memory, Register 18h-19h: MON2 ALARM Lower Memory, Register 1Ch-1Dh: MON2 WARN Lower Memory, Register 20h-21h: MON3 ALARM Lower Memory, Register 24h-25h: MON3 WARN Lower Memory, Register 28h-29h: MON4 ALARM Lower Memory, Register 2Ch-2Dh: MON4 WARN
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 08h, 0Ch, 10h, 14h, 18h, 1Ch, 20h, 24h, 28h, 09h, 0Dh, 11h, 15h, 19h, 1Dh, 21h, 25h, 29h, FFFFh (PW1 WLOWER) Nonvolatile (SEE)
DS1873
Voltage measurement updates above this unsigned threshold corresponding alarm warning bits. Voltage measurements equal below this threshold clear alarm warning bits.
SFP+ Controller with Analog Interface
Lower Memory, Register 0Ah-0Bh: ALARM Lower Memory, Register 0Eh-0Fh: WARN Lower Memory, Register 12h-13h: MON1 ALARM Lower Memory, Register 16h-17h: MON1 WARN Lower Memory, Register 1Ah-1Bh: MON2 ALARM Lower Memory, Register 1Eh-1Fh: MON2 WARN Lower Memory, Register 22h-23h: MON3 ALARM Lower Memory, Register 26h-27h: MON3 WARN Lower Memory, Register 2Ah-2Bh: MON4 ALARM Lower Memory, Register 2Eh-2Fh: MON4 WARN
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 0Ah, 0Eh, 12h, 16h, 1Ah, 1Eh, 22h, 26h, 2Ah, 0Bh, 0Fh, 13h, 17h, 1Bh, 1Fh, 23h, 27h, 2Bh, 0000h (PW1 WLOWER) Nonvolatile (SEE)
DS1873
Voltage measurement updates below this unsigned threshold corresponding alarm warning bits. Voltage measurements equal above this threshold clear alarm warning bits.
SFP+ Controller with Analog Interface
Lower Memory, Register 30h-5Fh:
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 WLOWER) Nonvolatile (EE)
DS1873
30h-5Fh
level access-controlled EEPROM.
Lower Memory, Register 60h-61h: TEMP VALUE
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 0000h Volatile
Signed two's complement direct-to-temperature measurement.
SFP+ Controller with Analog Interface DS1873
Lower Memory, Register 62h-63h: VALUE Lower Memory, Register 64h-65h: MON1 VALUE Lower Memory, Register 66h-67h: MON2 VALUE Lower Memory, Register 68h-69h: MON3 VALUE Lower Memory, Register 6Ah-6Bh: MON4 VALUE
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE 62h, 64h, 66h, 68h, 63h, 65h, 67h, 69h, 0000h Volatile
Left-justified unsigned voltage measurement.
Lower Memory, Register 6Ch-6Dh: RESERVED
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE
6Ch,
These registers reserved. value when read 00h.
SFP+ Controller with Analog Interface DS1873
Lower Memory, Register 6Eh: STATUS
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE X0XX 0XXXb below Volatile
Write Access
TXDS
TXDC
IN1S
RSELS
RSELC
TXFS
RDYB
TXDS: Status Bit. Reflects logic state (read only). logic-low. logic-high. TXDC: Software Control Bit. This allows software control that identical pin. section further information. value wire-ORed with logic value (writable users). (Default). Forces device into state regardless value pin. IN1S: Status Bit. Reflects logic state (read only). logic-low. logic-high. RSELS: RSEL Status Bit. Reflects logic state RSEL (read only). RSEL logic-low. RSEL logic-high. RSELC: RSEL Software Control Bit. This allows software control that identical RSEL pin. value wire-ORed with logic value RSEL create RSELOUT pin's logic value (writable users). (Default). Forces device into RSEL state regardless value RSEL pin. TXFS: Reflects driven state (read only). low. high. RXL: Reflects driven state LOSOUT (read only). LOSOUT driven low. LOSOUT pulled high. RDYB: Ready Bar. above POA. below and/or communicate over bus.
SFP+ Controller with Analog Interface DS1873
Lower Memory, Register 6Fh: UPDATE
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE DS1873 Hardware Volatile
TEMP
MON1
MON2
MON3
MON4
RESERVED
RSSIR
BITS
Update completed conversions. power-on, these bits cleared each conversion completed. These bits cleared that completion conversion verified. RESERVED RSSIR: RSSI Range. Reports range used conversion update MON3. Fine range reported value. Coarse range reported value.
SFP+ Controller with Analog Interface DS1873
Lower Memory, Register 70h: ALARM3
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE Volatile
TEMP
TEMP
MON1
MON1
MON2
MON2
TEMP High-alarm status temperature measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. TEMP Low-alarm status temperature measurement. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting. High-alarm status measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. Low-alarm status measurement. This when supply below trip point value. clears itself when measurement completed value above threshold. Last measurement equal above threshold setting. (Default) Last measurement below threshold setting. MON1 High-alarm status MON1 measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. MON1 Low-alarm status MON1 measurement. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting. MON2 High-alarm status MON2 measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. MON2 Low-alarm status MON2 measurement. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting.
SFP+ Controller with Analog Interface DS1873
Lower Memory, Register 71h: ALARM2
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE Volatile
MON3
MON3
MON4
MON4
RESERVED
RESERVED
RESERVED
TXFINT
MON3 High-alarm status MON3 measurement. event does clear this alarm. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. MON3 Low-alarm status MON3 measurement. event does clear this alarm. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting. MON4 High-alarm status MON4 measurement. event does clear this alarm. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. MON4 Low-alarm status MON4 measurement. event does clear this alarm. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting. RESERVED TXFINT: Interrupt. This wire-ORed logic alarms warnings wire-ANDed with their corresponding enable bits addition nonmaskable alarms BIAS MAX, HBAL. enable bits found Table 01h/05h, Registers F8h-FFh.
BITS
SFP+ Controller with Analog Interface
Lower Memory, Register 72h: ALARM1
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE Volatile
DS1873
RESERVED
RESERVED
RESERVED
RESERVED
HBAL
RESERVED
BITS
RESERVED HBAL: High-Bias Alarm Status; Fast Comparison. event clears this alarm. (Default) Last comparison below threshold setting. Last comparison above threshold setting. RESERVED High-Alarm Status TXP; Fast Comparison. event clears this alarm. (Default) Last comparison below threshold setting. Last comparison above threshold setting. Low-Alarm Status TXP; Fast Comparison. event clears this alarm. (Default) Last comparison above threshold setting. Last comparison below threshold setting.
Lower Memory, Register 73h: ALARM0
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE Volatile
RESERVED
RESERVED
BIAS
RESERVED
RESERVED
RESERVED
High-Alarm Status MON3; Fast Comparison. event does clear this alarm. (Default) Last comparison below threshold setting. Last comparison above threshold setting. Low-Alarm Status MON3; Fast Comparison. event does clear this alarm. (Default) Last comparison above threshold setting. Last comparison below threshold setting. RESERVED BIAS MAX: Alarm status maximum digital setting BIAS. event clears this alarm. (Default) value BIAS equal below IBIASMAX register. Requested value BIAS greater than IBIASMAX register. RESERVED
BITS BITS
SFP+ Controller with Analog Interface DS1873
Lower Memory, Register 74h: WARN3
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE Volatile
TEMP
TEMP
MON1
MON1
MON2
MON2
TEMP High-warning status temperature measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. TEMP Low-warning status temperature measurement. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting. High-warning status measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. Low-warning status measurement. This when supply below trip point value. clears itself when measurement completed value above threshold. Last measurement equal above threshold setting. (Default) Last measurement below threshold setting. MON1 High-warning status MON1 measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. MON1 Low-warning status MON1 measurement. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting. MON2 High-warning status MON2 measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. MON2 Low-warning status MON2 measurement. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting.
SFP+ Controller with Analog Interface
Lower Memory, Register 75h: WARN2
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE Volatile
DS1873
MON3
MON3
MON4
MON4
RESERVED
RESERVED
RESERVED
RESERVED
MON3 High-warning status MON3 measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. MON3 Low-warning status MON3 measurement. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting. MON4 High-warning status MON4 measurement. (Default) Last measurement equal below threshold setting. Last measurement above threshold setting. MON4 Low-warning status MON4 measurement. (Default) Last measurement equal above threshold setting. Last measurement below threshold setting. RESERVED
BITS
Lower Memory, Register 76h-7Ah: RESERVED MEMORY
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE
These registers reserved. value when read 00h.
SFP+ Controller with Analog Interface DS1873
Lower Memory, Register 7Bh-7Eh: Password Entry (PWE)
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE FFFF FFFFh Volatile
There passwords DS1873. Each password bytes long. lower level password (PW1) access normal user plus those made available with PW1. higher level password (PW2) access plus those made available with PW2. values passwords reside EEPROM inside memory. power-up, bits reads this location
Lower Memory, Register 7Fh: Table Select (TBL SEL)
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE TBLSELPON (Table 02h, Register C7h) Volatile
upper memory tables DS1873 accessible writing desired table value this register. power-on value this register defined value written TBLSELPON (Table 02h, Register C7h).
SFP+ Controller with Analog Interface DS1873
Table Register Descriptions
Table 01h, Register 80h-BFh: EEPROM
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL1A) (PW1 RTBL1A) (PW1 RWTBL1A) Nonvolatile (EE)
80h-BFh
EEPROM and/or level access.
Table 01h, Register C0h-F7h: EEPROM
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL1B) (PW1 RTBL1B) (PW1 RWTBL1B) Nonvolatile (EE)
C0h-F7h
EEPROM and/or level access.
SFP+ Controller with Analog Interface DS1873
Table 01h, Register F8h: ALARM
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL1C) (PW1 RTBL1C) (PW1 RWTBL1C) Nonvolatile (SEE)
TEMP
TEMP
MON1
MON1
MON2
MON2
Layout identical ALARM3 Lower Memory, Register 70h. Enables alarms create TXFINT (Lower Memory, Register 71h) logic. MASK (Table 02h, Register 89h) determines whether this memory exists Table 05h. TEMP Disables interrupt from TEMP alarm. Enables interrupt from TEMP alarm. TEMP Disables interrupt from TEMP alarm. Enables interrupt from TEMP alarm. Disables interrupt from alarm. Enables interrupt from alarm. Disables interrupt from alarm. Enables interrupt from alarm. MON1 Disables interrupt from MON1 alarm. Enables interrupt from MON1 alarm. MON1 Disables interrupt from MON1 alarm. Enables interrupt from MON1 alarm. MON2 Disables interrupt from MON2 alarm. Enables interrupt from MON2 alarm. MON2 Disables interrupt from MON2 alarm. Enables interrupt from MON2 alarm.
SFP+ Controller with Analog Interface
Table 01h, Register F9h: ALARM
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL1C) (PW1 RTBL1C) (PW1 RWTBL1C) Nonvolatile (SEE)
DS1873
MON3
MON3
MON4
MON4
RESERVED
RESERVED
RESERVED
RESERVED
Layout identical ALARM2 Lower Memory, Register 71h. Enables alarms create TXFINT (Lower Memory, Register 71h) logic. MASK (Table 02h, Register 89h) determines whether this memory exists Table 05h. MON3 Disables interrupt from MON3 alarm. Enables interrupt from MON3 alarm. MON3 Disables interrupt from MON3 alarm. Enables interrupt from MON3 alarm. MON4 Disables interrupt from MON4 alarm. Enables interrupt from MON4 alarm. MON4 Disables interrupt from MON4 alarm. Enables interrupt from MON4 alarm. RESERVED
SFP+ Controller with Analog Interface DS1873
Table 01h, Register FAh: ALARM
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL1C) (PW1 RTBL1C) (PW1 RWTBL1C) Nonvolatile (SEE)
RESERVED
RESERVED
RESERVED
RESERVED
HBAL
RESERVED
Layout identical ALARM1 Lower Memory, Register 72h. Enables alarms create internal signal FETG (see Figure logic. MASK (Table 02h, Register 89h) determines whether this memory exists Table 05h. BITS RESERVED HBAL: Disables interrupt from HBAL alarm. Enables interrupt from HBAL alarm. RESERVED Disables interrupt from alarm. Enables interrupt from alarm. Disables interrupt from alarm. Enables interrupt from alarm.
SFP+ Controller with Analog Interface
Table 01h, Register FBh: ALARM
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL1C) (PW1 RTBL1C) (PW1 RWTBL1C) Nonvolatile (SEE)
DS1873
RESERVED
RESERVED
BIAS
RESERVED
RESERVED
RESERVED
Layout identical ALARM1 Lower Memory, Register 73h. MASK (Table 02h, Register 89h) determines whether this memory exists Table 05h. Enables alarm create TXFINT (Lower Memory, Register 71h) logic. Disables interrupt from alarm. Enables interrupt from alarm. Enables alarm create TXFINT (Lower Memory, Register 71h) logic. Disables interrupt from alarm. Enables interrupt from alarm. RESERVED BIAS MAX: Enables alarm create internal signal FETG (see Figure logic. Disables interrupt from BIAS alarm. Enables interrupt from BIAS alarm. RESERVED
BITS BITS
SFP+ Controller with Analog Interface DS1873
Table 01h, Register FCh: WARN
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL1C) (PW1 RTBL1C) (PW1 RWTBL1C) Nonvolatile (SEE)
TEMP
TEMP
MON1
MON1
MON2
MON2
Layout identical WARN3 Lower Memory, Register 74h. Enables warnings create TXFINT (Lower Memory, Register 71h) logic. MASK (Table 02h, Register 89h) determines whether this memory exists Table 05h. TEMP Disables interrupt from TEMP warning. Enables interrupt from TEMP warning. TEMP Disables interrupt from TEMP warning. Enables interrupt from TEMP warning. Disables interrupt from warning. Enables interrupt from warning. Disables interrupt from warning. Enables interrupt from warning. MON1 Disables interrupt from MON1 warning. Enables interrupt from MON1 warning. MON1 Disables interrupt from MON1 warning. Enables interrupt from MON1 warning. MON2 Disables interrupt from MON2 warning. Enables interrupt from MON2 warning. MON2 Disables interrupt from MON2 warning. Enables interrupt from MON2 warning.
SFP+ Controller with Analog Interface
Table 01h, Register FDh: WARN
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL1C) (PW1 RTBL1C) (PW1 RWTBL1C) Nonvolatile (SEE)
DS1873
MON3
MON3
MON4
MON4
RESERVED
RESERVED
RESERVED
RESERVED
Layout identical WARN2 Lower Memory, Register 75h. Enables warnings create TXFINT (Lower Memory, Register 71h) logic. MASK (Table 02h, Register 89h) determines whether this memory exists Table 05h. MON3 Disables interrupt from MON3 warning. Enables interrupt from MON3 warning. MON3 Disables interrupt from MON3 warning. Enables interrupt from MON3 warning. MON4 Disables interrupt from MON4 warning. Enables interrupt from MON4 warning. MON4 Disables interrupt from MON4 warning. Enables interrupt from MON4 warning. RESERVED
BITS
Table 01h, Register FEh-FFh: RESERVED
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL1C) (PW1 RTBL1C) (PW1 RWTBL1C) Nonvolatile (SEE)
These registers reserved.
SFP+ Controller with Analog Interface DS1873
Table Register Descriptions
Table 02h, Register 80h: MODE
POWER-ON VALUE READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 PRTBL2) Volatile
SEEB
RESERVED
DAC1
DAC2
BIAS
SEEB: (Default) Enables EEPROM writes bytes. Disables EEPROM writes bytes during configuration, that configuration part delayed cycle time. Once values known, write this write locations again data written EEPROM. RESERVED DAC1 DAC1 VALUE writable user recalls disabled. This allows users interactively test their modules writing values DAC1. output updated with value write cycle. STOP condition write cycle. (Default) Enables auto control DAC1 VALUE. DAC2 DAC2 VALUE writable user recalls disabled. This allows users interactively test their modules writing values DAC2. output updated with value write cycle. STOP condition write cycle. (Default) Enables auto control DAC2 VALUE. AEN: temperature-calculated index value TINDEX writable users updates calculated indexes disabled. This allows users interactively test their modules controlling indexing LUTs. recalled values from LUTs appear registers after next completion temperature conversion. Modulation writable user recalls disabled. This allows users interactively test their modules writing value modulation. output updated with value write cycle. STOP condition write cycle. (Default) Enables auto control modulation. writable user recalls disabled. This allows users interactively test their modules writing value reference. STOP condition write cycle. HBIAS also writable recalls disabled. (Default) Enables auto control reference. BIAS BIAS controlled user manual mode. This allows user interactively test their modules writing value bias. (Default) Enables auto control feedback.
SFP+ Controller with Analog Interface
Table 02h, Register 81h: Temperature Index (TINDEX)
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW2 (PW1 RWTBL2 Volatile
DS1873
Holds calculated index based temperature measurement. This index used address during lookup Tables 04h, 06h-08h. Temperature measurements below -40°C above +102°C clamped C7h, respectively. calculation TINDEX follows:
TINDEX
Temp Value 40°C
temperature-indexed LUTs (2°C 4°C), index used during lookup function each table follows: Table (MOD) Table (APC) Table (DAC1) Table (DAC2) TINDEX6 TINDEX6 TINDEX5 TINDEX6 TINDEX5 TINDEX6 TINDEX4 TINDEX5 TINDEX4 TINDEX5 TINDEX3 TINDEX4 TINDEX3 TINDEX4 TINDEX2 TINDEX3 TINDEX2 TINDEX3 TINDEX1 TINDEX2 TINDEX1 TINDEX2 TINDEX0 TINDEX1 TINDEX0 TINDEX1
8-position tables, following table shows lookup function: TINDEX BYTE TEMP (°C) 1000_0xxx 1001_0xxx 1001_1xxx 1010_0xxx 1010_1xxx 1011_0xxx 1011_1xxx 11xx_xxxx
SFP+ Controller with Analog Interface DS1873
Table 02h, Register 82h-83h:
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 0000h (PW1 RWTBL2) (PW1 RTBL2) (PW2 (PW1 RWTBL2 Volatile
digital value used DAC. result LUT4 plus OFFSET times recalled from Table adjusted memory address found TINDEX. This register updated temperature conversion.
VALUE LUT4 OFFSET
VMOD VREFIN 1024 VALUE
Table 02h, Register 84h-85h: DAC1 VALUE
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 0000h (PW1 RWTBL246) (PW1 RTBL246) (PW2 DAC1 (PW1 RWTBL246 DAC1 Volatile
digital value used DAC1. result LUT7 plus DAC1 OFFSET times recalled from Table adjusted memory address found TINDEX. This register updated temperature conversion.
DAC1 VALUE LUT7 DAC1 OFFSET
VDAC1 VREFIN 1024 DAC1 VALUE
SFP+ Controller with Analog Interface DS1873
Table 02h, Register 86h-87h: DAC2 VALUE
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 0000h (PW1 RWTBL246) (PW1 RTBL246) (PW2 DAC2 (PW1 RWTBL246 DAC2 Volatile
digital value used DAC2. result LUT8 plus DAC2 OFFSET times recalled from Table adjusted memory address found TINDEX. This register updated temperature conversion.
DAC2 VALUE LUT8 DAC2 OFFSET
VDAC2 VREFIN 1024 DAC2 VALUE
Table 02h, Register 88h: UPDATE RATE
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
APC_SR3
APC_SR2
APC_SR1
APC_SR0
BITS BITS
APC_SR[3:0]: 4-bit sample rate comparison control. Defines sample rate comparison control.
quick-trip comparator uses 1.6s window sample each input. After comparison that requires update BIAS DAC, settling time calculated below) required allow feedback (MON2) stabilize. This time dependent time constant filter pole used delta-to-sigma BIAS output. During timing settling rate, comparisons comparisons ignored until sample periods (tREP) have passed. SettlingTime 51.2s (APC_SR[3:0]
SFP+ Controller with Analog Interface DS1873
Table 02h, Register 89h: CNFGA
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
LOSC
RESERVED
ASEL
MASK
INVRSOUT
RESERVED
RESERVED
LOSC: Configuration. Defines source LOSOUT (see Figure 14). alarm used source. (Default) input used source. RESERVED LOS: Inverts buffered input output LOSOUT (see Figure 14). Noninverted LOSOUT pin. Inverted LOSOUT pin. ASEL: Address Select. Device address A2h. Byte DEVICE ADDRESS Table 02h, Register used device address. MASK: Alarm-enable exists Table 01h, Registers F8h-FFh. Table 05h, Registers F8h-FFh empty. Alarm-enable exists Table 05h, Registers F8h-FFh. Table 01h, Registers F8h-FFh empty. INVRSOUT: Allow inversion RSELOUT (see Figure 14). RSELOUT inverted. RSELOUT inverted. RESERVED
BITS
SFP+ Controller with Analog Interface
Table 02h, Register 8Ah: CNFGB
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
DS1873
IN1C
INVOUT1
RESERVED
RESERVED
RESERVED
ALATCH
QTLATCH
WLATCH
IN1C: Software Control (see Figure 14). pin's logic controls OUT1 pin. OUT1 active (bit defines polarity). INVOUT1: Inverts active state OUT1 (see Figure 14). Noninverted. Inverted. RESERVED ALATCH: Alarm's Comparison Latch. Table 01h, Registers 70h-71h. alarm flags reflect status last comparison. alarm flags remain set. QTLATCH: Quick Trip's Comparison Latch. Table 01h, Registers 72h-73h 76h. alarm warning flags reflect status last comparison. alarm warning flags remain set. WLATCH: Warning's Comparison Latch. Table 01h, Registers 74h-75h. warning flags reflect status last comparison. warning flags remain set.
BITS
SFP+ Controller with Analog Interface DS1873
Table 02h, Register 8Bh: CNFGC
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
XOVEREN
RESERVED
TXDM34
TXDFG
TXDFLT
TXDIO
RSSI_FC
RSSI_FF
XOVEREN: Enables RSSI conversion XOVER FINE (Table 02h, Register 90h-91h) value during MON3 conversions. Uses hysteresis linear RSSI measurements. XOVER value enabled nonlinear RSSI measurements. RESERVED TXDM34: Enables reset alarms, warnings, quick trips associated MON3 MON4 during event. event effect MON3 MON4 alarms, warnings, quick trips. MON3 MON4 alarms, warnings, quick trips reset during event. TXDFG: Figure FETG, internal signal, effect TXDOUT. FETG enabled ORed with other possible signals create TXDOUT. TXDFLT: Figure effect TXDOUT. enabled ORed with other possible signals create TXDOUT. TXDIO: Figure (Default) input signal effect TXDOUT. input signal enabled ORed with other possible signals create TXDOUT. RSSI_FC RSSI_FF: RSSI Force Coarse RSSI Force Fine. Control bits RSSI mode operation MON3 conversion. Normal RSSI mode operation (default). fine settings scale offset used MON3 conversions. coarse settings scale offset used MON3 conversions. Normal RSSI mode operation.
BITS
SFP+ Controller with Analog Interface DS1873
Table 02h, Register 8Ch: DEVICE ADDRESS
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
This value becomes slave address main memory when ASEL (Table 02h, Register 89h) set. programmed this register, auxiliary memory disabled.
Table 02h, Register 8Dh: RIGHT-SHIFT2 (RSHIFT2)
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
MON3C2
MON3C1
MON3C0
Allows right-shifting final answer MON3 coarse voltage measurement. This allows scaling measurement smallest full-scale voltage then right-shifting final result reading weighted correct LSB.
SFP+ Controller with Analog Interface DS1873
Table 02h, Register 8Eh: RIGHT-SHIFT1 (RSHIFT1)
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
RESERVED
MON12
MON11
MON10
RESERVED
MON22
MON21
MON20
Allows right-shifting final answer MON1 MON2 voltage measurements. This allows scaling measurements smallest full-scale voltage then right-shifting final result reading weighted correct LSB.
Table 02h, Register 8Fh: RIGHT-SHIFT0 (RSHIFT0)
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
RESERVED
MON3F2
MON3F1
MON3F0
RESERVED
MON42
MON41
MON40
Allows right-shifting final answer MON3 fine MON4 voltage measurements. This allows scaling measurements smallest full-scale voltage then right-shifting final result reading weighted correct LSB. MON3 right-shifting only available fine mode operation. coarse mode does right-shift.
SFP+ Controller with Analog Interface
Table 02h, Register 90h-91h: XOVER COARSE
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 0000h (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
DS1873
Defines crossover value RSSI measurements nonlinear inputs when XOVEREN (Table 02h, Register 8Bh). MON3 coarse conversion results (before right-shifting) less than this register clamped value this register.
Table 02h, Register 92h-93h: SCALE Table 02h, Register 94h-95h: MON1 SCALE Table 02h, Register 96h-97h: MON2 SCALE Table 02h, Register 98h-99h: MON3 FINE SCALE Table 02h, Register 9Ah-9Bh: MON4 SCALE Table 02h, Register 9Ch-9Dh: MON3 COARSE SCALE
FACTORY CALIBRATED READ ACCESS WRITE ACCESS MEMORY TYPE 92h, 94h, 96h, 98h, 9Ah, 93h, 95h, 97h, 99h, 9Bh, (PW1 RWTBL246) (PW1 RTBL246) (PW1 RWTBL246) Nonvolatile (SEE)
Controls scaling gain voltage measurements. factory-calibrated value produces voltage 6.5536V VCC; 2.5V MON1, MON2, MON4; 0.3125V MON3 fine.
SFP+ Controller with Analog Interface DS1873
Table 02h, Register 9Eh-9Fh: RESERVED
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
These registers reserved.
Table 02h, Register A0h-A1h: XOVER FINE
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE FFFFh (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
Defines crossover value RSSI measurements nonlinear inputs when XOVEREN (Table 02h, Register 8Bh). MON3 fine conversion results (before right-shifting) greater than this register require MON3 coarse conversion.
SFP+ Controller with Analog Interface
Table 02h, Register A2h-A3h: OFFSET Table 02h, Register A4h-A5h: MON1 OFFSET Table 02h, Register A6h-A7h: MON2 OFFSET Table 02h, Register A8h-A9h: MON3 FINE OFFSET Table 02h, Register AAh-ABh: MON4 OFFSET Table 02h, Register ACh-ADh: MON3 COARSE OFFSET
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE A2h, A4h, A6h, A8h, AAh, A3h, A5h, A7h, A9h, ABh, (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
DS1873
Allows offset control these voltage measurements desired. This number two's complement.
Table 02h, Register AEh-AFh: INTERNAL TEMP OFFSET
FACTORY CALIBRATED READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
Allows offset control temperature measurement desired. final result must XORed with BB40h before writing this register. Factory calibration contains desired value reading degrees Celsius.
SFP+ Controller with Analog Interface DS1873
Table 02h, Register B0h-B3h:
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE FFFF FFFFh (PW1 WPW1) Nonvolatile (SEE)
value compared against value written this location enable access. power-on, value ones. Thus, writing these bytes ones grants access power-on without writing password entry. reads this register 00h.
Table 02h, Register B4h-B7h:
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE FFFF FFFFh Nonvolatile (SEE)
value compared against value written this location enable access. power-on, value ones. Thus, writing these bytes ones grants access power-on without writing password entry. reads this register 00h.
SFP+ Controller with Analog Interface
Table 02h, Register B8h: RANGING
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
DS1873
RESERVED
HLOS2
HLOS1
HLOS0
RESERVED
LLOS2
LLOS21
LLOS0
This register controls full-scale range quick-trip monitoring differential input's MON3. RESERVED (Default HLOS[2:0]: HLOS Full-Scale Ranging. 3-bit value select comparison voltage high found MON3. Default 000b creates 1.25V. HLOS[2:0] 000b 001b BITS 010b 011b 100b 101b 110b 111b RESERVED (Default LLOS[2:0]: LLOS Full-Scale Ranging. 3-bit value select comparison voltage found MON3. Default 000b creates 1.25V. LLOS[2:0] 000b 001b BITS 010b 011b 100b 101b 110b 111b 1.25V 100.00 80.00 66.67 50.00 40.00 33.33 28.57 25.00 Voltage 1.250 1.000 0.833 0.625 0.500 0.417 0.357 0.313 1.25V 100.00 80.00 66.67 50.00 40.00 33.33 28.57 25.00 Voltage 1.250 1.000 0.833 0.625 0.500 0.417 0.357 0.313
SFP+ Controller with Analog Interface DS1873
Table 02h, Register B9h: COMP RANGING
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
RESERVED
HBIAS2
HBIAS1
HBIAS0
RESERVED
APC2
APC1
APC0
upper nibble this byte controls full-scale range quick-trip monitoring BIAS. lower nibble this byte controls full-scale range quick-trip monitoring reference well closed-loop monitoring APC. RESERVED (Default HBIAS[2:0]: HBIAS Full-Scale Ranging. 3-bit value select comparison voltage BIAS found MON1. Default 000b creates 1.25V. BIAS[2:0] 000b 001b BITS 010b 011b 100b 101b 110b 111b RESERVED (Default APC[2:0]: Full-Scale Ranging. 3-bit value select comparison voltage MON2 with APC. Default 000b creates 2.5V. APC[2:0] 000b 001b BITS 010b 011b 100b 101b 110b 111b 2.50V 100.00 80.00 66.67 50.00 40.00 33.33 28.57 25.00 Voltage 2.500 2.000 1.667 1.250 1.000 0.833 0.714 0.625 1.25V 100.00 80.00 66.67 50.00 40.00 33.33 28.57 25.00 Voltage 1.250 1.000 0.833 0.625 0.500 0.417 0.357 0.313
SFP+ Controller with Analog Interface
Table 02h, Register BAh: IBIASMAX
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
DS1873
This value defines maximum value allowed upper bits BIAS output during closed-loop operations. During intial step binary search, this value does cause alarm, does still clamp BIAS value. After startup sequence normal operations), loop tries create BIAS value greater than this setting, clamped creates BIAS alarm.
Table 02h, Register BBh: ISTEP
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
initial step value used power-on after pulse control BIAS DAC. startup, this value plus continuously added BIAS value until feedback (MON2) greater than threshold. that time, binary search used complete startup closed loop. resulting math operation greater than IBIASMAX (Table 02h, Register BAh), result loaded into BIAS DAC, binary search begun complete initial search APC. During startup, BIAS steps causing higher bias value than IBIASMAX create BIAS alarm. BIAS alarm detection enabled binary search.
SFP+ Controller with Analog Interface DS1873
Table 02h, Register BCh: HTXP
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
Fast-comparison threshold adjust high TXP. This value added value recalled from Table 04h. greater than 0xFF, 0xFF used. Comparisons greater than VHTXP, compared against VMON2, create alarm. same ranging applied should used here. Full Scale VHTXP (HTXP DAC)
Table 02h, Register BDh: LTXP
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
Fast-comparison threshold adjust TXP. This value subtracted from value recalled from Table 04h. difference less than 0x00, 0x00 used. Comparisons less than VLTXP, compared against VMON2, create alarm. same ranging applied should used here. Full Scale VLTXP LTXP
SFP+ Controller with Analog Interface DS1873
Table 02h, Register BEh: HLOS
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
Fast-comparison threshold adjust high LOS. combination HLOS LLOS creates hysteresis comparator. RSSI falls below LLOS threshold, alarm alarm remains until RSSI input found above HLOS threshold setting, which clears alarm sets alarm bit. power-on, both alarm bits hysteresis comparator uses LLOS threshold setting.
Table 02h, Register BFh: LLOS
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
Fast-comparison threshold adjust LOS. HLOS (Table 02h, Register BEh) functional description.
SFP+ Controller with Analog Interface DS1873
Table 02h, Register C0h: PW_ENA
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
RWTBL78
RWTBL1C
RWTBL2
RWTBL1A
RWTBL1B
WLOWER
WAUXA
WAUXB
RWTBL78: Tables 07h-08h (Default) Read write access only. Read write access both PW2. RWTBL1C: Table bytes F8h-FFh. Table address dependent MASK (Table 02h, Register 89h). (Default) Read write access only. Read write access both PW2. RWTBL2: Tables 02h. Writing nonvolatile value this requires access. (Default) Read write access only. Read write access both PW2. RWTBL1A: Table 01h, Registers 80h-BFh Read write access only. (Default) Read write access both PW2. RWTBL1B: Table 01h, Registers C0h-F7h (Default) Read write access only. Read write access both PW2. WLOWER: Bytes 00h-5Fh main memory. users read this area. (Default) Write access only. Write access both PW2. WAUXA: Auxiliary Memory, Registers 00h-7Fh. users read this area. (Default) Write access only. Write access both PW2. WAUXB: Auxiliary Memory, Registers 80h-FFh. users read this area. (Default) Write access only. Write access both PW2.
SFP+ Controller with Analog Interface
Table 02h, Register C1h: PW_ENB
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
DS1873
RWTBL46
RTBL1C
RTBL2
RTBL1A
RTBL1B
WPW1
WAUXAU
WAUXBU
RWTBL46: Tables (Default) Read write access only. Read write access PW1. RTBL1C: Table Table 05h, Registers F8h-FFh. Table address dependent MASK (Table 02h, Register 89h). (Default) Read write access only. Read access PW1. RTBL2: Table (Default) Read write access only. Read access PW1. RTBL1A: Table 01h, Registers 80h-BFh (Default) Read write access only. Read access PW1. RTBL1B: Table 01h, Registers C0h-F7h (Default) Read write access only. Read access PW1. WPW1: Register (Table 02h, Registers B0h-B3h). security purposes these registers readable. (Default) Write access only. Write access PW1. WAUXAU: Auxiliary Memory, Registers 00h-7Fh. users read this area. Write access only. (Default) Write access user, PW2. WAUXBU: Auxiliary Memory, Registers 80h-FFh. users read this area. Write access only. (Default) Write access user, PW2.
Table 02h, Register C2h-C5h: RESERVED
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
These registers reserved.
SFP+ Controller with Analog Interface DS1873
Table 02h, Register C6h: POLARITY
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
RESERVED
RESERVED
RESERVED
RESERVED
MODP
BIASP
DAC1P
DAC2P
BITS
RESERVED MODP: Polarity. (Table 02h, Registers 82h-83h) range 000h-3FFh. setting 000h creates pulse density zero 3FFh creates pulse density 1023/1024. This polarity allows user VREFIN reference. power-on 000h, thus application that needs VREFIN state should inverted polarity. Normal polarity. setting 000h results pulse-density output zero held setting 3FFh results pulsed-density output 1023/1024 held mostly VREFIN. Inverted polarity. setting 000h results pulse-density output zero held VREFIN setting 3FFh results pulsed-density output 1023/1024 held mostly GND. BIASP: BIAS Polarity. BIAS (Table 02h, Registers CA-CBh) range 000h-3FFh. setting 000h creates pulse density zero 3FFh creates pulse density 1023/1024. This polarity allows user VREFIN reference. power-on BIAS 000h, thus application that needs VREFIN state should inverted polarity. Normal polarity. setting 000h results pulse-density output zero held setting 3FFh results pulsed-density output 1023/1024 held mostly VREFIN. Inverted polarity. setting 000h results pulse-density output zero held VREFIN setting 3FFh results pulsed-density output 1023/1024 held mostly GND. DAC1P: DAC1 VALUE Polarity. DAC1 VALUE (Table 02h, Registers 84h-85h) range 000h- 3FFh. setting 000h creates pulse density zero 3FFh creates pulse density 1023/1024. This polarity allows user VREFIN reference. power-on DAC1 VALUE 000h, thus application that needs VREFIN state should inverted polarity. Normal polarity. setting 000h results pulse-density output zero held setting 3FFh results pulsed-density output 1023/1024 held mostly VREFIN. Inverted polarity. setting 000h results pulse-density output zero held VREFIN setting 3FFh results pulsed-density output 1023/1024 held mostly GND. DAC2P: DAC2 VALUE Polarity. DAC2 VALUE (Table 02h, Registers 86h-87h) range 000h- 3FFh. setting 000h creates pulse-density zero 3FFh creates pulse density 1023/1024. This polarity allows user VREFIN reference. power-on DAC2 VALUE 000h, thus application that needs VREFIN state should inverted polarity. Normal polarity. setting 000h results pulse-density output zero held setting 3FFh results pulsed-density output 1023/1024 held mostly VREFIN. Inverted polarity. setting 000h results pulse-density output zero held VREFIN setting 3FFh results pulsed-density output 1023/1024 held mostly GND.
SFP+ Controller with Analog Interface
Table 02h, Register C7h: TBLSELPON
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW1 RWTBL2) Nonvolatile (SEE)
DS1873
Chooses initial value table-select byte (Lower Memory, Register 7Fh) power-on.
Table 02h, Register C8h-C9h: BIAS
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 0000h (PW1 RWTBL2) (PW1 RTBL2) (PW2 BIAS (PW1 RWTBL2 BIAS Volatile
When BIAS (Table 02h, Register 80h) written writes these bytes control BIAS DAC.
Table 02h, Register CAh: MAN_CNTL
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW2 BIAS (PW1 RWTBL2 BIAS Volatile
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
MAN_CLK
When BIAS (Table 02h, Register 80h) written MAN_CLK controls updates BIAS value BIAS DAC. values BIAS must written with separate write command. Setting MAN_CLK clocks BIAS value BIAS DAC. Write BIAS value with write command. MAN_CLK with separate write command. Clear MAN_CLK with separate write command.
SFP+ Controller with Analog Interface DS1873
Table 02h, Register CBh-CCh: BIAS
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 0000h (PW1 RWTBL2) (PW1 RTBL2) Volatile
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
digital value used BIAS resolved from APC. This register updated after each decision loop.
Table 02h, Register CDh: RESERVED
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2)
This register reserved.
Table 02h, Register CEh: DEVICE
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2)
Hardwired connections show device
SFP+ Controller with Analog Interface
Table 02h, Register CFh: DEVICE
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE DEVICE VERSION (PW1 RWTBL2) (PW1 RTBL2)
DS1873
DEVICE VERSION
Hardwired connections show device version.
Table 02h, Register D0h:
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW2 ACPEN (PW1 RWTBL2 Volatile
digital value used reference recalled from Table adjusted memory address found TINDEX. This register updated temperature conversion.
SFP+ Controller with Analog Interface DS1873
Table 02h, Register D1h: HBIAS
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2) (PW2 (PW1 RWTBL2 Volatile
digital value used HBIAS reference recalled from Table adjusted memory address found TINDEX. This register updated temperature conversion.
Table Register D2h-D7h: RESERVED
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL2) (PW1 RTBL2)
These registers reserved.
Table 02h, Register D8h-F7h: EMPTY
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE None
These registers exist.
SFP+ Controller with Analog Interface DS1873
Table Register Description
Table 04h, Register 80h-C7h: MODULATION
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL46) (PW1 RTBL46) (PW1 RWTBL46) Nonvolatile (EE)
80h-C7h
digital value modulation output. MODULATION registers assigned hold temperature profile DAC. values this table determine point modulation voltage. temperature measurement used index (TINDEX, Table 02h, Register 81h) increments from -40°C +102°C, starting Table 04h. Register defines -40°C -38°C output, Register defines -38°C -36°C output, Values recalled from this EEPROM memory table written into (Table 02h, Register 82h-83h) location that holds value until next temperature conversion. DS1873 placed into manual mode (MOD bit, Table 02h, Register 80h), where directly controlled calibration. temperature compensation functionality required, then program entire Table desired modulation setting.
Table 04h, Register F8h-FFh: OFFSET
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE digital value temperature offset output. Less than equal -8°C Greater than -8°C +8°C Greater than +8°C +24°C Greater than +24°C +40°C Greater than +40°C +56°C Greater than +56°C +72°C Greater than +72°C +88°C Greater than +88°C (PW1 RWTBL46) (PW1 RTBL46) (PW1 RWTBL46) Nonvolatile (EE)
F8h-FFh
10-bit register. MODULATION 8-bit LUT. OFFSET times plus MODULATION makes entire 10-bit range.
SFP+ Controller with Analog Interface DS1873
Table Register Descriptions
Table 06h, Register 80h-A3h:
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL46) (PW1 RTBL46) (PW1 RWTBL46) Nonvolatile (EE)
80h-A3h
registers assigned hold temperature profile reference DAC. values this table combined with bits COMP RANGING register (Table 02h, Register B9h) determine point loop. temperature measurement used index (TINDEX, Table 02h, Register 81h) increments from -40°C +100°C, starting Register Table 05h. Register defines -40°C -36°C reference value, Register defines -36°C -32°C reference value, Values recalled from this EEPROM memory table written into (Table 02h, Register CDh) location that holds value until next temperature conversion. DS1873 placed into manual mode (APC bit, Table 02h, Register 80h), where directly controlled calibration. temperature compensation required application, program entire desired point.
Table 06h, Register A4h-A7h: RESERVED
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL46) (PW1 RTBL46) (PW1 RWTBL46) Nonvolatile (EE)
These registers reserved.
SFP+ Controller with Analog Interface DS1873
Table 06h, Register F8h-FFh: HBIAS
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL46) (PW1 RTBL46) (PW1 RWTBL46) Nonvolatile (EE)
F8h-FFh
High bias alarm threshold (HBATH) digital clamp used ensure that setting BIAS currents does exceed value. table below shows range temp each byte's location. table shows rising temperature; falling temperature there hysteresis. Less than equal -8°C Greater than -8°C +8°C Greater than +8°C +24°C Greater than +24°C +40°C Greater than +40°C +56°C Greater than +56°C +72°C Greater than +72°C +88°C Greater than +88°C
Table Register Descriptions
Table 07h, Register 80h-C7h: DAC1
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL78) (PW1 RTBL78) (PW1 RWTBL78) Nonvolatile (EE)
80h-C7h
DAC1 registers assigned hold profile DAC1. values this table determine point DAC1. temperature measurement used index (TINDEX, Table 02h, Register 81h) increments from -40°C +102°C, starting Register Table 07h. Register defines -40°C -38°C DAC1 value, Register defines -38°C -36°C DAC1 value, Values recalled from this EEPROM memory table written into DAC1 VALUE (Table 02h, Registers 84h-85h) location, which holds value until next temperature conversion. part placed into manual mode (DAC1 bit, Table 02h, Register 80h), where DAC1 directly controlled calibration. temperature compensation required application, program entire desired DAC1 point.
SFP+ Controller with Analog Interface DS1873
Table 07h, Register C8h-F7h: RESERVED
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL78) (PW1 RTBL78) (PW1 RWTBL78) Nonvolatile (EE)
These registers reserved.
Table 07h, Register F8h-FFh: DAC1 OFFSET
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE digital value temperature offset DAC1 output. Less than equal -8°C Greater than -8°C +8°C Greater than +8°C +24°C Greater than +24°C +40°C Greater than +40°C +56°C Greater than +56°C +72°C Greater than +72°C +88°C Greater than +88°C (PW1 RWTBL78) (PW1 RTBL78) (PW1 RWTBL78) Nonvolatile (EE)
F8h-FFh
DAC1 VALUE 10-bit register. DAC1 8-bit LUT. DAC1 OFFSET times plus MODULATION makes entire 10-bit range.
SFP+ Controller with Analog Interface DS1873
Table Register Descriptions
Table 08h, Register 80h-A3h: DAC2
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL78) (PW1 RTBL78) (PW1 RWTBL78) Nonvolatile (EE)
80h-A3h
DAC2 registers assigned hold profile DAC2. values this table determine point DAC2. temperature measurement used index (TINDEX, Table 02h, Register 81h) increments from -40°C +100°C, starting Register Table 07h. Register defines -40°C -36°C DAC2 value, Register defines -36°C -32°C DAC2 value, Values recalled from this EEPROM memory table written into DAC2 VALUE (Table 02h, Registers 86h-87h) location that holds value until next temperature conversion. DS1873 placed into manual mode (DAC2 bit, Table 02h, Register 80h), where DAC2 directly controlled calibration. temperature compensation required application, program entire desired DAC2 point.
Table 08h, Register A4h-A7h: RESERVED
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL78) (PW1 RTBL78) (PW1 RWTBL78) Nonvolatile (EE)
These registers reserved.
SFP+ Controller with Analog Interface DS1873
Table 08h, Register F8h-FFh: DAC2 OFFSET
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWTBL78) (PW1 RTBL78) (PW1 RWTBL78) Nonvolatile (EE)
F8h-FFh
digital value temperature offset DAC2 output. Less than equal -8°C Greater than -8°C +8°C Greater than +8°C +24°C Greater than +24°C +40°C Greater than +40°C +56°C Greater than +56°C +72°C Greater than +72°C +88°C Greater than +88°C
DAC2 VALUE 10-bit register. DAC2 8-bit LUT. DAC2 OFFSET times plus MODULATION makes entire 10-bit range.
Auxiliary Memory Register Descriptions
Auxiliary Memory A0h, Register 00h-7Fh: EEPROM
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 WAUXA) (WAUXAU) Nonvolatile (EE)
00h-7Fh
Accessible with slave address A0h.
SFP+ Controller with Analog Interface DS1873
Auxiliary Memory A0h, Register 80h-FFh: EEPROM
FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE (PW1 RWAUXB) (RWAUXBU) Nonvolatile (EE)
80h-FFh
Accessible with slave address A0h.
Applications Information
Power-Supply Decoupling
achieve best results, recommended that power supply decoupled with 0.01µF 0.1µF capacitor. high-quality, ceramic, surface-mount capacitors, mount capacitors close possible pins minimize lead inductance.
Package Information
latest package outline information land patterns, www.maxim-ic.com/packages. Note that "+", "#", package code indicates RoHS status only. Package drawings show different suffix character, drawing pertains package regardless RoHS status. PACKAGE TYPE TQFN-EP PACKAGE CODE T2855+6 DOCUMENT 21-0140
Pullup Resistors
open-collector output DS1873 that requires pullup resistor realize high logic levels. master using either open-collector output with pullup resistor push-pull output driver utilized SCL. Pullup resistor values should chosen ensure that rise fall times listed Electrical Characteristics table within specification.
SFP+ Controller with Analog Interface DS1873
Revision History
REVISION NUMBER REVISION DATE 9/09 Initial release. Changed default state TXDIO Table 02h, Register 8Bh: CNFGC. 11/09 Corrected factory default value Table 02h, Register C6h: POLARITY from 0Ch. DESCRIPTION PAGES CHANGED
Maxim cannot assume responsibility circuitry other than circuitry entirely embodied Maxim product. circuit patent licenses implied. Maxim reserves right change circuitry specifications without notice time.
_Maxim Integrated Products, Gabriel Drive, Sunnyvale, 94086 408-737-7600 2009 Maxim Integrated Products Maxim registered trademark Maxim Integrated Products, Inc.

SFP+ Controller with Analog Interface DS1873 controls monitors fu

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