Low-Voltage SPI/3-Wire RTCs with Trickle Charger low-voltage seri

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Low-Voltage SPI/3-Wire RTCs with Trickle Charger low-voltage seri

Datasheet Thumbnail

Top Searches for this datasheet

19-4898; 8/09
Low-Voltage SPI/3-Wire RTCs with Trickle Charger
low-voltage serial-peripheral interface (SPITM) DS1390/DS1391/DS1394 low-voltage 3-wire DS1392/DS1393 real-time clocks (RTCs) clocks/calendars that provide hundredths second, seconds, minutes, hours, day, date, month, year information. date month automatically adjusted months with fewer than days, including corrections leap year. clock operates either 24-hour 12-hour format with AM/PM indicator. programmable time-of-day alarm provided. temperature-compensated voltage reference monitors status automatically disables interface switches backup supply power failure detected. DS1390, single open-drain output provides interrupt square wave four selectable frequencies. DS1391 replaces SQW/INT with output/ debounced input. DS1390, DS1391, DS1394 programmed serially through SPI-compatible, bidirectional bus. DS1392 DS1393 communicate over 3-wire serial bus, extra used either separate interrupt output/debounced input. five devices available 10-pin µSOP package, rated over industrial temperature range. Reset Output/Debounced Input (DS1391/DS1393) Separate Output (DS1392) Trickle-Charge Capability Supports Modes (DS1394) Supports Modes (DS1390/DS1391) 3-Wire Interface (DS1392/DS1393) 4MHz 3.0V 3.3V 1MHz 1.8V Three Operating Voltages: 1.8V ±5%, 3.0V ±10%, 2.97 5.5V (DS1394: 3.3V ±10%) Industrial Temperature Range: -40°C +85°C Underwriters Laboratories (UL) Recognized
DS1390-DS1394
Ordering Information
PART DS1390U-18+ DS1390U-3+ DS1390U-33+ DS1390U-33/V+ DS1391U-18+ DS1391U-3+ DS1391U-33+ DS1392U-18+ DS1392U-3+ DS1392U-33+ DS1393U-18+ DS1393U-3+ DS1393U-33+ DS1394U-33+ PINOPERATING PACKAGE VOLTAGE MARK 1390 rr-18 1390 rr-3 1390 rr-33 1390 rr-33 1391 rr-18 1391 rr-3 1391 rr-33 1393 rr-18 1392 rr-3 1392 rr-33 1393 rr-18 1393 rr-3 1393 rr-33 1394 rr-33
Applications
Hand-Held Devices GPS/Telematics Devices Embedded Time Stamping Medical Devices
Features
Real-Time Clock Counts Hundredths Seconds, Seconds, Minutes, Hours, Day, Date, Month, Year with Leap-Year Compensation Valid 2100 Output Configurable Interrupt Square Wave with Programmable Frequency 32.768kHz, 8.192kHz, 4.096kHz, (DS1390/DS1393/DS1394 Only) Time-of-Day Alarm Power-Fail Detect Switch Circuitry
Note: devices rated -40°C +85°C operating temperature range. +Denotes lead(Pb)-free/RoHS-compliant package. denotes automotive qualified part. anywhere mark denotes lead(Pb)free/RoHS-compliant package. Revision code second line mark.
Typical Operating Circuits Configurations appear data sheet.
trademark Motorola, Inc.
Maxim Integrated Products
pricing, delivery, ordering information, please contact Maxim Direct 1-888-629-4642, visit Maxim's website www.maxim-ic.com.
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
ABSOLUTE MAXIMUM RATINGS
Voltage Range Relative Ground .-0.3V +6.0V Voltage Range Inputs Relative Ground .-0.3V (VCC 0.3V) Operating Temperature Range .-40°C +85°C Storage Temperature Range .-55°C +125°C Soldering Temperature.Refer IPC/JEDEC J-STD-020 Specification.
Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(VCC VCC(MIN) VCC(MAX), -40°C +85°C, unless otherwise noted. Typical values nominal supply voltage +25°C, unless otherwise noted.) (Note
PARAMETER Supply Voltage (Note SYMBOL DS139x-33 DS139x-3 DS139x-18 Logic Logic Supply Voltage, Pullup SQW/INT, SQW, INT, VBACKUP Voltage (Note (Note (Note (Note VBACKUP Power-Fail Voltage (Note Trickle-Charge Current-Limiting Resistors Input Leakage Leakage Leakage DOUT Logic Output DOUT Logic Output Logic Output (DS1390/DS1393/DS1394 SQW/INT; DS1392 SQW, INT; DS1391/DS1393 RST) Active Supply Current (Note ILORST IOHDOUT IOHDOUT (Notes (Notes (Notes (Note (Note (Note -33, (VOH 0.85 VCC) (VOH 0.80 VCC) -33, (VOL 0.15 VCC) (VOL 0.20 VCC) 1.71V; 0.4V IOLSIR 1.3V 1.71V; 0.4V ICCA -200 2.70 2.45 1.51 CONDITIONS 2.97 1.71 -0.3 5.50 1.89 +0.3 VCC(MAX) 2.88 2000 4000 0.750 2.97 2.70 1.71 UNITS
Low-Voltage SPI/3-Wire RTCs with Trickle Charger
RECOMMENDED OPERATING CONDITIONS (continued)
(VCC VCC(MIN) VCC(MAX), -40°C +85°C, unless otherwise noted. Typical values nominal supply voltage +25°C, unless otherwise noted.) (Note
PARAMETER Standby Current (Note VBACKUP Leakage Current (VBACKUP 3.7V, VCC(MAX)) SYMBOL ICCS IBACKUPLKG CONDITIONS UNITS
DS1390-DS1394
ELECTRICAL CHARACTERISTICS
(VCC VBACKUP 3.7V, -40°C +85°C, unless otherwise noted.) (Note
PARAMETER VBACKUP Current VBACKUP Current (32kHz) VBACKUP Current VBACKUP 3.0V, +25°C VBACKUP Current, (Data Retention) SYMBOL IBACKUP1 IBACKUP2 (Note (Note CONDITIONS 1000 1150 UNITS
IBACKUP3
(Note
1000
IBACKUPDR (Note
ELECTRICAL CHARACTERISTICS-SPI INTERFACE
(VCC VCC(MIN) VCC(MAX), -40°C +85°C, unless otherwise noted.) (Note
PARAMETER SCLK Frequency (Note Data SCLK Setup SCLK Data Hold SCLK Data Valid (Notes SCLK Time (Note SCLK High Time (Note SCLK Rise Fall SCLK Setup (Note SCLK Hold (Note Inactive Time (Note Output High Impedance SYMBOL SCLK tCDH tCDD tCCH tCWH tCDZ 2.7V 1.71V 5.5V 1.89V 2.7V 1.71V CONDITION 5.5V 1.89V 1.89V 5.5V 1.89V 5.5V 1.89V UNITS
(Notes (Notes 2.7V 1.71V 2.7V 1.71V 2.7V 1.71V 5.5V
(Notes
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
SCLK tCDH tCDD tCDZ
DOUT CPHA
HIGH IMPEDANCE
WRITE ADDRESS BYTE
READ DATA BYTE
NOTE: SCLK EITHER POLARITY SHOWN CPOL
Figure Timing Diagram-SPI Read Transfer (Mode
SCLK tCDH tCDD tCDZ
DOUT CPHA
HIGH IMPEDANCE
WRITE ADDRESS BYTE NOTE: SCLK EITHER POLARITY SHOWN CPOL
READ DATA BYTE
Figure Timing Diagram-SPI Read Transfer (Mode
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
CPHA SCLK tCDH tCCH tCWH
WRITE ADDRESS BYTE DOUT HIGH IMPEDANCE
READ DATA BYTE
NOTE: SCLK EITHER POLARITY SHOWN CPOL
Figure Timing Diagram-SPI Write Transfer (Mode
CPHA
tCWH
SCLK tCDH tCCH
WRITE ADDRESS BYTE DOUT HIGH IMPEDANCE
READ DATA BYTE
NOTE: SCLK EITHER POLARITY SHOWN CPOL
Figure Timing Diagram-SPI Write Transfer (Mode
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
ELECTRICAL CHARACTERISTICS-3-WIRE INTERFACE
(VCC VCC(MIN) VCC(MAX), -40°C +85°C.) (Note (Figures
PARAMETER SCLK Frequency (Note Data SCLK Setup SCLK Data Hold SCLK Data Valid (Notes SCLK Time (Note SCLK High Time (Note SCLK Rise Fall SCLK Setup SCLK Hold Inactive Time (Note Output High Impedance SYMBOL SCLK tCDH tCDD tCCH tCWH tCDZ (Note (Note 2.7V 1.71V 5.5V 1.89V 2.7V 1.71V CONDITION 5.5V 1.89V 1.89V 5.5V 1.89V 5.5V 1.89V UNITS
(Notes (Notes 2.7V 1.71V 2.7V 1.71V 2.7V 1.71V 5.5V
(Note
ELECTRICAL CHARACTERISTICS
(VCC VCC(MIN) VCC(MAX), -40°C +85°C, unless otherwise noted.) (Note
PARAMETER Pushbutton Debounce Reset Active Time Oscillator Stop Flag (OSF) Delay SYMBOL PBDB tRST tOSF (Note CONDITIONS UNITS
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
SCLK
tCDH
tCDD
tCDZ
WRITE ADDRESS BYTE
READ DATA BYTE
Figure Timing Diagram-3-Wire Read Transfer
tCWH SCLK tCDH tCCH
WRITE ADDRESS BYTE
WRITE DATA BYTE
Figure Timing Diagram-3-Wire Write Transfer
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
POWER-UP/POWER-DOWN CHARACTERISTICS
-40°C +85°C) (Figures
PARAMETER Detect Recognize Inputs (VCC Rising) Fall Time; VPF(MAX) VPF(MIN) Rise Time; VPF(MIN) VPF(MAX) SYMBOL tRST (Note CONDITIONS UNITS
VPF(MAX) VPF(MIN)
tRPU tRST
INPUTS
RECOGNIZED
DON'T CARE
RECOGNIZED
HIGH IMPEDANCE OUTPUTS VALID VALID
Figure Power-Up/Down Timing
PBDB
tRST
Figure Pushbutton Reset Timing
Low-Voltage SPI/3-Wire RTCs with Trickle Charger
CAPACITANCE
+25°C)
PARAMETER Capacitance Input Pins Capacitance Output Pins (High Impedance) SYMBOL CONDITIONS UNITS
DS1390-DS1394
WARNING:
Note Note Note Note Note Note Note Note Note Note Note Note Note Note Note Note Note
Negative undershoots below -0.3V while part battery-backed mode cause loss data.
Limits -40°C guaranteed design production tested. voltages referenced ground. trickle-charge resistor allowed 3.63V should enabled. diode recommended 3.0V. Measured typ, VBACKUP register A5h. Measured typ, VBACKUP register A6h. Measured typ, VBACKUP register A7h. SCLK, DIN, DS1390/DS1391/DS1394; SCLK, DS1392/DS1393. DOUT, SQW/INT (DS1390/DS1393/DS1394), SQW, (DS1392). internal (typ) pullup resistor VCC. ICCA-SCLK clocking frequency 4MHz 3.3V versions; 1MHz 1.8V version; (DS1391/DS1393) inactive. Outputs open. Specified with inactive. Measured with 32.768kHz crystal attached Typical values measured +25°C 3.0VBACKUP. With 50pF load. Measured VDD, 10ns rise/fall times. Measured VDD. Measured from point SCLK minimum SDO. parameter tOSF time that oscillator must stopped flag over voltage range VCC(MAX) 1.3V VBACKUP 5.5V. This delay applies only oscillator enabled running. EOSC startup time oscillator added this delay.
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
Typical Operating Characteristics
(VCC +3.3V, +25°C, unless otherwise noted.)
IBACKUP VBACKUP, BBSQ1
DS1390 TOC01
IBACKUP VBACKUP, BBSQ1
1000 VBACKUP
DS1390 toc02
VCC= SUPPLY CURRENT (nA) VBACKUP
SUPPLY CURRENT (nA)
IBACKUP TEMPERATURE VBACKUP 3.0V
DS1390 toc03
OSCILLATOR FREQUENCY SUPPLY VOLTAGE
DS1390 toc04
SUPPLY CURRENT (nA) TEMPERATURE (°C)
32768.00
32767.95 FREQUENCY (Hz)
32767.90
32767.85
32767.80 SUPPLY
Low-Voltage SPI/3-Wire RTCs with Trickle Charger
Description
DS1390/ DS1391 DS1394 DS1392 DS1393 NAME FUNCTION Connections Standard 32.768kHz Quartz Crystal. internal oscillator circuitry designed operation with crystal having specified load capacitance (CL). input oscillator optionally connected external 32.768kHz oscillator. output internal oscillator, floated external oscillator connected
DS1390-DS1394
Backup Power Input Primary Cell. This rechargeable battery/super secondary supply. recognized ensure against VBACKUP reverse charging current when used with lithium battery (www.maximic.com/qa/info/w/). This must grounded used. Diodes series between battery VBACKUP prevent proper operation. Chip-Select Input. This used select deselect part. Chip Enable 3-Wire Interface Ground Data Input. This used shift address data into part. Interrupt Output. This used output interrupt signal, enabled control register. maximum voltage this 5.5V, independent VBACKUP. enabled, functions when device powered either VBACKUP. Reset. This active-low, open-drain output indicates status relative specification. falls below driven low. When exceeds VPF, tRST, driven high impedance. This combined with debounced pushbutton input function. This activated pushbutton reset request. This internal, (typ) pullup resistor VCC. external pullup resistors should connected. crystal oscillator disabled, startup time oscillator added tRST delay. Data Output. Data output this when part read mode. CMOS push-pull driver. Input/Output 3-Wire Interface. CMOS push-pull driver. Serial Clock Input. This used control timing data into part.
DOUT SCLK
Square-Wave/Interrupt Output. This used output programmable square wave interrupt signal. When enabled setting ESQW logic SQW/INT outputs four frequencies: 32.768kHz, SQW/INT 8.192kHz, 4.096kHz, 1Hz. This open drain requires external pullup resistor. maximum voltage this 5.5V, independent VBACKUP. enabled, SQW/INT functions when device powered either VBACKUP. used, this left open. Square-Wave Output. This open drain requires external pullup resistor. maximum voltage this 5.5V, independent VBACKUP. enabled, functions when device powered either VBACKUP. used, this left open. Power Primary Power Supply
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
Functional Diagram
HUNDREDTHS-OFSECONDS GENERATOR
SQUARE-WAVE RATE SELECTOR, INT, MUX, OUTPUT SQW/INT (DS1390/93/94) (DS1391) (DS1392)
VBACKUP
LEVEL DETECT, POWER SWITCH, WRITE PROTECT, TRICKLE CHARGER
REAL-TIME CLOCK WITH HUNDREDTHS SECONDS
(DS1390/91/94) (DS1392/93) (CE) SCLK (DS1390/91/94) (DS1390/91/94) DOUT (DS1392/93) INTERFACE CONTROL/STATUS REGISTERS TRICKLE REGISTER ALARM REGISTERS
DS1390/DS1391/ DS1392/DS1393/DS1394
Detailed Description
DS1390-DS1394 RTCs low-power clocks/calendars with alarms. Address data transferred serially through 4-wire interface DS1390 DS1391 through 3-wire interface DS1392, DS1393, DS1394. DS1390/DS1391 operate slave device serial bus. DS1392/DS1393 operate using 3-wire synchronous serial bus. Access obtained selecting part DS1392/DS1393) clocking data into/out part using SCLK DIN/DOUT pins (I/O DS1392/DS1393). Multiple-byte transfers supported within period (see Serial-Data
section). clocks/calendars provide hundredths seconds, seconds, minutes, hours, day, date, month, year information. alarm functions performed timekeeping registers, allowing user high resolution alarms. date month automatically adjusted months with fewer than days, including corrections leap year. clocks operate either 24-hour 12-hour format with AM/PM indicator. five devices have built-in temperature-compensated voltage reference that detects power failures automatically switches battery supply. Additionally, devices provide trickle charging backup voltage source, with selectable charging resistance diode voltage drops.
Low-Voltage SPI/3-Wire RTCs with Trickle Charger
Power Control
power-control function provided precise, temperature-compensated voltage reference comparator circuit that monitors level. device fully accessible data written read when greater than VPF. However, when falls below VPF, internal clock registers blocked from access. less than VBACKUP, device power switched from VBACKUP when drops below greater than VBACKUP, device power switched from BACKUP when drops below BACKUP Timekeeping operation register data maintained from VBACKUP source until returned nominal levels (Table After returns above VPF, read write access allowed after goes high (Figure
Oscillator Circuit
five devices external 32.768kHz crystal. oscillator circuit does require external resistors capacitors operate. Table specifies several crystal parameters external crystal. crystal used with specified characteristics, startup time usually less than second.
DS1390-DS1394
Table Crystal Specifications*
PARAMETER Nominal Frequency Series Resistance Load Capacitance SYMBOL 32.768 UNITS
*The crystal, traces, crystal input pins should isolated from generating signals. Refer Application Note Crystal Considerations Maxim Real-Time Clocks additional specifications.
Table Power Control
SUPPLY CONDITION VBACKUP VBACKUP VBACKUP VBACKUP READ/WRITE ACCESS) POWERED VBACKUP
Clock Accuracy
accuracy clock dependent upon accuracy crystal accuracy match between capacitive load oscillator circuit capacitive load which crystal trimmed. Additional error added crystal frequency drift caused temperature shifts. External circuit noise coupled into oscillator circuit result clock running fast. Figure shows typical board layout isolation crystal oscillator from noise. Refer Application Note Crystal Considerations with Maxim Real-Time Clocks detailed information.
LOCAL GROUND PLANE (LAYER
CRYSTAL
NOTE: AVOID ROUTING SIGNAL LINES CROSSHATCHED AREA (UPPER LEFT QUADRANT) PACKAGE UNLESS THERE GROUND PLANE BETWEEN SIGNAL LINE DEVICE PACKAGE.
Figure Layout Example
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
Address
Table shows address DS1390- DS1393 registers. registers located address locations read mode, write mode. During multibyte access, when address pointer reaches 0Fh, wraps around location 00h. falling edge (DS1390/DS1391/DS1394) rising edge (DS1392/DS1393), current time transferred second registers. time information read from these secondary registers, while clock continue run. This eliminates need re-read registers main registers update during read. avoid rollover issues when writing time date registers, registers should written before hundredths-of-seconds registers reaches (BCD). When reading from hundredths seconds register, there possibility that data transfer happens same time increment register. this occurs, data buffer incorrect. chances this happening approximately 170ppb. There ways deal with this. first method synchronize enabling device with square wave interrupt output (DS1390-DS1394). Enabling device, either after detecting falling edge interrupt output rising edge square-wave output, ensures that events simultaneous. second method read hundredths seconds register until data consecutive reads match. With this method, master must able read register least twice within 10ms update period hundredths seconds register. Either described methods ensures that data registers correct. hundredths seconds register used, also possible same problem occur when reading seconds register. probability error inversely proportional rate register's update frequency relation hundredth seconds register, error rate seconds register would approximately 1.7ppb. same methods used hundredth seconds register would used seconds register.
Table Address
WRITE READ ADDRESS ADDRESS Century 12/24 Year Tenths Seconds Seconds Minutes FUNCTION Hundredths Seconds Seconds Minutes Hours Date Month Year Hundredths Seconds Seconds Minutes Date Month/ Century Year Alarm Hundredths Seconds Alarm Alarm RANGE 0-99 00-59 00-59 1-12 +AM/PM 00-23 01-31 01-12 Century 00-99 0-99 00-59 00-59
Tenths Seconds Seconds Minutes AM/PM Hour Date Month Hour
Hundredths Seconds Seconds Minutes Hour
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
Table Address (continued)
WRITE READ ADDRESS ADDRESS FUNCTION RANGE
12/24
AM/PM Hour
Hour
Hour
Alarm Hours
1-12 AM/PM 00-23 01-31 DS1390/93/94 DS1391 DS1392
DY/DT
Date BBSQI BBSQI TCS1 TCS0
Date INTCN ESQW
Alarm Alarm Date Control Status Trickle Charger
EOSC TCS3
TCS2
ROUT1 ROUT0
Note: Unless otherwise specified, state registers defined when power (VCC VBACKUP) first applied. General-purpose read/write bit. Always reads zero.
Hundredths-of-Seconds Generator
hundredths-of-seconds generator circuit shown functional diagram state machine that divides incoming frequency (4096Hz) cycles cycle. This produces 100Hz output that slightly during short term, exactly correct every 250ms. divide ratio given Ratio 40.96 Thus, long-term average frequency output exactly desired 100Hz.
Clock Calendar
time calendar information obtained reading appropriate register bytes. Table registers. time calendar initial-
ized writing appropriate register bytes. contents time calendar registers binary-coded decimal (BCD) format. day-of-week register increments midnight. Values that correspond day-of-week user-defined must sequential (i.e., equals Sunday, then equals Monday, on). Illogical time date entries result undefined operation. DS1390-DS1393 either 12-hour 24-hour mode. hours register defined 24-hour mode-select bit. When high, 12-hour mode selected. 12hour mode, AM/PM with logic high being 24-hour mode, second 10-hour hours). Changing 12/24-hour modeselect requires that hours data re-entered, including alarm register used). century (bit month register) toggled when years register overflows from
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
Alarms
five devices contain time-of-day/date alarm. Writing registers through sets alarm. alarm programmed alarm enable INTCN bits control register) activate SQW/INT output alarm-match condition. alarm activate SQW/INT output while device running from BACKUP BBSQI enabled. each time-of-day/date alarm registers mask bits (Table When mask bits each alarm logic alarm only occurs when values timekeeping registers match values stored time-of-day/date alarm registers. alarms also programmed repeat every second, minute, hour, day, date. Table shows possible settings. Configurations listed table result illogical operation. DY/DT bits (bit alarm day/date registers) control whether alarm value stored bits that register reflects week date month. DY/DT written logic alarm result match with date month. DY/DT written logic alarm result match with week. When register values match alarm register settings, alarm-flag (AF) logic alarm-interrupt enable (AIE) also logic INTCN logic alarm condition activates SQW/INT signal. Since contents register expected normally contain match value 00-99 decimal, codes F[0-9], have been used tell part mask tenths hundredths seconds accordingly.
Power-Up/Down, Reset, Pushbutton Reset Functions
precision temperature-compensated reference comparator circuit monitors status VCC. When out-of-tolerance condition occurs, internal power-fail signal generated that blocks read/write access device forces (DS1391/DS1393 only) low. When returns in-tolerance condition, internal power-fail signal held active tRST allow power supply stabilize, (DS1391/ DS1393 only) held low. EOSC logic disable oscillator battery-backup mode), internal power-fail signal kept active tRST plus startup time oscillator. DS1391/DS1393 provide pushbutton switch connected output pin. When DS1391/DS1393 reset cycle, continuously monitors signal low-going edge. edge detected, part debounces switch pulling inhibits read/write access. After PBDB expired, part continues monitor line. line still low, continues monitor line looking rising edge. Upon detecting release, part forces holds additional PBDB.
Table Alarm Mask Bits
REGISTE F[0-9]h [0-9][0-9] [0-9][0-9] [0-9][0-9] [0-9][0-9] [0-9][0-9] [0-9][0-9] DY/DT ALARM REGISTER MASK BITS (BIT ALARM RATE Alarm every 1/100th second Alarm when hundredths seconds match Alarm when tenths, hundredths seconds match Alarm when seconds, tenths, hundredths seconds match Alarm when minutes, seconds, tenths, hundredths seconds match Alarm when hours, minutes, seconds, tenths, hundredths seconds match Alarm when date, hours, minutes, seconds, tenths, hundredths seconds match Alarm when day, hours, minutes, seconds, tenths, hundredths seconds match
Low-Voltage SPI/3-Wire RTCs with Trickle Charger
Special-Purpose Registers
DS1390-DS1394 have three additional registers (control, status, trickle charger) that control RTC, alarms, square-wave output, trickle charger.
DS1390-DS1394
Control Register (0D/8Dh) (DS1390/DS1393/DS1394 Only)
EOSC BBSQI INTCN
Enable Oscillator (EOSC). When logic this starts oscillator. When this logic oscillator stopped whenever device powered BACKUP. oscillator always enabled when valid. This enabled (logic when first applied. Battery-Backed Square-Wave Interrupt Enable (BBSQI). This when logic enables square wave interrupt output when absent DS1390/DS1392/DS1393/DS1394 being powered VBACKUP pin. When BBSQI logic SQW/INT pins) goes high impedance when falls below power-fail trip point. This disabled (logic when power first applied. Bits Rate Select (RS2 RS1). These bits control frequency square-wave output when square wave been enabled. table below shows square-wave frequencies that selected with bits. These bits both logic (32kHz) when power first applied.
SQUARE-WAVE OUTPUT FREQUENCY 4.096kHz 8.192kHz 32.768kHz
Interrupt Control (INTCN). This controls SQW/INT signal. When INTCN logic square wave output SQW/INT pin. oscillator must also enabled square wave output. When INTCN logic match between timekeeping registers either alarm registers then activates SQW/INT (provided alarm also enabled). corresponding alarm flag always set, regardless state INTCN bit. INTCN logic when power first applied. Alarm Interrupt Enable (AIE). When logic this permits alarm flag (AF) status register assert SQW/INT (when INTCN When logic INTCN logic does initiate SQW/INT signal. disabled (logic when power first applied.
Control Register (0D/8Dh) (DS1391 Only)
EOSC
Control bits used DS1390 become general-purpose, battery-backed, nonvolatile SRAM bits DS1391.
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
Control Register (0D/8Dh) (DS1392 Only)
EOSC BBSQI ESQW
INTCN used DS1390/DS1393/DS1394 becomes pin-enable DS1392. This
powers zero, making active.
Status Register (0E/8Eh)
Oscillator Stop Flag (OSF). logic this indicates that oscillator stopped stopped some time used judge validity clock calendar data. This edge-triggered logic when internal circuitry senses oscillator transitioned from normal state STOP condition. following examples conditions that cause set: first time power applied. voltage present VBACKUP insufficient support oscillation. EOSC turned off. External influences crystal (i.e., noise, leakage, etc.). This remains logic until written logic This only written logic Attempting write logic leaves value unchanged. Alarm Flag (AF). logic indicates that time matched alarm registers.
logic INTCN logic SQW/INT also asserted. cleared when written logic This only written logic Attempting write logic leaves value unchanged.
Trickle-Charge Register (0F/8Fh)
simplified schematic Figure shows basic components trickle charger. trickle-charge select (TCS) bits (bits control selection trickle charger. prevent accidental enabling, only pattern 1010 enables trickle charger. other patterns disable trickle charger. trickle charger disabled when power first applied. diode-select (DS) bits (bits select whether diode connected between VBACKUP. diode selected diode selected. ROUT bits (bits select value resistor connected between VBACKUP. Table shows resistor selected resistor-select (ROUT) bits diode selected diode-select (DS) bits.
Table Trickle-Charge Register
TCS3 TCS2 TCS1 TCS0 ROUT1 ROUT0 Disabled Disabled Disabled diode, resistor diode, resistor diode, resistor diode, resistor diode, resistor diode, resistor Initial default value-disabled FUNCTION
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
TRICKLE-CHARGE REGISTER (8Fh WRITE, READ) TCS3 TCS2 TCS1 TCS0 ROUT1 ROUT0 TCS[3:0] TRICKLE-CHARGE SELECT DS[1:0] DIODE SELECT ROUT[1:0] RESISTOR SELECT
SELECT NOTE: ONLY 1010b ENABLES CHARGER
SELECT
SELECT
VBACKUP
Figure DS1390-DS1394 Programmable Trickle Charger
Table Function
MODE Disable Write Read Write Read CPHA High SCLK Input Disabled CPOL* SCLK Rising; CPOL SCLK Falling CPOL SCLK Falling; CPOL SCLK Rising CPOL* SCLK Rising; CPOL SCLK Falling CPOL SCLK Falling; CPOL SCLK Rising Input Disabled Data Latch Data Latch High-Z High-Z Next Data Shift** High-Z Next Data Shift**
*CPOL clock-polarity control register host microprocessor. **SDO remains high-Z until bits data ready shifted during read.
user determines diode resistor selection according maximum current desired battery super charging. maximum charging current calculated illustrated following example. Assume that system power supply 3.3V applied super connected VBACKUP. Also, assume that trickle charger been enabled with diode resistor between
VBACKUP. maximum current IMAX would therefore calculated follows: IMAX (3.3V diode drop) (3.3V 0.7V) 1.3mA super changes, voltage drop between VBACKUP decreases therefore charge current decreases.
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
Serial-Data
DS1390/DS1391/DS1394 provide 4-wire serial-data communicate systems with host controller. DS1390/DS1391 support modes while DS1394 supports modes Both devices support single-byte multiple-byte data transfers maximum flexibility. DOUT pins serial-data input output pins, respectively. input initiates terminates data transfer. SCLK synchronizes data movement between master (microcontroller) slave (DS1390/DS1391) devices. shift clock (SCLK), which generated microcontroller, active only during address data transfer device bus. Input data (DIN) latched internal strobe edge output data (DOUT) shifted shift edge (Figure There clock each transferred. Address data bits transferred groups eight. Address data bytes shifted first into serial-data input (DIN) serial-data output (DOUT). transfer requires address byte specify write read, followed more bytes data. Data transferred DOUT read operation into write operation (Figures 11). address byte always first byte entered after driven low. most significant (W/R) this byte determines read write takes place. more read cycles occur. more write cycles occur. Data transfers occur byte time multiple-byte burst mode. After driven low, address written DS1390/DS1391/DS1394. After address, more data bytes written read. single-byte transfer, byte read written then driven high. multiple-byte transfer, however, multiple bytes read written after address been written. Each read write cycle causes register address automatically increment. Incrementing continues until device disabled. address wraps after incrementing (during read) wraps after incrementing (during write). Note, however, that updated copy time only loaded into useraccessible copy upon falling edge Reading registers continuous loop does show time advancing.
CPHA
CPHA
MODE SHIFT DATA (READ) DATA LATCH/SAMPLE (WRITE) MODE DATA LATCH/SAMPLE (WRITE) SHIFT DATA (READ)
SCLK WHEN CPOL
MODE SHIFT DATA (READ) DATA LATCH/SAMPLE (WRITE)
MODE DATA LATCH/SAMPLE (WRITE) SHIFT DATA (READ)
SCLK WHEN CPOL
Figure Serial Clock Function Microcontroller Clock-Polarity
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
SCLK (MODE
SCLK (MODE
DOUT
HIGH IMPEDANCE
Figure Single-Byte Write
SCLK (MODE
SCLK (MODE
DOUT
HIGH IMPEDANCE
Figure Single-Byte Read
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
SCLK
WRITE ADDRESS BYTE DATA BYTE DATA BYTE DATA BYTE
ADDRESS BYTE READ
DOUT
HIGH-IMPEDANCE
DATA BYTE
DATA BYTE
DATA BYTE
Figure Multiple-Byte Burst Transfer
SCLK
Figure 3-Wire Single-Byte Read
SCLK
Figure 3-Wire Single-Byte Write
Low-Voltage SPI/3-Wire RTCs with Trickle Charger
3-Wire Serial-Data
DS1392/DS1393 provide 3-wire serial-data bus, support both single-byte multiple-byte data transfers maximum flexibility. serial-data input/output pin. input used initiate terminate data transfer. SCLK used synchronize data movement between master (microcontroller) slave (DS1392/DS1393) devices. Input data latched SCLK rising edge output data shifted SCLK falling edge. There clock each transferred. Address data bits transferred groups eight. Address data bytes shifted first into pin. Data transferred first read operation. address byte always first byte entered after driven high. (W/R) this byte determines read write takes place. more read cycles occur. more write cycles occur. Data transfers byte time multiplebyte burst mode. After driven high, address written DS1392/DS1393. After address, more data bytes written read. singlebyte transfer, byte read written then driven (Figures 14). multiple-byte transfer, however, multiple bytes read written after address been written (Figure 15). Each read write cycle causes register address automatically increment. Incrementing continues until device disabled. address wraps after
DS1390-DS1394
SCLK ADDRESS DATA BYTE BYTE DATA BYTE DATA BYTE
Figure 3-Wire Multiple-Byte Burst Transfer
incrementing (during read) wraps after incrementing (during write). Note, however, that updated copy time only loaded into user-accessible copy upon rising edge Reading registers continuous loop does show time advancing.
Chip Information
TRANSISTOR COUNT: 11,525 PROCESS: CMOS SUBSTRATE CONNECTED GROUND
Thermal Information
Theta-JA: 180°C/W Theta-JC: 41.9°C/W
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
Configurations
VIEW
VBACKUP
VBACKUP
DS1390/ DS1394
SQW/INT SCLK DOUT
DS1391
SCLK DOUT
VBACKUP
VBACKUP
DS1392
SCLK
DS1393
SQW/INT SCLK
Low-Voltage SPI/3-Wire RTCs with Trickle Charger
Typical Operating Circuits
CRYSTAL SQW/INT SCLK DOUT SCLK DOUT VBACKUP CRYSTAL
DS1390-DS1394
DS1390/ DS1394
DS1391
VBACKUP
CRYSTAL
CRYSTAL
SCLK SCLK SQW/INT
DS1392
VBACKUP
DS1393
VBACKUP
Package Information
latest package outline information land patterns, www.maxim-ic.com/packages. PACKAGE TYPE µSOP PACKAGE CODE DOCUMENT 21-0061
Low-Voltage SPI/3-Wire RTCs with Trickle Charger DS1390-DS1394
Revision History
REVISION NUMBER REVISION DATE 7/04 Initial release. Added text General Description section indicate that interface disabled when part switches VBACKUP; replaced Ordering Information table with lead-free packages. Added 0MHz (min) spec SCLK frequency SPI, 3-wire timing. 1/07 Added "High Impedance" label DOUT Figure added DOUT trace Figure Changed references VBAT VBACKUP. Replaced Operation section with Power Control section added Table Added DS1394. 8/08 Address section, added description avoid misreads time registers. Added DS1390U-33/V+ Ordering Information table. DESCRIPTION PAGES CHANGED
8/09
Maxim cannot assume responsibility circuitry other than circuitry entirely embodied Maxim product. circuit patent licenses implied. Maxim reserves right change circuitry specifications without notice time.
_Maxim Integrated Products, Gabriel Drive, Sunnyvale, 94086 408-737-7600 2009 Maxim Integrated Products Maxim registered trademark Maxim Integrated Products, Inc.

Low-Voltage SPI/3-Wire RTCs with Trickle Charger low-voltage seri

Top Searches for this datasheet

Other recent searches