TMDS Digital Video Equalizer HDMI/DVI Cables Guaranteed Performan

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TMDS Digital Video Equalizer HDMI/DVI Cables Guaranteed Performan

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19-4822; 7/09
TMDS Digital Video Equalizer HDMI/DVI Cables
Guaranteed Performance 2.25Gbps (HDMI 1.3),
General Description
MAX3815A cable equalizer automatically provides compensation DVIand HDMIv1.3 cables. extends usable cable distance meters (1.65Gbps) meters (2.25Gbps). MAX3815A designed equalize signals encoded transitionminimized differential signaling (TMDS®) format. MAX3815A features four CML-differential inputs outputs (three data clock). provides loss-ofsignal (LOS) output that indicates loss-of-clock signal. outputs include disable function. Upon LOS, chip powered down. direct chip-to-chip communication, output drivers switched one-half output specification conserve power reduce EMI. output drive current also increased allow back termination resistors improved signal integrity. Equalization automatic manual control specific in-cable applications. MAX3815A available 7mm, 48-pin TQFP-EP package operates over +70°C temperature range.
MAX3815A
Improved Jitter Performance Source Amplitude, Enhanced Output Driver Meters Over HDMI Cable, Meters Over HDMI Cable, Meters Over HDMI Cable, Meters Over HDMI Cable,
Extends 2.25Gbps TMDS Interface Length
Extends 1.65Gbps TMDS Interface Length
Compatible with HDTV Resolutions 720p, 1080i,
1080p, 1080p with 36-Bit Color
Compatible with Computer Resolutions VGA,
SVGA, XGA, SXGA, UXGA, WUXGA Required
Fully Automatic Equalization, System Control 3.3V Power Supply Power Dissipation 0.6W (typ) 7mm, 48-Pin TQFP Lead-Free Package
Applications
Front-Projector HDMI/DVI Inputs High-Definition Televisions Displays HDMI/DVI-D Cable-Extender Modules Active Cable Assemblies Computer Monitors HDMI Deep Color Systems
PART MAX3815ACCM+
Ordering Information
TEMP RANGE +70NC PIN-PACKAGE TQFP-EP*
+Denotes lead(Pb)-free/RoHS compliant package. Exposed pad.
Configuration appears data sheet.
Typical Operating Circuits
HDMI EXTENDER
VIDEO SOURCE
HDMI CABLE
MAX3815A EQUALIZER
STANDARD LENGTH DVI-D HDMI CABLE
HDTV
MAX3816A EXTENDER
Typical Operating Circuits continued data sheet. trademark Digital Display Working Group. HDMI trademark HDMI Licensing, LLC. TMDS registered trademark Silicon Image, Inc.
Maxim Integrated Products
pricing, delivery, ordering information, please contact Maxim Direct 1-888-629-4642, visit Maxim's website www.maxim-ic.com.
TMDS Digital Video Equalizer HDMI/DVI Cables MAX3815A
ABSOLUTE MAXIMUM RATINGS
Supply Voltage Range, .-0.5V +4.0V Voltage Range Output Pins .-0.5V +4.0V Voltage Range Input Pins, RES, VCC_T, GND_T -0.5V (VCC 0.7V) Voltage Between Input Complementary Pair ±3.3V Voltage Between Output Complementary Pair ±1.4V Continuous Power Dissipation +70°C) 48-Pin TQFP (derate 36.2mW/°C above +70°C) .2896mW Operating Junction Temperature Range -55°C +150°C Storage Temperature Range. -55°C +150°C Attach Temperature .+400°C
Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC +3.0V +3.5V, +70°C. Typical values +3.3V, external terminations ±1%, MAX3815A automatic equalization mode (EQCONTROL GND), TMDS rate 250Mbps 2.25Gbps, +25°C, unless otherwise noted.) PARAMETER Power-Supply Current Supply-Noise Tolerance EQUALIZER PERFORMANCE Residual Output Jitter (Cables Only) 0.25Gbps 1.65Gbps (Notes Residual Output Jitter (Cables Only) 1.65Gbps 2.25Gbps (Notes Tolerance CONTROL STATUS CLKLOS Assert Level INPUTS (CABLE SIDE) Differential Input-Voltage Swing Common-Mode Input Voltage Input Resistance OUTPUTS (ASIC SIDE) load, each side OUTLEVEL HIGH OUTLEVEL 1000 1200 mVP-P Single-ended cable input 1000 1200 mVP-P Differential peak-to-peak input with 225MHz clock (see Typical Operating Characteristics more information) mVP-P skin-effect loss 825MHz 24dB skin-effect loss 825MHz skin-effect loss 825MHz 24dB skin-effect loss 825MHz 0.05 0.13 0.14 0.28 0.21 Bits SYMBOL CONDITIONS Clock present (CLKLOS HIGH) Clock data absent (CLKLOS LOW) 500kHz UNITS mVP-P
Differential Output-Voltage Swing
With back termination shown Figure OUTLEVEL OPEN Single-ended, OUTLEVEL HIGH Single-ended, OUTLEVEL HIGH Single-ended
Output-Voltage High Output-Voltage Output Voltage During Clock Absence (CLKLOS LOW)
TMDS Digital Video Equalizer HDMI/DVI Cables
ELECTRICAL CHARACTERISTICS (continued)
(VCC +3.0V +3.5V, +70°C. Typical values +3.3V, external terminations ±1%, MAX3815A automatic equalization mode (EQCONTROL GND), TMDS rate 250Mbps 2.25Gbps, +25°C, unless otherwise noted.) PARAMETER Common-Mode Output Voltage Rise/Fall Time (Note LVTTL CONTROL STATUS INTERFACE LVTTL Input High Voltage LVTTL Input Voltage LVTTL Input High Current LVTTL Input Current Open-Collector Output High Voltage Open-Collector Output Voltage Open-Collector Output Sink Current OUTLEVEL Input Open-State Current Tolerance VIH(MIN) VIL(MAX) RLOAD 10kW RLOAD -100 SYMBOL CONDITIONS load, each side VCC, OUTLEVEL HIGH 0.25 UNITS
MAX3815A
Note specifications guaranteed design characterization. Note Cable input swing 800mV 1200mV differential peak-to-peak. Residual output jitter defined peak-to-peak jitter, both deterministic plus random, measured using oscilloscope histogram with 5000 hits. Source jitter subtracted. Note Test pattern PRBS ones PRBS (inverted) zeros.
(Typical values +3.3V, +25°C, data pattern PRBS ones PRBS (inverted) zeros, equalizer automatic mode, cable launch amplitude 1VP-P differential, unless otherwise noted.)
SUPPLY CURRENT AMBIENT TEMPERATURE
SUPPLY CURRENT (mA) AMBIENT TEMPERATURE (°C) GAIN (dB)
Typical Operating Characteristics
INPUT RETURN LOSS FREQUENCY
MAX3815A toc02
OUTLEVEL OPEN, EQCONTROL VCC, CLOCK SIGNAL ACTIVE
TMDS SOURCE DC-COUPLED MAX3815A INPUT (NOMINAL AMPLITUDE)
TMDS SOURCE AC-COUPLED MAX3815A
1000 1500 2000 2500 3000 FREQUENCY (MHz)
MAX3815A toc02
TMDS Digital Video Equalizer HDMI/DVI Cables MAX3815A
(Typical values +3.3V, +25°C, data pattern PRBS ones PRBS (inverted) zeros, equalizer automatic mode, cable launch amplitude 1VP-P differential, unless otherwise noted.)
EQUALIZER INPUT AFTER 100ft CABLE (TOP) EQUALIZER OUTPUT (BOTTOM)
MAX3815A toc03
Typical Operating Characteristics (continued)
EQUALIZER INPUT AFTER 100ft CABLE (TOP) EQUALIZER OUTPUT (BOTTOM)
MAX3815A toc04
DATA RATE 2.25Gbps 30dB CABLE SKIN-EFFECT LOSS 1.11GHz 20mV/div 350mV/div
DATA RATE 2.25Gbps 30dB CABLE SKIN-EFFECT LOSS 1.11GHz
500mV/div
5ns/div
100ps/div
EQUALIZER INPUT AFTER 150ft CABLE (TOP) EQUALIZER OUTPUT (BOTTOM)
MAX3815A toc05
TOTAL JITTER DATA RATE (50m HDMI CABLE)
TOTAL JITTER (psP-P)
MAX3815A toc06
DATA RATE 742.5Mbps 24dB CABLE SKIN-EFFECT LOSS 370MHz
DVIGear SHRHDMI CABLE AWG) PEAK-TO-PEAK JITTER PICOSECONDS
TOTAL JITTER (UIP-P)
350mV/div
PEAK-TO-PEAK JITTER UNIT INTERVALS
1250 DATA RATE (Mbps) 1750 2250
300ps/div
TOTAL JITTER POWER-SUPPLY NOISE FREQUENCY (DATA RATE 2.25Gbps)
TOTAL JITTER (psP-P) FREQUENCY (kHz) 1000 10,000
NOISE AMPLITUDE: 200mVP-P DATA THROUGH DVIGear HDMI CABLE,
trademark DVIGear, Inc.
MAX3815A toc07
TMDS Digital Video Equalizer HDMI/DVI Cables
(Typical values +3.3V, +25°C, data pattern PRBS ones PRBS (inverted) zeros, equalizer automatic mode, cable launch amplitude 1VP-P differential, unless otherwise noted.)
TOTAL JITTER CABLE LENGTH (CARLISLE INTERCONNECT TECHNOLOGIES TWIN-AX AWG)
MAX3815A toc08
Typical Operating Characteristics (continued)
MAX3815A
DETERMINISTIC JITTER (UIP-P)
2.25Gbps 1.485Mbps 742.5Mbps WITH MAX3815A
TOTAL JITTER (psP-P)
DVIGear HDMI CABLE WITH 35dB LOSS 1.11GHz
CABLE LENGTH
DIFFERENTIAL AMPLITUDE (VP-P)
EQCONTROL VOLTAGE (RELATIVE VCC) CABLE LENGTH (MANUAL CONTROL)
-0.1 EQCONTROL VOLTAGE -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 CABLE LENGTH
MAX3815A toc10
LOSS-OF-CLOCK ASSERT THRESHOLD CABLE LENGTH
RESIDUAL JITTER (psP-P) DIFFERENTIAL CLOCK AMPLITUDE (mVP-P) CABLE LENGTH
CABLE CARLISLE INTERCONNECT TECHNOLOGIES TWIN-AX WITH APPROXIMATELY 1.35dB LOSS METER 1.11GHz EQCONTROL VOLTAGE
CLOCK AMPLITUDE INPUT CABLE CABLE CARLISLE INTERCONNECT TECHNOLOGIES TWIN-AX, 225MHz CLOCK FREQUENCY
25MHz CLOCK FREQUENCY
RESIDUAL JITTER 2.25Gbps
EQUALIZER OUTPUT AFTER HDMI CABLE (DATA RATE 2.25Gbps)
MAX3815A toc12
DVIGear HDMI CABLE
200mV/div
100ps/div
MAX3815A toc11
MAX3815A toc09
TOTAL JITTER SIGNAL AMPLITUDE INPUT CABLE (DATA RATE 2.25Gbps)
TMDS Digital Video Equalizer HDMI/DVI Cables MAX3815A
Description
NAME RX0_INRX0_IN+ RX1_INRX1_IN+ RX2_INRX2_IN+ RXC_IN+ RXC_INEQCONTROL FUNCTION Supply Voltage. pins must connected VCC. Negative Data Input, Positive Data Input, Negative Data Input, Positive Data Input, Negative Data Input, Positive Data Input, Positive Clock Input, Negative Clock Input, Equalizer Control. This allows user control equalization level MAX3815A. Connect automatic operation. voltage minimum equalization, voltage between manual equalization. Applications Information section more information. Loss-of-Clock Signal Output, LVTTL Open Collector. This asserts upon loss input TMDS clock from cable. Connect through 4.7k resistor. Connected. This internally connected. Ground Negative Clock Output, Positive Clock Output, Positive Data Output, Negative Data Output, Positive Data Output, Negative Data Output, Positive Data Output, Negative Data Output, Output-Level Control Input HIGH: Standard swing (1000mVP-P differential) OPEN: Standard swing (900mVP-P differential) with external back termination resistor (see Figure LOW: One-half standard swing (500mVP-P differential) Output-Enable Control Input, LVTTL. This input enables outputs when forced sets differential logic zero when forced high. Reserved. Must connected normal operation. Reserved. Must connected normal operation. Reserved. Must left open normal operation. Exposed Pad. exposed must soldered circuit-board ground proper thermal electrical operation.
CLKLOS N.C. RXC_OUTRXC_OUT+ RX2_OUT+ RX2_OUTRX1_OUT+ RX1_OUTRX0_OUT+ RX0_OUT-
OUTLEVEL
45-48
OUTON VCC_T GND_T
TMDS Digital Video Equalizer HDMI/DVI Cables MAX3815A
RX0_IN+/TERMINATED 3.3V INPUT BUFFER ADAPTIVE LIMITING AMPLIFIER DRIVER RX0_OUT+/-
RX1_IN+/-
TERMINATED 3.3V
INPUT BUFFER
ADAPTIVE
LIMITING AMPLIFIER
DRIVER
RX1_OUT+/-
RX2_IN+/-
TERMINATED 3.3V
INPUT BUFFER
ADAPTIVE
LIMITING AMPLIFIER
DRIVER
RX2_OUT+/-
EQCONTROL TERMINATED 3.3V INPUT BUFFER LIMITING AMPLIFIER DRIVER RXC_OUT+/-
RXC_IN+/-
CLKLOS
CLOCK DETECTOR
OUTON MAX3815A OUTLEVEL
Figure Functional Diagram
Detailed Description
MAX3815A TMDS equalizer accepts differential input data rates 250Mbps 2.25Gbps (individual channel data rate). automatically adjusts skin-effect losses copper cable. consists four input buffers, loss-of-clock signal detector, three independent adaptive equalizers, four limiting amplifiers, four output buffers (Figure input buffers output drivers implemented using current-mode logic (CML) (see Figures output drivers open-collector turned with OUTON pin. OUTLEVEL sets output drive current three levels; Applications Information Description sections more information. details interfacing with CML, refer Application Note 291: HFAN-01.0: Introduction LVDS, PECL, CML.
loss-of-clock signal detector indicates loss-ofclock signal CLKLOS pin. This open-collector output that must connected through 4.7k external pullup. This resistor required whether output used. three data channels each contain independent adaptive equalizer. Each channel analyzes incoming signal determines amount equalization apply. limiting amplifier amplifies signal from adaptive equalizer truncates bottom waveform provide clean high- low-level signal output drivers.
Loss-of-Clock Signal Detector
Adaptive Equalizer
Input Buffers Output Drivers
Limiting Amplifier
TMDS Digital Video Equalizer HDMI/DVI Cables MAX3815A
Applications Information
Typical shielded twisted pair (STP), unshielded twisted pair (UTP), twin-ax cables exhibit skin-effect losses, which attenuate high-frequency spectrum TMDS signal, eventually causing data errors even closing signal altogether given long enough cable. MAX3815A recovers data opens signal through compensating equalization. basic TMDS interface composed four differential serial links: three links carry serial data 2.25Gbps each, fourth one-tenth-rate (0.1x) clock that operates 225MHz. TMDS, with analog nVGA links, must handle variety resolutions screen update rates. actual range digital serial rates roughly 250Mbps 2.25Gbps. applications requiring ultra-high resolutions (e.g., QXGA), "dual-link" interface used composed data links plus clock, requiring MAX3815A with clock going both ICs. Figure MAX3815A used extend TMDS interface used under following trademarked names: (digital visual interface), DFP(digital flat-panel), PanelLink, ADC(Apple display connector), HDMI (high-definition multimedia interface). loss-of-clock signal indicated CLKLOS output. level CLKLOS indicates that signal power RXC_IN pins dropped below threshold. When there sufficient input voltage channel (typically greater than 100mVP-P differential), CLKLOS high. CLKLOS output suitable indicating problems with transmission link caused example, broken cable, defective driver, lost connection equalizer. Note that loss-of-clock circuitry sensitive voltage between RXC_IN pins. voltage greater than Q30mV (typical) sensed active clock signal.
MAX3815A
MAX3815A
Figure Connection Scheme MAX3815A Dual Link Application
MAX3815A
CHIP POWERCONTROL CIRCUITRY
4.7k CLKLOS
Loss-of-Clock Signal (CLKLOS) Output
Figure Simplified CLKLOS Output Circuit Schematic
+3.3V
MAX3815A
RX_OUT+
HDM/DVI RECEIVER
RX_OUT-
12.5mA
Figure Back Termination Circuit trademark Video Electronics Standards Association (VESA). trademark Apple Computer, Inc.
TMDS Digital Video Equalizer HDMI/DVI Cables
loss-of-clock circuitry powers down part whenever there absence clock signal. This mutes output reduces power consumption 83mW whenever input signal removed. During powerdown, MAX3815A's TMDS output pins highimpedance state. CLKLOS open-collector output that requires resistive pullup operation. pullup resistor range (see Figure OUTLEVEL three-state input that allows user select between three output settings. Forcing this high results standard output signal level with back terminations; leaving open results standard output swing with differential back termination resistors. Forcing this results one-half standard output signal level. Using back termination resistance improves signal integrity through absorption reflections. also shifts single-ended output voltage high (VH) (VL). Table shows output voltages when using MAX3815A each three output configurations. EQCONTROL allows user control equalization ways: forcing ground sets equalizer automatic equalization mode, forcing voltage between allows manual control equalization level. maximum boost (long cable). minimum boost (short cable).
Interface Models
MAX3815A
MAX3815A
RX_IN+/-
Output Level Control (OUTLEVEL) Input
Figure Simplified Input Circuit Schematic
Using Back Termination
MAX3815A
TRANSIENT SUPRESSOR CLAMP
RX_OUT+
Equalizer Control (EQCONTROL) Input
RX_OUT-
PWRDWN
10mA OUTLEVEL HIGH 12.5mA OUTLEVEL OPEN OUTLEVEL
Figure Simplified Output Circuit Schematic
Table Output Settings Swings
OUTLEVEL High Open BACK TERMINATION Open 267I Open DIFFERENTIAL SWING (mVP-P) 1000 SINGLE-ENDED HIGH (VH) 85mV SINGLE-ENDED (VL) 500mV 540mV 250mV
TMDS Digital Video Equalizer HDMI/DVI Cables MAX3815A
data clock inputs should wired directly between cable connector without stubs.
TYPICAL MAX3815A CABLE REACH (DATA RATE 2.25Gbps)
CABLE LENGTH WIRE GAUGE (AWG)
Place supply filter capacitors close MAX3815A inputs provide inductance path supply return currents. Input output data channel designations only guide. Polarity assignments swapped channel paths interchanged. uninterrupted ground plane should positioned beneath high-speed I/Os. Ground-path vias should placed close input/ output connectors allow inductance return current path. Maintain differential transmission line impedance into MAX3815A. good high-frequency layout techniques multilayer boards with uninterrupted ground plane minimize crosstalk. Refer Application Note 3854: MAX3815: Interfacing MAX3815 DVI/HDMI Cable Equalizer data sheet, MAX3815AEVKIT-HDMI. exposed 48-pin TQFP-EP provides very thermal resistance path heat removal from also electrical ground MAX3815A must soldered circuit board ground proper thermal electrical performance. Refer Maxim Application Note 862: HFAN-08.1: Thermal Considerations Other Exposed-Paddle Packages additional information.
TYPICAL LIMIT CABLE WITH 2.25Gbps
TYPICAL LIMIT CABLE WITHOUT 2.25Gbps
Figure Cable Reach
OUTON LVTTL input. Force enable outputs. Force high differential zero outputs, irrespective signal inputs.
Output (OUTON) Input
Exposed-Pad Package
TMDS performance heavily dependent cable quality. Deterministic jitter (DJ) caused differential-tocommon-mode conversion vice versa) within twisted pair (STP UTP), usually result cable twist dielectric imbalance. Refer Application Note 3353: HFAN-04.5.4: `Jitter Happens' when Twisted Pair Unbalanced Application Note 4218: Unbalanced Twisted Pairs Give Jitters! more information. data clock inputs most critical paths MAX3815A great care should taken minimize discontinuities these transmission lines between connector Here some suggestions maximizing performance MAX3815A:
Cable Selection
Chip Information
PROCESS: SiGe BiPOLAR
Layout Considerations
Package Information
latest package outline information land patterns, www.maxim-ic.com/packages. PACKAGE TYPE TQFP-EP PACKAGE CODE C48E+8 DOCUMENT 21-0065
TMDS Digital Video Equalizer HDMI/DVI Cables
Typical Operating Circuits (continued)
MAX3815A
VIDEO PROJECTOR
DVI-D INPUT
MAX3815A EQUALIZER
TMDS DESERIALIZER
DVI-D CABLE 120ft STP)
SELECT
LAPTOP
INPUT
RGB/HV ADC/SYNC
IMAGE SCALER PROCESSOR
PANEL INTERFACE TIMING DRIVERS
LCD, DLP, LCOS
Configuration
GND_T VCC_T VCC_T VCC_T OUTON VIEW OUTLEVEL
RX0_IN- RX0_IN+ RX1_IN- RX1_IN+ RX2_IN- RX2_IN+ RXC_IN+ RXC_INVCC EQCONTROL CLKLOS RXC_OUTRXC_OUT+ N.C. MAX3815A
RX0_OUT34 RX0_OUT+ RX1_OUT30 RX1_OUT+ RX2_OUT26 RX2_OUT+
*EXPOSED PAD.
TQFP
Maxim cannot assume responsibility circuitry other than circuitry entirely embodied Maxim product. circuit patent licenses implied. Maxim reserves right change circuitry specifications without notice time.
Maxim Integrated Products, Gabriel Drive, Sunnyvale, 94086 408-737-7600
2009 Maxim Integrated Products
Maxim registered trademark Maxim Integrated Products, Inc.

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