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2.5V 6.0V Micropower CMOS Input Offset Voltage: (maximum) Rail-to
Top Searches for this datasheetMCP606/7/8/9 2.5V 6.0V Micropower CMOS Input Offset Voltage: (maximum) Rail-to-Rail Output Input Bias Current: (maximum +85°C) Quiescent Current: (maximum) Power Supply Voltage: 2.5V 6.0V Unity-Gain Stable Chip Select (CS) Capability: MCP608 Industrial Temperature Range: -40°C +85°C Phase Reversal Available Single, Dual Quad Packages Description MCP606/7/8/9 family operational amplifiers amps) from Microchip Technology Inc. unity-gain stable with offset voltage (250 maximum). Performance characteristics include rail-to-rail output swing capability input bias current +85°C, maximum). These features make this family amps well suited single-supply, precision, high-impedance, battery-powered applications. single available standard 8-lead PDIP, SOIC TSSOP packages, well SOT-23-5 package. single MCP608 with Chip Select (CS) offered standard 8-lead PDIP, SOIC TSSOP packages. dual MCP607 offered standard 8-lead PDIP, SOIC TSSOP packages. Finally, quad MCP609 offered standard 14-lead PDIP, SOIC TSSOP packages. devices fully specified from -40°C +85°C, with power supplies from 2.5V 6.0V. Typical Applications Battery Power Instruments High-Impedance Applications Strain Gauges Medical Instruments Test Equipment Package Types MCP606 PDIP, SOIC,TSSOP VIN- VIN+ VOUT MCP606 SOT-23-5 VOUT VIN+ VIN- Design Aids SPICE Macro Models FilterLab® Software MindiCircuit Designer Simulator Analog Demonstration Evaluation Boards Application Notes MCP607 PDIP, SOIC,TSSOP VOUTA VINA- VINA+ MCP608 PDIP, SOIC,TSSOP VOUT Typical Application Load (VLP) VOUT VOUTB VIN- VINB- VIN+ VINB+ 2.5V 6.0V RSEN MCP609 PDIP, SOIC,TSSOP VOUTA VINA- VINA+ VINB+ VINB- VOUTB VOUTD VIND- VIND+ VINC+ VINC- VOUTC MCP606 Load (VLM) Low-Side Battery Current Sensor 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 NOTES: DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability. Section 4.1.2 "Input Voltage Current Limits". Absolute Maximum Ratings .7.0V Current Input Pins Analog Inputs (VIN+, VIN-) 1.0V 1.0V Other Inputs Outputs 0.3V 0.3V Difference Input Voltage |VDD VSS| Output Short Circuit Current Continuous Current Output Supply Pins .±30 Storage Temperature -65° +150° Maximum Junction Temperature (TJ). .+150° Protection Pins (HBM; 200V CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, +2.5V +5.5V, GND, +25°C, VDD/2, VOUT VDD/2, VDD/2, tied (refer Figure Figure 1-3). Parameters Input Offset Input Offset Voltage Input Offset Drift with Temperature Power Supply Rejection Ratio Input Bias Current Impedance Input Bias Current Temperature Input Offset Bias Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Range Common Mode Rejection Ratio Open-Loop Gain Open-Loop Gain (Large-signal) Open-Loop Gain (Large-signal) Output Maximum Output Voltage Swing VOL, VOL, Linear Output Voltage Range VOUT VOUT Output Short Circuit Current Power Supply Supply Voltage Quiescent Current Amplifier Note 18.7 0.5V input overdrive 0.5V input overdrive 2.5V 5.5V VOUT VOUT 0.1V 0.1V VCMR CMRR CMRR -0.3V 3.9V ZDIFF 1013||6 1013||6 ||pF ||pF +85°C VOS/TA PSRR -250 ±1.8 +250 µV/°C -40°C +85°C Units Conditions parts with date codes November 2007 later have been screened ensure operation 6.0V. However, other minimum maximum specifications measured 2.5V 5.5V. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, +2.5V +5.5V, GND, +25°C, VDD/2, VOUT VDD/2, VDD/2, tied (refer Figure Figure 1-3). Parameters Response Gain Bandwidth Product Phase Margin Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density µVP-P nV/Hz fA/Hz GBWP 0.08 V/µs Units Conditions MCP608 CHIP SELECT CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, +2.5V +5.5V, GND, +25°C, VDD/2, VOUT VDD/2, VDD/2, tied (refer Figure Figure 1-3). Parameters Specifications Logic Threshold, Input Current, High Specifications Logic Threshold, High Input Current, High Input High, Current Amplifier Output Leakage, High Dynamic Specifications Amplifier Output Turn-on Time High Amplifier Output Hi-Z Hysteresis tOFF VHYST 0.2VDD VOUT VDD/2, V/V, 0.8VDD VOUT VDD/2, V/V, 5.0V ICSH IO(LEAK) 0.01 -0.05 ICSL -0.1 0.01 0.2VDD Units Conditions VOUT Hi-Z (typical) (typical) tOFF Hi-Z -18.7 (typical) (typical) (typical) FIGURE 1-1: Timing Diagram MCP608. DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 TEMPERATURE CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, +2.5V +5.5V GND. Parameters Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SOT23 Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-TSSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note 220.7 89.3 149.5 95.3 °C/W °C/W °C/W °C/W °C/W °C/W °C/W +125 +150 Note Units Conditions MCP606/7/8/9 operate over this extended temperature range, with reduced performance. case, Junction Temperature (TJ) must exceed Absolute Maximum specification +150°C. Test Circuits test circuits used tests shown Figure Figure 1-3. bypass capacitors laid according rules discussed Section "Supply Bypass". VOUT VDD/2 MCP60X FIGURE 1-2: Test Circuit Most Non-Inverting Gain Conditions. VOUT VDD/2 MCP60X FIGURE 1-3: Test Circuit Most Inverting Gain Conditions. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 NOTES: DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 Note: TYPICAL PERFORMANCE CURVES graphs tables provided following this note statistical summary based limited number samples provided informational purposes only. performance characteristics listed herein tested guaranteed. some graphs tables, data presented outside specified operating range (e.g., outside specified power supply range) therefore outside warranted range. Note: Unless otherwise indicated, +2.5V +5.5V, GND, +25°C, VDD/2, VOUT VDD/2, VDD/2, tied low. Percentage Occurances -250 -200 -150 -100 1200 Samples 5.5V Percentage Occurances Input Offset Voltage Drift (µV/°C) Samples 5.5V Input Offset Voltage (µV) FIGURE 2-1: 5.5V. Percentage Occurances Input Offset Voltage FIGURE 2-4: Input Offset Voltage Drift Magnitude 5.5V. Percentage Occurances Samples 2.5V 1200 Samples 2.5V -250 -200 -150 -100 Input Offset Voltage (µV) Input Offset Voltage Drift (µV/°C) FIGURE 2-2: 2.5V. Input Offset Voltage FIGURE 2-5: Input Offset Voltage Drift Magnitude 2.5V. Quiescent Current Amplifier (µA) 2.5V 5.5V Quiescent Current Amplifier (µA) +85°C +25°C -40°C Power Supply Voltage Ambient Temperature (°C) FIGURE 2-3: Quiescent Current Power Supply Voltage. FIGURE 2-6: Quiescent Current Ambient Temperature. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 Note: Unless otherwise indicated, +2.5V +5.5V, GND, +25°C, VDD/2, VOUT VDD/2, VDD/2, tied low. Input Offset Voltage (µV) Representative Part =2.5V 5.5V Input Offset Voltage (µV) -0.5 +85°C +25°C -40°C 5.5V Ambient Temperature (°C) Common Mode Input Voltage FIGURE 2-7: Input Offset Voltage Ambient Temperature. Open-Loop Gain (dB) 0.01 100k Frequency (Hz) FIGURE 2-10: Input Offset Voltage Common Mode Input Voltage. Gain Bandwidth Product (kHz) Open-Loop Phase Ambient Temperature (°C) 5.0V GBWP Phase Margin Gain Phase -135 -180 -225 FIGURE 2-8: Frequency. Channel Channel Separation (dB) Open-Loop Gain Phase FIGURE 2-11: Gain Bandwidth Product, Phase Margin Ambient Temperature. 1000 Input Noise Voltage Density (nV/Hz) Referred Input 1.E+02 1.E+03 1.E+04 Frequency (Hz) 100k 1.E+05 100k 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 Frequency (Hz) FIGURE 2-9: Channel-to-Channel Separation (MCP607 MCP609 only). FIGURE 2-12: Frequency. Input Noise Voltage Density DS11177F-page 2009 Microchip Technology Inc. Phase Margin MCP606/7/8/9 Note: Unless otherwise indicated, +2.5V +5.5V, GND, +25°C, VDD/2, VOUT VDD/2, VDD/2, tied low. Input Bias Offset Currents (pA) Input Bias Offset Currents (pA) Common Mode Input Voltage 5.5V 85°C 5.5V Ambient Temperature (°C) FIGURE 2-13: Input Bias Current, Input Offset Current Ambient Temperature. Open-Loop Gain (dB) 1.E+02 2.5V 5.5V FIGURE 2-16: Input Bias Current, Input Offset Current Common Mode Input Voltage. Open-Loop Gain (dB) 1.E+03 1.E+04 Load Resistance 100k 1.E+05 Power Supply Voltage FIGURE 2-14: Load Resistance. CMRR PSRR (dB) 1.E-01 1.E+00 Open-Loop Gain FIGURE 2-17: Open-Loop Gain Power Supply Voltage. CMRR PSRR (dB) PSRR CMRR PSRRPSRR+ CMRR 1.E+01 1.E+02 Frequency (Hz) 1.E+03 1.E+04 Ambient Temperature (°C) FIGURE 2-15: Frequency. CMRR, PSRR FIGURE 2-18: Temperature. CMRR, PSRR Ambient 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 Note: Unless otherwise indicated, +2.5V +5.5V, GND, +25°C, VDD/2, VOUT VDD/2, VDD/2, tied low. 1000 Output Voltage Headroom (mV) Output Voltage Headroom (mV) 2.5V 2.5V 5.5V 5.5V Output Current (mA) Ambient Temperature (°C) FIGURE 2-19: Output Voltage Headroom Output Current Magnitude. FIGURE 2-22: Output Voltage Headroom Ambient Temperature Input Output Voltages Maximum Output Voltage Swing 5.5V 2.5V 5.0V VOUT 1.E+02 1.E+03 1.E+04 Frequency (Hz) 100k 1.E+05 Time (100 µs/div) FIGURE 2-20: Maximum Output Voltage Swing Frequency. 0.12 0.10 Slew Rate (V/µs) 0.08 0.06 0.04 0.02 0.00 Ambient Temperature (°C) High High FIGURE 2-23: MCP606/7/8/9 Show Phase Reversal. Ambient Temperature (°C) +ISC 2.5V -ISC 2.5V Output Short Circuit Current Magnitude (mA) +ISC 5.5V -ISC 5.5V FIGURE 2-21: Temperature. Slew Rate Ambient FIGURE 2-24: Output Short Circuit Current Magnitude Ambient Temperature. DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 Note: Unless otherwise indicated, +2.5V +5.5V, GND, +25°C, VDD/2, VOUT VDD/2, VDD/2, tied low. Time µs/div) Output Voltage Time µs/div) 5.0V 5.0V Output Voltge FIGURE 2-25: Pulse Response. 5.0V Large-signal, Non-inverting FIGURE 2-28: Pulse Response. Large-signal, Inverting Output Voltage mV/div) Time µs/div) Output Voltage mV/div) Time µs/div) FIGURE 2-26: Pulse Response. -0.5 Hysteresis Small-signal, Non-inverting FIGURE 2-29: Response. Output Voltage Output Hi-Z Small-signal, Inverting Pulse Internal Switch Output Amplifier Output Active 5.0V Output Enabled Output Hi-Z Input High Input High VOUT Amplifier Output Hi-Z Input Voltage Time µs/div) FIGURE 2-27: (MCP608 only). Chip Select (CS) Hysteresis FIGURE 2-30: Amplifier Output Response Times Chip Select (CS) Pulse (MCP608 only). 2009 Microchip Technology Inc. DS11177F-page Chip Select Voltage MCP606/7/8/9 Note: Unless otherwise indicated, +2.5V +5.5V, GND, +25°C, VDD/2, VOUT VDD/2, VDD/2, tied low. 1.E-02 1.E-03 1.E-04 100µ 1.E-05 1.E-06 100n 1.E-07 1.E-08 1.E-09 100p 1.E-10 1.E-11 1.E-12 Input Current Magnitude +125°C +85°C +25°C -40°C -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 Input Voltage FIGURE 2-31: Measured Input Current Input Voltage (below VSS). DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 DESCRIPTIONS Descriptions pins listed Table 3-1. TABLE 3-1: FUNCTION TABLE MCP607 SOT-23-5 VOUT, VOUTA VIN-, VINA- VIN+, VINA+ VINB+ VINB- VOUTB VOUTC VINC- VINC+ VIND+ VIND- VOUTD Output Inverting Input Non-inverting Input Positive Power Supply Non-inverting Input Inverting Input Output Output Inverting Input Non-inverting Input Negative Power Supply Non-inverting Input Inverting Input Output Chip Select Internal Connection MCP608 MCP609 Symbol Description MCP606 PDIP, SOIC, TSSOP Analog Outputs Power Supply Pins output pins low-impedance voltage sources. Analog Inputs non-inverting inverting inputs highimpedance CMOS inputs with bias currents. positive power supply (VDD) 2.5V 5.5V higher than negative power supply (VSS). normal operation, output pins voltages between VDD; while input pins voltages between 0.3V 0.3V. Typically, these parts used single-supply (positive) configuration. this case, connected ground connected supply. will need bypass capacitors Chip Select Digital Input Chip Select (CS) Schmitt-triggered, CMOS logic input. used place MCP608 Low-power mode, with output(s) Hi-Z state. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 NOTES: DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 APPLICATIONS INFORMATION (minimum expected (minimum expected MCP60X MCP606/7/8/9 family amps manufactured using Microchip's state-of-the-art CMOS process These amps unity-gain stable suitable wide range general purpose applications. 4.1.1 Rail-to-Rail Inputs PHASE REVERSAL MCP606/7/8/9 designed prevent phase reversal when input pins exceed supply voltages. Figure 2-23 shows input voltage exceeding supply voltage without phase reversal. 4.1.2 INPUT VOLTAGE CURRENT LIMITS protection inputs depicted shown Figure 4-1. This structure chosen protect input transistors, minimize input bias current (IB). input diodes clamp inputs when they more than diode drop below VSS. They also clamp voltages that above VDD; their breakdown voltage high enough allow normal operation, enough bypass quick events within specified limits. FIGURE 4-2: Inputs. Protecting Analog also possible connect diodes left resistors this case, current through diodes needs limited some other mechanism. resistors then serve in-rush current limiters; current into input pins (VIN+ VIN-) should very small. significant amount current flow inputs when common mode voltage (VCM) below ground (VSS); Figure 2-31. Applications that high impedance need limit useable voltage range. Bond 4.1.3 VIN+ Bond Input Stage Bond VIN- NORMAL OPERATION Bond input stage MCP606/7/8/9 amps PMOS input stage. operates common mode input voltage (VCM), including ground. WIth this topology, device operates with -1.1V 0.3V below VSS. Figure shows unity gain buffer. Since VOUT same voltage inverting input, VOUT must kept below VDD-1.2V correct operation. FIGURE 4-1: Structures. Simplified Analog Input order prevent damage and/or improper operation these amps, circuit they must limit currents voltages VIN+ VIN- pins (see Absolute Maximum Ratings beginning Section "Electrical Characteristics"). Figure shows recommended approach protecting these inputs. internal diodes prevent input pins (VIN+ VIN-) from going below ground, resistors limit possible current drawn input pins. Diodes prevent input pins (VIN+ VIN-) from going above VDD, dump currents onto VDD. When implemented shown, resistors also limit current through MCP60X VOUT FIGURE 4-3: Unity Gain Buffer Limited VOUT Range. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 Rail-to-Rail Output 10000 There specifications that describe output-swing capability MCP606/7/8/9 family amps. first specification (Maximum Output Voltage Swing) defines absolute maximum swing that achieved under specified load conditions. instance, output voltage swings within negative rail with load VDD/2. Figure 2-23 shows output voltage limited when input goes beyond linear region operation. second specification that describes outputswing capability these amplifiers (Linear Output Voltage Range) defines maximum output swing that achieved while amplifier still operates linear region. verify linear operation this range, large-signal Open-Loop Gain (AOL) measured points inside supply rails. measurement must meet specified conditions specification table. Recommended 1000 100p Normalized Load Capacitance; CL/GN 1000 10000 FIGURE 4-5: Recommended RISO Values Capacitive Loads. After selecting RISO your circuit, double-check resulting frequency response peaking step response overshoot. Modify RISO's value until response reasonable. Bench evaluation simulations with MCP606/7/8/9 SPICE macro model helpful. Capacitive Loads Driving large capacitive loads cause stability problems voltage-feedback amps. load capacitance increases, feedback loop's phase margin decreases closed-loop bandwidth reduced. This produces gain-peaking frequency response, with overshoot ringing step response. unity-gain buffer most sensitive capacitive loads, though gains show same general behavior. When driving large capacitive loads with these amps (e.g., when +1), small series resistor output (RISO Figure 4-4) improves feedback loop's phase margin (stability) making output load resistive higher frequencies. bandwidth will generally lower than bandwidth with capacitive load. MCP608 Chip Select MCP608 single with Chip Select (CS). When pulled high, supply current drops (typical) flows through VSS. When this happens, amplifier output into high-impedance state. pulling low, amplifier enabled. internal (typical) pull-down resistor connected VSS, will pins left floating. Figure shows output voltage supply current response pulse. Supply Bypass RISO MCP60X VOUT With this family operational amplifiers, power supply (VDD single-supply) should have local bypass capacitor (i.e., 0.01 within good high-frequency performance. also needs bulk capacitor (i.e., larger) within provide large, slow currents. This bulk capacitor shared with other nearby analog parts. FIGURE 4-4: Output Resistor, RISO stabilizes large capacitive loads. Figure gives recommended RISO values different capacitive loads gains. x-axis normalized load capacitance (CL/GN), where circuit's noise gain. non-inverting gains, Signal Gain equal. inverting gains, 1+|Signal Gain| (e.g., gives V/V). DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 Unused Amps unused quad package (MCP609) should configured shown Figure 4-6. These circuits prevent output from toggling causing crosstalk. Circuits sets minimum noise gain. resistor divider produces desired reference voltage within output voltage range amp; buffers that reference voltage. Circuit uses minimum number components operates comparator, draw more current. MCP609 VREF MCP609 Non-inverting Gain Unity-gain Buffer: Connect non-inverting (VIN+) input with wire that does touch surface. Connect guard ring inverting input (VIN-). This biases guard ring common mode input voltage. Inverting Gain Transimpedance Gain (convert current voltage, such photo detectors) amplifiers: Connect guard ring non-inverting input (VIN+). This biases guard ring same reference voltage (e.g., VDD/2 ground). Connect inverting (VIN-) input with wire that does touch surface. 4.8.1 Application Circuits LOW-SIDE BATTERY CURRENT SENSOR FIGURE 4-6: Unused Amps. Surface Leakage applications where input bias current critical, Printed Circuit Board (PCB) surface-leakage effects need considered. Surface leakage caused humidity, dust other contamination board. Under humidity conditions, typical resistance between nearby traces 1012. difference would cause current flow, which greater than MCP606/7/8/9 family's bias current +25°C typical). easiest reduce surface leakage guard ring around sensitive pins traces). guard ring biased same voltage sensitive pin. example this type layout shown Figure 4-7. MCP606/7/8/9 amps used sense load current low-side battery using circuit Figure 4-8. this circuit, current from power supply (minus current required power MCP606) flows through sense resistor (RSEN), which converts voltage. This gained amplifier resistors, Since non-inverting input amplifier load's negative supply (VLM), gain from RSEN VOUT RF/RG 2.5V 6.0V RSEN MCP606 Load (VLM) Load (VLP) VOUT VIN- VIN+ FIGURE 4-8: Sensor. Side Battery Current Guard Ring FIGURE 4-7: Inverting Gain. Example Guard Ring Layout Since input bias current input offset voltage MCP606 low, input capable swinging below ground, there very little error generated amplifier. quiescent current very low, which helps conserve battery power. rail-to-rail output makes possible read very currents. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 4.8.2 PHOTODIODE AMPLIFIERS Sensors that produce output current have high output impedance connected transimpedance amplifier. transimpedance amplifier converts current into voltage. Photodiodes sensor that produce output current. characteristics that needed these circuits are: input offset voltage, input bias current, high input impedance input common mode range that includes ground. input offset voltage input bias current support very voltage drop across photodiode; this gives best photodiode linearity. Since photodiode biased ground, amp's input needs function well both above below ground. operate much higher speed. This reverse bias also increases dark current current noise, however. Resistor converts current into voltage. Capacitor limits bandwidth helps stabilize circuit when D1's junction capacitance large. Light VOUT MCP606 4.8.2.1 Photo-Voltaic Mode Figure shows transimpedance amplifier with photodiode (D1) biased Photo-voltaic mode across D1), which used precision photodiode sensing. light impinges charge generated, causing current flow reverse bias direction amp's negative feedback forces voltage across nearly Resistor converts current into voltage. Capacitor limits bandwidth helps stabilize circuit when D1's junction capacitance large. Light VOUT MCP606 VREF FIGURE 4-10: Photodiode Photoconductive mode) Transimpedance Amplifier. 4.8.3 INSTRUMENTATION AMPLIFIER instrumentation amplifier shown Figure 4-11 serves function taking difference input voltages, level-shifting gaining output. This configuration best suited higher gains (i.e., gain V/V). reference voltage (VREF) typically mid-supply (VDD/2) single-supply environment. VOUT VOUT MCP607 FIGURE 4-9: Photodiode Photo-voltaic mode) Transimpedance Amplifier. 4.8.2.2 Photo-Conductive Mode MCP607 Figure shows transimpedance amplifier with photodiode (D1) biased Photo-conductive mode reverse biased), which used high-speed applications. light impinges charge generated, causing current flow reverse bias direction Placing negative bias significantly reduces junction capacitance, which allows circuit FIGURE 4-11: Instrumentation Amplifier. specifications that make MCP606/7/8/9 family appropriate this application circuit input bias current, offset voltage high common-mode rejection. DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 4.8.4 THREE INSTRUMENTATION AMPLIFIER 4.8.5 PRECISION GAIN WITH GOOD LOAD ISOLATION classic, three instrumentation amplifier illustrated Figure 4-12. input amps provide differential signal gain common mode gain output difference amplifier, which converts input signal from differential single ended output; rejects common mode signals input. gain this circuit simply adjusted with resistor (RG). reference voltage (VREF) typically referenced mid-supply (VDD/2) single-supply applications. VOUT Figure 4-13, MCP606 amps, provide high gain input signal (VIN). MCP606's offset voltage makes this accurate circuit. MCP601 configured unity-gain buffer. isolates MCP606's output from load, increasing high-gain stage's precision. Since MCP601 higher output current, with amplifiers being housed separate packages, there minimal change MCP606's offset voltage loading effect. VOUT MCP607 MCP606 VREF VOUT MCP606 MCP601 VOUT FIGURE 4-13: Load Isolation. Precision Gain with Good MCP607 FIGURE 4-12: Three Instrumentation Amplifier. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 NOTES: DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 DESIGN AIDS Microchip provides basic design tools needed MCP606/7/8/9 family amps. Analog Demonstration Evaluation Boards SPICE Macro Model latest SPICE macro model MCP606/7/8/9 amps available Microchip site www.microchip.com. This model intended initial design tool that works well amp's linear region operation over temperature range. model file information capabilities. Bench testing very important part design cannot replaced with simulations. Also, simulation results using this macro model need validated comparing them data sheet specifications characteristic curves. Microchip offers broad spectrum Analog Demonstration Evaluation Boards that designed help achieve faster time market. complete listing these boards their corresponding user's guides technical information, visit Microchip site www.microchip.com/ analogtools. boards that especially useful are: 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board, SOIC8EV 14-Pin SOIC/TSSOP/DIP Evaluation Board, SOIC14EV Application Notes FilterLab® Software Microchip's FilterLab® software innovative software tool that simplifies analog active filter (using amps) design. Available cost from Microchip site www.microchip.com/filterlab, FilterLab design tool provides full schematic diagrams filter circuit with component values. also outputs filter circuit SPICE format, which used with macro model simulate actual filter performance. following Microchip Application Notes available Microchip site www.microchip. com/ appnotes recommended supplemental reference resources. ADN003: "Select Right Operational Amplifier your Filtering Circuits", DS21821 AN722: "Operational Amplifier Topologies Specifications", DS00722 AN723: "Operational Amplifier Specifications Applications", DS00723 AN884: "Driving Capacitive Loads With Amps", DS00884 AN990: "Analog Sensor Conditioning Circuits Overview", DS00990 These application notes others listed design guide: "Signal Chain Design Guide", DS21825 MindiCircuit Designer Simulator Microchip's MindiCircuit Designer Simulator aids design various circuits useful active filter, amplifier power-management applications. free online circuit designer simulator available from Microchip site www.microchip.com/mindi. This interactive circuit designer simulator enables designers quickly generate circuit diagrams, simulate circuits. Circuits developed using Mindi Circuit Designer Simulator downloaded personal computer workstation. Microchip Advanced Part Selector (MAPS) MAPS software tool that helps semiconductor professionals efficiently identify Microchip devices that particular design requirement. Available cost from Microchip website www.microchip.com/ maps, MAPS overall selection tool Microchip's product portfolio that includes Analog, Memory, MCUs DSCs. Using this tool define filter sort features parametric search devices export side-by-side technical comparasion reports. Helpful links also provided Datasheets, Purchase, Sampling Microchip parts. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 NOTES: DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 PACKAGING INFORMATION Package Marking Information 5-Lead SOT-23 (MCP606) Example: XXNN SB25 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCP606 I/P256 0722 MCP606 e3256 0936 8-Lead SOIC (150 mil) Example: MCP606 I/SN0722 MCP606I 0936 XXXXXXXX XXXXYYWW 8-Lead TSSOP XXXX YYWW Example: I936 Legend: XX.X Note: Customer-specific information Year code (last digit calendar year) Year code (last digits calendar year) Week code (week January week `01') Alphanumeric traceability code Pb-free JEDEC designator Matte (Sn) This package Pb-free. Pb-free JEDEC designator found outer packaging this package. event full Microchip part number cannot marked line, will carried over next line, thus limiting number available characters customer-specific information. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP609) Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN MCP609-I/P 0722256 MCP609 0936256 14-Lead SOIC (150 mil) (MCP609) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP609ISL 0722256 MCP609 I/SL^^ 0936256 14-Lead TSSOP (MCP609) Example: 609IST 0936 XXXXXXXX YYWW DS11177F-page 2009 Microchip Technology Inc. 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MCP606/7/8/9 Note: most current package drawings, please Microchip Packaging Specification located 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 NOTES: DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 APPENDIX REVISION HISTORY Revision (September 2009) following list modifications: Corrected text Figure 2-22 Section "Typical Performance Curves". Corrected devices' pins Table (Section "Pin Descriptions"). Updated Section "Packaging Information". Updated package outline drawings. Revision (March 2008) following list modifications: Increased maximum operating VDD. Added test circuits. Updated performance curves. Added Figure 2-31. Added Section 4.1.1 "Phase Reversal", Section 4.1.2 "Input Voltage Current Limits", Section 4.1.3 "Normal Operation". Updated Section "Design Aids" Updated Section "Packaging Information". Updated package outline drawings. Revision (February 2005) following list modifications: Added Section "Pin Descriptions". Updated Section "Applications Information". Added Section "Capacitive Loads" Updated Section "Design Aids" include FilterLab® point latest SPICE macro model. Corrected updated Section "Packaging Information". Added Appendix "Revision History". Revision (January 2001) Undocumented changes Revision (May 2000) Undocumented changes Revision (January 2000) Original Release this Document. 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 NOTES: DS11177F-page 2009 Microchip Technology Inc. MCP606/7/8/9 PRODUCT IDENTIFICATION SYSTEM order obtain information, e.g., pricing delivery, refer factory listed sales office. PART Device Temperature Range Package Examples: Industrial Temperature, PDIP package. MCP606-I/SN: Industrial Temperature, SOIC package. MCP606T-I/SN: Tape Reel, Industrial Temperature, SOIC package. MCP606-I/ST: Industrial Temperature, TSSOP package. MCP606T-I/OT: Tape Reel, Industrial Temperature, SOT-23 package. Industrial Temperature, PDIP package. MCP607T-I/SN: Tape Reel, Industrial Temperature, SOIC package. Industrial Temperature, SOIC package. MCP608T-I/SN: Tape Reel, Industrial Temperature, SOIC package. MCP609-I/P: Industrial Temperature, 14LD PDIP package. MCP609T-I/SL: Tape Reel, Industrial Temperature, 14LD SOIC package. MCP608-I/SN: MCP607-I/P: MCP606-I/P: Device MCP606 Single MCP606T Single Tape Reel (SOIC, TSSOP) MCP607 Dual MCP607T Dual Tape Reel (SOIC, TSSOP) MCP608 Single with MCP608T Single with Tape Reel (SOIC, TSSOP) MCP609 Quad MCP609T Quad Tape Reel (SOIC, TSSOP) Temperature Range -40°C +85°C Package Plastic SOT-23, 5-lead Plastic (300 Body), 8-lead, 14-lead Plastic SOIC (3.90 body), 8-lead Plastic SOIC (3.90 body), 14-lead Plastic TSSOP, 8-lead, 14-lead 2009 Microchip Technology Inc. DS11177F-page MCP606/7/8/9 NOTES: DS11177F-page 2009 Microchip Technology Inc. Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable." Code protection constantly evolving. Microchip committed continuously improving code protection features products. Attempts break Microchip's code protection feature violation Digital Millennium Copyright Act. such acts allow unauthorized access your software other copyrighted work, have right relief under that Act. Information contained this publication regarding device applications like provided only your convenience superseded updates. your responsibility ensure that your application meets with your specifications. MICROCHIP MAKES REPRESENTATIONS WARRANTIES KIND WHETHER EXPRESS IMPLIED, WRITTEN ORAL, STATUTORY OTHERWISE, RELATED INFORMATION, INCLUDING LIMITED CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY FITNESS PURPOSE. Microchip disclaims liability arising from this information use. Microchip devices life support and/or safety applications entirely buyer's risk, buyer agrees defend, indemnify hold harmless Microchip from damages, claims, suits, expenses resulting from such use. licenses conveyed, implicitly otherwise, under Microchip intellectual property rights. Trademarks Microchip name logo, Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC UNI/O registered trademarks Microchip Technology Incorporated U.S.A. other countries. FilterLab, Hampshire, HI-TECH Linear Active Thermistor, MXDEV, MXLAB, SEEVAL Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock ZENA trademarks Microchip Technology Incorporated U.S.A. other countries. SQTP service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2009, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved. Printed recycled paper. Microchip received ISO/TS-16949:2002 certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona; Gresham, Oregon design centers California India. Company's quality system processes procedures PIC® MCUs dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory analog products. addition, Microchip's quality system design manufacture development systems 9001:2000 certified. 2009 Microchip Technology Inc. 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