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TLE7189QK Automotive Power TLE7189QK Table Contents
Top Searches for this datasheetData Sheet, Rev. 2.0, July 2009 TLE7189QK Automotive Power TLE7189QK Table Contents Table Contents Table Contents 5.1.1 5.1.2 5.1.3 5.1.4 5.2.1 5.2.2 5.2.3 5.2.4 5.2.5 5.2.6 5.2.7 5.2.8 5.3.1 Overview Block Diagram Configuration Assignment TLE7189QK Definitions Functions. General Product Characteristics Absolute Maximum Ratings Functional Range Default State Inputs Description Electrical Characteristics MOSFET Driver Output Stages Operation Vs<12V Integrated Charge Pumps Sleep Mode Electrical Characteristics Protection Diagnostic Functions Short Circuit Protection Dead Time Shoot Through Protection Under Voltage Shut Down Over Voltage Shut Down Over Temperature Warning Check Pins Electrical Characteristics Shunt Signal Conditioning Electrical Characteristics Application Description Layout Guide Lines Package Outlines Revision History Data Sheet Rev. 2.0, 2009-07-10 3-Phase Bridge Driver TLE7189QK Features Overview Compatible very ohmic normal level input N-channel MOSFETs frequency 30kHz Fulfils specification down 5.5V supply voltage Short circuit protection with adjustable detection level Three integrated current sense amplifiers 100% duty cycle sensitivity emission Control inputs with characteristics Separate input each MOSFET Separate source connection each MOSFET Integrated minimum dead time Shoot through protection Disable function sleep mode Detailed diagnosis Over temperature warning LQFP-64 package with exposed excellent cooling Green Product (RoHS compliant) (Automotive Electronics Council) qualified PG-LQFP-64 supporting features: check: Over- under voltage check supply Test functions short circuit detection check High voltage rated inputs Description TLE7189QK driver dedicated control external MOSFETs forming converter high current phase motor drives automotive sector. incorporates features like short circuit detection, diagnosis high output performance combines with typical automotive specific requirements like full functionality even battery voltages. high side side output stages powerful enough drive MOSFETs with 400nC gate charge with approx. 150ns fall rise times. Type TLE7189QK Data Sheet Package PG-LQFP-64 Marking TLE7189F Rev. 2.0, 2009-07-10 TLE7189QK Block Diagram Block Diagram Charge Pump Under voltage det. Charge Pump Under voltage det. Floating driver Short circuit detection ERR1 ERR2 SCDL Diagnostic logic Under voltage Over voltage Overtemperature Short circuit Reset failure Floating driver Short circuit detection voltage check Floating driver Short circuit detection VS_OA Floating driver Short circuit detection VS_OA AGND ISP1 ISN1 ISP2 ISN2 ISP3 ISN3 Input control Shoot through protection dead time Floating driver Short circuit detection Floating driver Short circuit detection AGND Current sense OpAmp Bias reference buffer Figure Data Sheet Block Diagram Rev. 2.0, 2009-07-10 TLE7189QK Configuration Configuration Assignment TLE7189QK AGND AGND SCDL ISN3 ISP3 ISN2 ISN1 ERR1 ERR2 PG-LQFP-64-6, -11.vsd Figure Data Sheet Configuration Rev. 2.0, 2009-07-10 TLE7189QK Configuration Definitions Functions. Symbol ERR1 ERR2 VS_OA ISN1 Function Error signal Error signal terminal pump capacitor charge pump terminal pump capacitor charge pump terminal pump capacitor charge pump Voltage supply terminal pump capacitor charge pump Logic power ground Buffer capacitor charge pump Connection drain high side switches short circuit detection connected connected connected connected Output gate side switch Connection source side switch Logic power ground Connection source high side switch Output gate high side switch connected connected Buffer capacitor charge pump Output gate side switch Connection source side switch Output gate high side switch Connection source high side switch connected connected connected Output gate high side switch Connection source high side switch Logic power ground Output gate side switch connected connected Connection source side switch connected Voltage supply I-DC Link OpAmps voltage reference buffer input check Output OpAmp shunt signal amplification Input OpAmp shunt signal amplification Rev. 2.0, 2009-07-10 Data Sheet TLE7189QK Configuration Cooling Symbol ISP1 ISN2 ISP2 ISN3 ISP3 AGND AGND SCDL Function connected Input OpAmp shunt signal amplification Input bias reference amplifier Output bias reference amplifier Output OpAmp shunt signal amplification Input OpAmp shunt signal amplification connected Input OpAmp shunt signal amplification Output OpAmp shunt signal amplification Input OpAmp shunt signal amplification connected Input OpAmp shunt signal amplification Analog ground especially current sense OpAmps Analog ground especially current sense OpAmps Inhibit (active low) Input check test Input adjust short circuit detection level Enable (active high) Input side switch (active high) Input high side switch (active low) Input side switch (active high) Input high side switch (active low) Input side switch (active high) Input high side switch (active low) Should connected pins Cooling should interconnected. Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK General Product Characteristics General Product Characteristics Absolute Maximum Ratings Absolute Maximum Ratings voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. Voltages 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.1.7 4.1.8 4.1.9 4.1.10 4.1.11 4.1.12 4.1.13 4.1.14 4.1.15 4.1.16 4.1.17 4.1.18 4.1.19 4.1.20 4.1.21 Supply voltage Supply voltage Parameter Symbol Limit Values Min. Max. 18.0 18.0 18.0 with tp<200ms with 10k2) with 1k2) Unit Conditions -4.0 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -7.0 -9.0 -0.3 -0.3 -0.3 -5.0 Supply voltage Voltage range IHx, ILx, ENA, VDP1 Voltage range ERRx, VOx, VRI, VRO, VDP2 SCDL Voltage range ERRx, VRI, SCDL Voltage range Voltage range Voltage range VS_OA Voltage range Voltage range Voltage range Voltage range Voltage difference Gxx-Sxx Voltage range Voltage range Voltage range Voltage range Voltage range Voltage range Voltage range VDP3 VINH VVS_OA VVDH1 VVDH2 VVDH3 VVDH4 VVDH5 VVDH6 VVDH7 RVDH=100; 200ms; RVDH=100; 1ms; VINH=low VINH=low; 5min; VINH=low; 400ms; VINH=low; RVDH=100; 25°C; 1min; 4.1.22 Voltage range VVDH8 -7.0 VINH=low; RVDH=100; 200ms; 4.1.23 Voltage range VVDH9 -9.0 VINH=low; RVDH=100; 1ms; Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK General Product Characteristics Absolute Maximum Ratings (cont'd)1) voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 4.1.24 4.1.25 4.1.26 4.1.27 4.1.28 4.1.29 4.1.30 4.1.31 4.1.32 4.1.33 4.1.34 4.1.35 4.1.36 Parameter Voltage range Symbol -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 Limit Values Min. Max. Unit Conditions VCL1 Voltage range CH1, VCH1 Voltage difference CH1-CL1 VCP1 Voltage range VCL2 Voltage range CH2, VCH2 Voltage range VCB2 Voltage difference CH2-CL2 VCP2 voltage difference between VVDHVS tP<1µs; f=50kHz Voltage range ISPx, ISNx Output current range Gate resistor Min. Voltage rating capacitor Min. Voltage rating capacitor VISI IVOx VCCB2a VCCB2b External components 20V; VINH=low Temperatures 4.1.37 4.1.38 4.1.39 4.1.40 4.1.41 4.1.42 4.1.43 Junction temperature Storage temperature Lead soldering temperature (1/16'' from body) Peak reflow soldering temperature4) Junction case Resistivity5) Resistivity (charge device model) Tstg Tsol Tref RthJC VESD VESD Thermal Resistance Susceptibility subject production test, specified design. after chip must replaced; resistor series High frequent transient ringing above 1MHz exceeding +/-2V allowed Reflow profile IPC/JEDEC J-STD-020C susceptibility according EIA/JESD 22-A 114B susceptibility according EIA/JESD 22-C Note: Stresses above ones listed here cause permanent damage device. Exposure absolute maximum rating conditions extended periods affect device reliability. Note: Integrated protection functions designed prevent destruction under fault conditions described data sheet. Fault conditions considered "outside" normal operating range. Protection functions designed continuous repetitive operation. Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK General Product Characteristics Pos. 4.2.1 4.2.2 4.2.3 4.2.4 4.2.5 4.2.6 4.2.7 Functional Range Parameter Supply voltage Supply voltage Duty cycle Symbol Min. Limit Values Max. Unit Conditions TA=25°C; t<1min Total gate charge 400nC frequency Quiescent current3) Quiescent current into Supply current fPWM IQ_VDH 4.2.8 Supply current (device disabled ENA) IVs(o) 4.2.9 4.2.10 4.2.11 Supply current VS_OA Current flowing into (device sleep mode) Current flowing into (device sleep mode) Voltage difference CB2-VDH Junction temperature IVs_OA IVDH1 IVDH2 ,VVDH<20 VVDH<20V; open fPWM=20kHz Qgate=170nC: 5.5V VS=5.5V. 20V; VSHx=0V VS=20V. 28V; VSHx=0V VVS_OA=4.8 5.2V VS=5.5V. 20V; VSHx=0V VS=5.5V. 20V; VS=VVDH=VSHx; VIHx=low Operation mode 4.2.12 4.2.13 VCB2VDH -0.3 proper start minimum Vs=6.5V required Duty cycle referred high side input command (IHx); duty cycles driven continuously fully operational total current consumption from power VDH) Note: Within functional range operates described circuit description. electrical characteristics specified within conditions given related electrical characteristics table. Note: voltage difference between smaller than during normal operation, there risk that high side output switch without corresponding input signal. soon this supply voltage recovers input signal changes, output stage automatically aligned input again. Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK General Product Characteristics Table Default State Inputs Default State Inputs State High High Typ. 1.4V Zero ampere equivalent Remark side MOSFETs High side MOSFETs Device/outputs disabled Device/outputs disabled Sleep mode, Characteristic Default state left open -pull down) Default state left open pull Default state left open pull down) Default state left open pull Default state left open pull down) Default state SCDL SCDL left open internal voltage divider) Default State sense amplifier output (ISPx=ISNx=0V) Status Device Outputs when ENA=INH=high VCT=low1) special start procedure required Device active outputs 5.5.28V; check functional failure Note: load condition "C=22nF; RLoad=1" paragraph "Electrical characteristics Dynamic characteristic" means that RLoad connected between output positive terminal negative terminal connected corresponding Sxx. voltage measured positive terminal Note: Within functional range operates described circuit description. electrical characteristics specified within conditions given related electrical characteristics table. Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Description Electrical Characteristics 5.1.1 Description Electrical Characteristics MOSFET Driver Output Stages side high side powerful push-pull output stages TLE7189QK floating blocks, each with source pin. This allows direct connection output stage source each single MOSFET, allowing perfect control each gate-source voltage even when 200A driven bridge with rise fall times clearly below 1µs. output stages have same output power thanks used charge pump principle they switched 30kHz. output stages powerful enough drive MOSFETs with 400nC gate charge with approx. 150ns fall rise times even MOSFETs with 200nC each with fall rise times approx. 150ns. Maximum allowed power dissipation, max. junction temperature capabilities charge pump limit higher frequencies. Each output stage short circuit detection block. more details about short circuit detection Chapter 5.2.1. Vbat Charge pump Charge pump UVLO ERR1 +3.3V ERR2 Error logic Reset Power Reset Under voltage Over voltage Over temperature Short circuit+disable Under voltage lock Level shifter SCDL lock unlock Floating driver short circuit filter Input logic shoot through protection dead time Level shifter Floating driver Shuntx P-GND Figure Block Diagram Driver Stages including Short Circuit Detection Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Description Electrical Characteristics 5.1.2 Operation Vs<12V Integrated Charge Pumps TLE7189QK provides feature tailored requirements automotive applications. Often operation application assured even supply voltage lower. Normally bridge driver provide such conditions clearly less than gate external MOSFETs, increasing their RDSon associated power dissipation. TLE7189QK charge pump circuitries external capacitors. operation charge pumps independent upon pulse pattern MOSFETs. output charge pumps regulated. first charge pump doubles supply voltage long below supply voltage above, charge pump regulates output typically. Above supply voltage, output voltage charge pump will increase linearly. Yet, output will exceed 25V. Charge pump regulated well pumped voltage Normally same voltage range. driver designed have significant different voltages compared This would lead reduced supply voltages high side output stages. Charge pump supplies side MOSFETS output stages side MOSFETs with sufficient voltage assure gate even supply voltage below 10V. Charge pump supplies output stages high side MOSFETs with sufficient voltage assure gate. addition, charge pump supplies most internal circuits driver including charge pump Output charge pump buffer capacitor which referenced GND. Charge pump supplies high side MOSFETs output stages high side MOSFETs with sufficient voltage assure high side MOSFET gate. Output charge pump buffer capacitor which referenced VDH. This concept allows drive external MOSFETs complete duty cycle range 100% without taking care about recharging bootstrap capacitors. This simplifies applications especially motor drives with block wise commutation. charge pumps only deactivated when device into sleep mode INH. size charge pump capacitors (pump capacitors well buffer capacitors CBx) varied between 4.7µF. Yet, larger capacitor values result higher charge pump voltages less voltage ripple charge pump buffer capacitors (which supply internal circuits well external MOSFETs, pls. above). Besides capacitance values buffer capacitors determines voltage ripple well. recommended buffer capacitors that have small ESR. Pls. also Chapter 5.1.3 capacitor selection. 5.1.3 Sleep Mode When low, driver will sleep mode. switches complete supply structure device leads finally under voltage shut down complete driver. Enabling device with means switch supply structure. device will through power reset during wake recommended perform Reset after Wake remove possible signals; Reset performed keeping until charge pump voltages have ramped Enabling disabling with very fast. fast enable disable recommended. When TLE7189QK mode (INH low) when supply voltage available pin, then driver supplied, charge pumps inactive charge pump capacitors discharged. terminal buffer capacitor will decay GND. When battery voltage still applied terminal buffer capacitor buffer capacitor will slowly charged battery voltage, with reversed polarity compared polarity during regular operation. Hence, important buffer capacitor (CB2) that withstand both, during operation mode -VBAT during mode, e.g. ceramic capacitor. case load dump during mode, negative voltage across will clamped (CB2 referenced VDH). Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Description Electrical Characteristics 5.1.4 Electrical Characteristics Electrical Characteristics MOSFET drivers Characteristics 20V, +150 fPWM 25kHz, voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.1.1 5.1.2 5.1.3 5.1.4 5.1.5 5.1.6 Parameter level output voltage High level output voltage Symbol Min. Limit Values Typ. Max. Unit Conditions VG_LL VG_HL1 High level output voltage, Side VG_HL2 High level output voltage, High Side VG_HL3 High level output voltage difference dVG_H Gate drive output voltage VGS_D 5.1.7 Gate drive output voltage Tj=-40°C Tj=25°C Tj=150°C VGS1 ILoad=30mA VS=8. 20V; ILoad=-2mA VS=5.5. ILoad=-2mA VS=5.5. ILoad=-2mA ILoad=-100mA; VS=20V VENA=low VVCT=high; 5.5V<VS<28V ILoad=10mA UVLO; VS<=5.5V; ILoad=2mA 5.1.8 Gate drive output voltage high side VGS2 Tj=-40°C Tj=25°C Tj=150°C Gate drive output voltage side Over voltage VS=open VINH=low; ILoad=2mA Over voltage; 5.1.9 5.1.10 VGS3 ILoad=2mA open; Gate drive output voltage side1) VGS3 VS=open; VINH=low; IGLx=10µA open; VS=open; VINH=low; IGLx=3µA 5.1.11 Gate drive output voltage side1) VGS3 5.1.12 5.1.13 5.1.14 5.1.15 5.1.16 5.1.17 5.1.18 5.1.19 5.1.20 5.1.21 level input voltage Ixx, VI_LL High level input voltage Ixx, VI_HL Input hysteresis IHx, ILx, Input hysteresis IHx, ILx, level input voltage High level input voltage pull resistor pull down resistor INH, pull down resistor Quiescent current --0.75 dVI1 dVI2 VI_LL VI_HL RIHx RILx RINEN IQVDH VS=5.5. VS=8. VIHx<5.5V VILx<5.5V VINH; VENA<5.5V 25°C; VINH=low Rev. 2.0, 2009-07-10 Data Sheet TLE7189QK Description Electrical Characteristics Electrical Characteristics MOSFET drivers Characteristics 20V, +150 fPWM 25kHz, voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.1.22 5.1.23 Parameter Output bias current Output bias current Symbol Min. Limit Values Typ. -1.0 -1.0 Max. -0.3 -0.3 -1.6 -1.6 Unit Conditions ISHx ISLx VS=5.5.20V; VSHx=0.(VS+1) VS=5.5.20V; VSLx=0.7V Electrical Characteristics MOSFET drivers Dynamic Characteristics 20V, +150 fPWM 25kHz, voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.1.24 5.1.25 Parameter Fixed internal dead time Turn current, peak Symbol Min. Limit Values Typ. Max. Unit Conditions IG(on)1 5.1.26 Turn current, peak IG(on)2 5.1.27 Turn current, peak IG(off) 5.1.28 Rise time (20-80%) -40°C 25°C 150°C Fall time (20-80%) -40°C 25°C 150°C Input propagation time (low Input propagation time (low off) Input propagation time (high Input propagation time (high off) Absolute input propagation time difference (all channels turn Absolute input propagation time difference (all channels turn off) tG_rise VGxx-VSxx=0V; VS=8.20V; CLoad=22nF; RLoad=1 VGxx-VSxx=0V; VS=5.5.8V; CLoad=22nF; RLoad=1 VGxx-VSxx=10V; VS=8.20V; CLoad=22nF; RLoad=1 CLoad=22nF; RLoad=1 5.1.29 tG_fall CLoad=22nF; RLoad=1; 5.1.30 5.1.31 5.1.32 5.1.33 5.1.34 5.1.35 tP(ILN) tP(ILF) tP(IHN) tP(IHF) tP(an) tP(af) CLoad=22nF; RLoad=1 Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Description Electrical Characteristics Electrical Characteristics MOSFET drivers Dynamic Characteristics 20V, +150 fPWM 25kHz, voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.1.36 5.1.37 5.1.38 5.1.39 5.1.40 Parameter Symbol Min. Absolute input propagation time tP(1hfln) difference (1channel high Absolute input propagation time tP(1lfhn) difference (1channel high Absolute input propagation time tP(ahfln) difference (all channel high Absolute input propagation time tP(alfhn) difference (all channel high Wake time; high Limit Values Typ. Max. Driver fully functional; VS=6.5.8V; VENA=low; CCPx=CCBx=4.7µF Driver fully functional; VS=8.20V; VENA=low; CCPx=CCBx=4,7µF Driver fully functional; VS=6.5.8V; VENA=low; CCPx=CCBx=4,7µF Driver fully functional; VS=8.20V; VENA=low; CCPx=CCBx=4,7µF Unit Conditions CLoad=22nF; RLoad=1 tINH_Pen1 5.1.41 Wake time; high tINH_Pen2 5.1.42 Wake time logic functions; tINH_log high 5.1.43 Wake time logic functions; tINH_log high 5.1.44 5.1.45 5.1.46 5.1.47 5.1.48 propagation time disable output stages propagation time disable output stages propagation time disable entire driver Supply voltage Wake Charge pump frequency tINH_Pdi1 tINH_Pdi2 tINH_Pdi3 VVsWU VS=5.5.8V VS=8.20V diagnostic, OpAmp working Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK 5.2.1 Protection Diagnostic Functions Short Circuit Protection TLE7189QK provides short circuit protection external MOSFETs. monitoring drainsource voltage external MOSFETs. soon this voltage higher than short circuit detection limit, capacitor will charged. high side side output stage same half bridge same capacitor (see Figure This capacitor discharged permanently with current which about times smaller than charging current. This charging discharging ratio specified with help duty cycle where short detected detected. After delay about 12µs external MOSFETs will switched until driver reset pin. error flag set. drain-source voltage monitoring short circuit detection certain external MOSFET active soon corresponding input "on" dead time expired. short circuit detection level adjustable analogue manner voltage setting SCDL pin. There translation between voltage applied SCDL drain-source voltage limit. E.g. trigger circuit drain-source voltage, SCDL must well. drain-source voltage limit chosen between 2.5V. SCDL left open, short circuit detection level will internally specified value. case SCDL connected detection level low. SCDL connected 3.3V, detection level about 3.2V. TLE7189QK short circuit detection functionality tested setting SCDL voltages lower than 0.4V, switching side MOSFETs switching more high side MOSFETs. this test, short circuit will detected even without current external MOSFET (VDH-SHx VTSCD1). This test function used well detect open pin. open during this test, error will reported. setting SCDL will disable short circuit protection function. 5.2.2 Dead Time Shoot Through Protection bridge applications assured that external high side side MOSFETs "on" same time, connecting directly battery voltage GND. dead time generated TLE7189QK fixed minimum value. This function assures minimum dead time input signals coming from faulty. exact dead time bridge usually controlled generation unit addition this dead time, TLE7189QK provides locking mechanism, avoiding that both external MOSFETs half bridge switched same time. This functionality called shoot through protection. command switch both high side switches same half bridge given input pins, command will ignored. conflicting input signals will generate error message. 5.2.3 Under Voltage Shut Down TLE7189QK integrated under voltage shut down, assure that behavior device predictable voltage ranges. voltage charge pump buffer capacitors reaches under voltage shut down level minimum specified filter time, gate-source voltage external MOSFETs will actively pulled low. this situation short circuit detection this output stage deactivated avoid latching shut down driver. soon charge pump buffer voltage recovers, output stage condition will aligned input patterns automatically.This allows continue operation motor case under voltage shut down without reset Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Under voltage shut down will occur when 250nC, fPWM 25kHz, charge pump capacitors 5.2.4 Over Voltage Shut Down TLE7189QK integrated over voltage shut down avoid destruction high supply voltages.The voltage measured pin. When them them exceed over voltage shut down level more than specified filter time then external MOSFETs switched off. addition, over voltage will shut down charge pumps will discharge charge pump capacitors. This results under voltage condition which will indicated ERRx pins. During over voltage shut down external MOSFETs charge pumps remain until reset performed. 5.2.5 Over Temperature Warning junction temperature exceeding typ. 155°C error signal given warning. driver will continue operate order disturb application. warning removed automatically when junction temperature cooling down. responsibility user protect device against over temperature destruction. 5.2.6 Check assure high level system safety, TLE7189QK provides check. 5.0V system supply connected VS_OA checked internally monitoring over- under voltage. internal filter time integrated avoid faulty triggering. check active when signal high inactive when signal (=driver disabled). case under- over voltage VS_OA, check will disable driver latched. restart output stages, reset performed with pin. decides about over voltage under voltage detection level. 5.2.7 Pins TLE7189QK status pins provide diagnostic feedback outputs these pins push pull stages, they either High Low. Table High High High High High Table Overview error conditions High High High High ERR1 High High High ERR2 High High High Driver conditions Under voltage check error Over temperature over voltage Short circuit detection errors observed errors will reported (except warning undervoltage shutdown) output tristate secured pull down Behavior different error conditions restart behavior Auto restart Shuts down. external Power -MOSFETs Latch, reset must performed external Power -MOSFETs Latch, reset must performed external Power -MOSFETs Error condition Short circuit detection Under voltage Over voltage Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Error condition check restart behavior Shuts down. Nothing Over temperature warning Self clearing Latch, reset must performed external Power -MOSFETs Note: errors lead sleep mode. Sleep mode only initiated with pin. latch restart behavior allows distinguish between different error types combined signals. Table Priority Priorisation Errors Error check Short circuit detection Under voltage detection Over voltage detection Over temperature Reset ERROR registers Disable TLE7189QK reseted with help enable ENA. pulled specified minimum time, error registers cleared external MOSFETs switched actively. During disable only errors under voltage shut down over temperature warning shown. Other errors displayed. 5.2.8 Electrical Characteristics Electrical Characteristics Protection diagnostic functions 20V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. Parameter Symbol Min. Over temperature 5.2.1 5.2.2 Over temperature warning Hysteresis over temperature warning Limit Values Typ. Max. Unit Conditions Tj(OW) dTj(OW) Short circuit detection 5.2.3 5.2.4 Filter time short circuit protection tSCP(off) Maximum duty cycle SCD1) Default DSCDmax fPWM=100kHz static applied 5.2.5 minimum duty cycle periodic SCD1) Voltage range VSCD adjust limit Short circuit detection level DSCDmin fPWM=100 static applied Short circuit detection active Short circuit detection active 5.2.6 5.2.7 VSCDLa1 VSCDLa2 2.64 3.63 VSCDL=3.3V Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Electrical Characteristics Protection diagnostic functions (cont'd) 20V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.2.8 Parameter Short circuit disable voltage VSCD Accuracy (VSCDL /VDS(off)) Accuracy (VSCDL /VDS(off)) SCDL pull resistor SCDL pull down resistor SCDL default voltage SCDL voltage test activation Filter time test activation VDH-SHx voltage detection test mode VDH-SHx voltage with detection test mode High level output voltage ERRx level output voltage ERRx pull down resistor Symbol Min. Limit Values Typ. Max. Short circuit detection disabled Unit Conditions VSCDL(dis) 5.2.9 5.2.10 5.2.11 5.2.12 5.2.13 5.2.14 5.2.15 5.2.16 5.2.17 ASC(off)1 ASC(off)2 RSCDU RSCDD VSCDLop VSCDT tSCDT VTSCD1 VTSCD2 0.85 1.15 -350 VSCDL(off) 2.5V VSCDL(off) 0.7. tested tested Open Test short circuit detection pins 5.2.18 5.2.19 5.2.20 5.2.21 VOHERR VOLERR RERR -0.1 ILoad= -0.2mA ILoad= 0.2mA VERR<5.5V; VINH=low Propagation time difference ERR1 tPD(ERR) ERR2 Over voltage shut down Over voltage shut down Over voltage filter time Under voltage shut down Under voltage shut down Hysteresis under voltage shut down Under voltage filter time Reset time clear registers time signal without reset Over- under voltage 5.2.22 5.2.23 5.2.24 5.2.25 5.2.26 5.2.27 5.2.28 VOV(off) VOV(off) VUV1 VUV2 VHUV1,2 32.7 Enable reset 5.2.29 5.2.30 tRes1 tRes0 Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Electrical Characteristics Protection diagnostic functions (cont'd) 20V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.2.31 5.2.32 Parameter Symbol Min. propagation time (for enable tPENA disable) Return time normal operation auto-restart Limit Values Typ. Max. Unit Conditions Check 5.2.33 5.2.34 5.2.35 5.2.36 5.2.37 5.2.38 5.2.39 5.2.40 VVCU Over voltage detection level VVCOl Over voltage detection level VVCOh Over- under voltage filter time level input voltage VVCT_LL High level input voltage VVCT_HL RVCT pull resistor tVCT Filter time test Under voltage detection level VVCT=low VVCT=low VVCT=high VVCT<5.5V Parameters describe behavior internal circuit. Therefore only internal delay times considered. application dead-/ delay times determined application circuit (switching times MOSFETs, adjusted dead time) have considered well. Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Shunt Signal Conditioning TLE7189QK incorporates three fast precise operational amplifiers conditioning amplification shunt signals sensed three phases. Additionally, reference bias buffer integrated provide adjustable bias reference three OpAmps. voltage divider should less than filtering capacitor less than needed all. gain OpAmps adjustable external resistors within range When VISP VISN, provides reference voltage VVRO. VVRO normally half regulated voltage provided from external voltage regulator used read current sense signal. additional buffer allows bi-directional current sensing permits adaptation reference bias different voltages. reference buffer assures stable reference voltage even high frequency range. reference bias buffer used OpAmps. OpAmps TLE7189QK demonstrate offset voltages very little drift over temperature, thus allowing accurate phase current measurements. 3.3V CVRI needed) RVRI kOhm RVRI CVRI RVRI Adjustable bias reference Bias Reference ISP1 I-DC Link OpAmp1 TLE7189 I-DC Link OpAmp2 I-DC Link OpAmp3 ADCs Figure Shunt Signal Conditioning Block Diagram Data Sheet Dependent customer specific requirements additional filtering necessary ISN1 ISP2 ISN2 Shunt ISP3 ISN3 Rev. 2.0, 2009-07-10 TLE7189QK 5.3.1 Electrical Characteristics Electrical Characteristics Current sense signal conditioning 20V, VVSOA +150 fPWM 25kHz, voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 5.3.6 5.3.7 Parameter Series resistors Resistor ratio (gain ratio) Resistor ratio (gain ratio) Input differential voltage (ISPx ISNx) Input voltage (Both Inputs GND) (ISP GND) (ISN -GND) Input voltage (Both Inputs GND) (ISP GND) (ISN -GND) Symbol Min. Limit Values Typ. Max. 1000 2200 1500 1.28 200pF Unit Conditions RRfb/RRS1 RRfb/RRS2 VIDR VLL1 VLL2 -800 -800 -800 -1.58 VS=8 Input offset voltage I-DC link VIO1 OpAmp, including drift over temperature range Input offset voltage reference buffer input range Input bias current Input bias current reference buffer High level output voltage level output voltage Output voltage RRS=500; VCM=0V; VO=1.65V; VRI=1.65V 5.3.8 5.3.9 5.3.10 5.3.11 5.3.12 5.3.13 5.3.14 VIO2 IIBRB CMRR -300 -0.1 1.623 1.65 1.668 VCM=0V; VO=open VRI=1.65V VRI=1.2 2.6V; IOH=-3mA; VRI=1.2 2.6V; IOH=3mA VIN(SS)=0V; Gain=15; VRI=1.65V 5.3.15 5.3.16 5.3.17 5.3.18 Output short circuit current Differential input resistance 10kHz Common mode input capacitance Common mode rejection ratio CMRR 20*Log((Vout_diff/Vin_diff) (Vin_CM/Vout_CM)) 5.3.19 Common mode suppression2) with 20*Log(Vout_CM/Vin_CM) Freq =100kHz Freq 1MHz Freq 10MHz VIN=360mV* sin(2**freq*t); RRS=500; RRfb=7500; VVRI=1.65, 2.5V Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Electrical Characteristics Current sense signal conditioning (cont'd) 20V, VVSOA +150 fPWM 25kHz, voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.3.20 Parameter Slew rate Symbol Min. Limit Values Typ. Max. V/µs Gain>= RLoad=1.0k; CLoad=500pF Unit Conditions 5.3.21 5.3.22 5.3.23 Large signal open loop voltage gain (DC) Unity gain bandwidth Phase margin1) RLoad=1k; CLoad=100pF Gain>= RLoad=1k; CLoad=100pF 5.3.24 5.3.25 Gain margin1) Bandwidth RLoad=1k; CLoad=100pF Gain=15; RLoad=1k; CLoad=500pF; Rs=500 Gain=15; RLoad=1k; CLoad=500pF; 0.2<VVO< 4.0V; RRS=500 5.3.26 5.3.27 5.3.28 Output settle time Output rise time Output fall time tset tIrise tIfall subject production test; specified design Without considering offsets such input offset voltage, internal miss match assuming tolerance error external resistors. Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Application Description Application Description automotive sector there more more applications requiring high performance motor drives, such electro-hydraulic electric power steering. these applications phase motors, synchronous asynchronous, used, combining high output performance, space requirements high reliability. Reverse polarity switch S=12V xxxx P-GND RVDH V_Bridge VS_OA SCDL CCB2 ceramic V_Bridge CCP1 and/or System ASIC CCB1 2.2µF 4.1.2: pump capacitors 4.7µF TLE7189 RERR RERR ERR1 ERR2 ISN3 ISN2 ISN1 ISP3 ISP2 ISP1 Shunt capacitors shunt signal conditioning only additional filtering desired max. Ratings P-GND Figure Application Circuit TLE7189QK Note: This very simplified example application circuit. function must verified real application. Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Application Description Layout Guide Lines Please refer also simplified application example. Three separated bulk capacitors should used half bridge Three separated ceramic capacitors should used half bridge Each bulk capacitors each ceramic capacitors should assigned half bridges should placed very close components within half bridge should placed close each other: high side MOSFET, side MOSFET, bulk capacitor ceramic capacitor parallel) shunt resistor form loop that should small tight possible. traces should short wide three half bridges separated; yet, when there common referenced shunt resistor three half bridges sources three side MOSFETs should close each other close common shunt resistor sense used short circuit detection; should routed (via Rvdh) common point drains high side MOSFETs sense voltage present drain high side buffer capacitor charge pump negative terminal should routed common point drains high side MOSFETs well this connection should inductive resistive Additional snubber circuits series) placed attenuate/suppress oscillations during switching MOSFETs, there snubber circuits half bridge, (several Ohm) (several must inductive terms routing packaging (ceramic capacitors) exposed backside LQFP recommended connect Data Sheet Rev. 2.0, 2009-07-10 TLE7189QK Package Outlines Package Outlines 0.1±0.05 STAND ±0.05 MAX. +0.0 0.15 -0.0 ±0.15 -0.03 +0.07 0.08 SEATING COPLANARITY PLANE 0.08 Bottom View (By) Solder Area Exposed Diepad Index Marking Exposed Diepad Dimensions Package Leadframe PG-LQFP-64-17 C66065-A6866-C017 Index Marking ±0.1 (By) 0°.7° Does include plastic metal protrusion 0.25 max. side PG-LQFP-64-17-PO GPS09181 Figure PG-LQFP-64-17 Green Product (RoHS compliant) meet world-wide customer requirements environmentally friendly products compliant with government regulations device available green product. Green products RoHS-Compliant (i.e Pb-free finish leads suitable Pb-free soldering according IPC/JEDEC J-STD-020). find packages, sorts packing others Infineon Internet Page "Products": Data Sheet Dimensions Rev. 2.0, 2009-07-10 TLE7189QK Revision History Version V2.0 Revision History Date 2009-07 Changes Data Sheet Rev. 2.0, 2009-07-10 Edition 2009-07-10 Published Infineon Technologies 81726 Munich, Germany 2009 Infineon Technologies Rights Reserved. Legal Disclaimer PRO-SILis Registered Trademark Infineon Technologies PRO-SILTrademark designates Infineon products which contain Supporting Features.SIL Supporting Features intended support overall System Design reach desired (according IEC61508) A-SIL (according ISO26262) level Safety System with high efficiency. respectively A-SIL certification such System reached system level System Responsible accredited Certification Authority. stands Safety Integrity Level (according 61508) A-SIL stands Automotive-Safety Integrity Level (according 26262) information given this document shall event regarded guarantee conditions characteristics. With respect examples hints given herein, typical values stated herein and/or information regarding application device, Infineon Technologies hereby disclaims warranties liabilities kind, including without limitation, warranties non-infringement intellectual property rights third party. Information further information technology, delivery terms conditions prices, please contact nearest Infineon Technologies Office (www.infineon.com). Warnings technical requirements, components contain dangerous substances. information types question, please contact nearest Infineon Technologies Office. Infineon Technologies components used life-support devices systems only with express written approval Infineon Technologies, failure such components reasonably expected cause failure that life-support device system affect safety effectiveness that device system. Life support devices systems intended implanted human body support and/or maintain sustain and/or protect human life. they fail, reasonable assume that health user other persons endangered. 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