TLE7242-2G Channel Fixed Frequency Constant Current Control

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TLE7242-2G Channel Fixed Frequency Constant Current Control

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Data Sheet, Rev. 1.0, July 2008
TLE7242-2G
Channel Fixed Frequency Constant Current Control
Automotive Power
TLE7242-2G
Table Contents
Table Contents
Table Contents 1.3.1 1.3.2 5.3.1 5.3.2 5.6.1 5.6.2 5.6.2.1 5.6.2.2 5.6.2.3 5.6.2.4 5.6.2.5 5.6.2.6 5.6.2.7 5.6.2.8 5.6.2.9 5.6.2.10 5.6.2.11 5.6.2.12 5.6.2.13 Overview Features Applications General Description Mode Operation Constant Current Mode Operation
Block Diagram Configuration Assignment Definitions Functions General Product Characteristics Maximum Ratings Functional Range Thermal Resistance Functional Description Electrical Characteristics Supply Reference Input Output Diagnostics On-State Diagnostics Off-State Diagnostics Output Driver Current Control Serial Peripheral Interface (SPI) Signal Description Message Structure Message Version Manufacturer Message Main Period Message Offset Message Current Point Dither Amplitude Message Dither Period Message Control Variable Message Dynamic Threshold Value Message On/Off Control Fault Mask Configuration Message Diagnostic Configuration Message Diagnostic Read Message Current Read Message Autozero Read Message Duty Cycle Read
Application Information Further Application Information Package Outlines Revision History
Data Sheet
Rev. 1.0, 2008-07-09
Channel Fixed Frequency Constant Current Control
TLE7242-2G
Overview
Features
side constant current control pre-driver integrated circuit Four independent channels Output current programmable with resolution Current range 1.2A (typ) with sense resistor Resolution 0.78125 mA/bit (typ) with sense resistor full scale error over temperature when autozero used Programmable frequency from approximately (typ) PG-DSO-28-26 Programmable coefficients controller each channel Programmable Transient Mode operation reduce settling time when large changes current point commanded. Programmable superimposed dither. Dither programmed setting dither step size number periods each dither period Programmed interface dither each channel enabled programmed independently Programmable synchronization control signals. Phase delay time interface Synchronization initiated signal PHASE_SYNC input pin. Channels within device between multiple devices synchronized. Each channel configured function simple on/off predriver constant current predriver Interface Control (Serial Peripheral Interface) Slave only ENABLE disable channels freeze channels Active RESET_B resets internal registers their default state disables channels. Open drain FAULT programmed transition when various faults detected. 5.0V 3.3V logic compatible Protection Over current shutdown monitored POSx pin. Programmable over current threshold Programmable over current delay time Programmable over current retry time Battery (BAT) overvoltage shutdown. Diagnostics Over current
Type TLE7242-2G Data Sheet
Package PG-DSO-28-26
Marking TLE7242-2G Rev. 1.0, 2008-07-09
TLE7242-2G
Overview Open load state Open load state Short ground Test complete indicates that fault detection test completed Control loop monitor capabilities average current measurement over last completed cycle each channel accessed SPI. duty cycle each channel accessed auto zero values used null offsets input amplifiers accessed Required External Components: N-Channel Logic level (5V) MOSFET transistor with typical (e.g. BSO604NS2) Recirculation diode (ultrafast) Sense resistor (0.2 1.2A average output current range) Green Product (RoHS compliant) Qualified
Applications
Variable Force Solenoids (e.g. automatic transmission solenoids) Other constant current solenoids Idle Control Exhaust Recirculation Vapor Management Valve Suspension Control
General Description
TLE7242 four channel low-side constant current control predriver Each channel configured function either on/off mode constant current mode setting appropriate MODE message
1.3.1
Mode Operation
On/Off operation, POSx NEGx pins must connected circuit either configurations shown Figure sense resistor included, load current monitored microcontroller command. open load state fault detection feature disabled on/off mode. Note: external flyback clamp required this configuration otherwise damaged.
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Overview
VBAT
VBAT
Solenoid
Solenoid
POSx CESD RSENSE NEGx
POSx CESD
NEGx QDRV
OUTx
QDRV OUTx
Figure
External Circuit Diagram On/Off Mode Operation
1.3.2
Constant Current Mode Operation
During constant current operation, POSx NEGx pins must connected circuit configuration shown Figure Note: external recirculation diode required this configuration otherwise damaged.
VBAT Solenoid
DRECIRC
POSx RSENSE NEGx QDRV
CESD
OUTx
Figure
External Circuit Diagram Constant Current Mode Operation
constant current control circuit operate modes; steady state mode transient mode. Steady-State Mode During steady-state operation, control signal driven OUTx controlled control loop shown Figure Frequency programmed message this message main period divider, value between equation calculating frequency
FPWM
FCLK
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Overview Current Point programmed message equation calculating current setpoint
Currentsetpoint [mA]
setpoint(11bit) RSENSE
Proportional coefficient (KP) Integral coefficient (KI) control loop programmed message values should values that result desired transient response control loop. duty cycle OUTx calculated from difference equations:
DutyCycle
Rsense error Rsense error
where error difference between commanded average current measured average current units Amps. where indicates integral number periods that have elapsed since current regulation initiated.
Autozero Value "ON"
Autozero Value "OFF"
Auto Zero
CURRENT READ
POSx Average NEGx
DUTY CYCLE
CURRENT POINT
Dither Generation
Block
OUTx
DITHER STEP SIZE DITHER STEPS
PRELOAD
Underlined PROGRAMMED Italics MONITORED
Figure Auto Zero
Control Loop Steady-State Mode
When channel configured constant current operation current point 000h consecutive periods, autozero sequence initiated. autozero sequence will measure offset current Data Sheet Rev. 1.0, 2008-07-09
TLE7242-2G
Overview measurement amplifiers. autozero function enabled message then measured offset will subtracted from converter output shown Figure when current point greater than Dither triangular dither waveform superimposed current point setting Dither Enable message amplitude frequency dither waveform programmed each channel messages message section details. first programmed value step size dither waveform which number bits added subtracted from setpoint period. dither step size 1/16 magnitude nominal setpoint current value. second programmed value number steps quarter dither waveform. When dither enabled, average current point will activated until current dither cycle completed. dither cycle completed positive zero crossing dither waveform. dither amplitude setting, dither frequency setting, dither disable command will also activated until current dither cycle completed Figure
PWM_START
Dither
Dither Parameter Change
Figure
Dither Values Programmed Resultant Waveform Timing
Note: actual dither waveform attenuated phase shifted according frequency response control loop. channel enters transient mode operation while dither waveform active, dither wave-form will pause until transient mode exited. Transient Mode When large change current point occurs, device programmed enter transient mode operation. setpoint change threshold required initiate transient mode programmed message purpose this mode operation reduce transition time load current after large change setpoint. this mode operation OUTx signal controlled state machine shown Figure control method this mode similar hysteretic control, OUTx signal transitions high based immediate value measured output current. frequency fixed this mode operation. device will automatically switch from transient mode operation steady state operation start first period after point been reached.
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Overview
OUTx High
Measured Current Point
OUTx
Point change Threshold Point Point
Start period
Reset
SteadyState Mode
next value
CALC
OUTx Controller stop
PRELOAD
OUTx Controller stop
LEAVE HYST MODE
OUTx Controller stop
Measured Current Point Measured Current Point
point change Threshold Point Point
Start period Measured Current Point OUTx High
OUTx
Figure
Transient Mode State Diagram
typical current waveform during transient mode operation shown Figure Starting from point point accepted short time after rising edge CS_B. OUTx remains high until measured load current reached point. OUTx then toggled maintain load current near point until next period begins. device will then switch back steady state control OUTx will controlled control loop shown Figure During transition from transient mode operation steady state operation, integrator pre-loaded with programmable value. This value should chosen give initial duty cycle approximately equal duty cycle required regulate load current point.
setpoint
Steady State Mode Begins
Transient Mode Begins
setpoint
CS_B
setpoint accepted
Figure
Transient Mode Timing Diagram
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Block Diagram
Block Diagram
GND_D GND_A V_SIGNAL Supply Biasing Monitoring
Current Control Block
POS0 NEG0
OUT0 Diagnostics
Interface CS_B RESET_B ENABLE
V_SIGNAL
Current Control Block
POS1 NEG1
OUT1 Diagnostics
V_SIGNAL
Current Control Block
POS2 NEG2
OUT2 Diagnostics
FAULT PHASE_SYNC
Logic
Current Control Block
POS3 NEG3
OUT3 Diagnostics TEST
Figure
Block Diagram
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Configuration
Configuration
Assignment
GND_A
FAULT RESET_B ENABLE CS_B GND_D V_SIGNAL TEST PHASE_SYNC
TLE7242
Figure
Configuration
Definitions Functions
Symbol OUT3 OUT2 POS3 NEG3 NEG2 POS2 GND_A POS1
Analog Function /Digital
Gate driver output channel Connect gate external MOSFET. Gate driver output channel Connect gate external MOSFET. Channel Positive sense pin. Connect "load" side external sense resistor. Channel Negative sense pin. Connect "FET" side external sense resistor. Channel Negative sense pin. Connect "FET" side external sense resistor. Channel Positive sense pin. Connect "load" side external sense resistor. Analog Ground supply analog. external capacitor connected between this GND_A near this pin. Channel Positive sense pin. Connect "load" side external sense resistor. Rev. 1.0, 2008-07-09
Data Sheet
TLE7242-2G
Configuration Symbol NEG1 NEG0 POS0 OUT1 OUT0
Analog Function /Digital
Channel Negative sense pin. Connect "FET" side external sense resistor. Channel Negative sense pin. Connect "FET" side external sense resistor. Channel Positive sense pin. Connect "load" side external sense resistor. Gate driver output channel Connect gate external MOSFET. Gate driver output channel Connect gate external MOSFET. Battery sense input over voltage detection. Connect through series resistor (e.g. Kohm) solenoid supply voltage. large electrolytic capacitor (e.g. 47uF) should placed between supply ground. Used synchronize rising edges signal OUTx pins each channel. Used Test. Must connected GND_D specified operation Serial data Supply output pull-ups digital inputs CS_B RESET_B. external capacitor must connected between this GND_D near this pin. Serial data digital driver circuitry. Main clock input clock input required. supply digital circuit blocks driver circuits. pair external capacitors connected between this GND_D very near this pin. Example values external capacitors 100nF 100pF. Clock input Chip Select (low active signal) When this input channels turned (zero current) remain their last state, depending channel programmed respond When this input channels turned internal registers reset their default state. part must held reset external source until supplies stable within tolerance. This open drain output pulled when fault condition detected. Certain faults masked SPI.
PHASE_SYNC TEST V_SIGNAL
GND_D
CS_B ENABLE
RESET_B
FAULT
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
General Product Characteristics
General Product Characteristics
Maximum Ratings
Absolute Maximum Ratings
+150 voltages with respect ground, positive current flowing into (unless otherwise
specified) Pos. Voltages 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.1.7 4.1.8 Currents 4.1.9 4.1.10 4.1.11 4.1.12 4.1.13 4.1.14 Input Clamp Current Storage Temperature Junction Temperature pins corner pins Battery Input (VBAT) Supply Voltage (logic) POSx, NEGx POSx-NEGx OUTx Parameter Symbol Limit Values Min. Max. min(V5D+ 0.3; min(V5D+ 0.3; Unit Conditions
VBAT V5D,V5A, Vsignal Vpos, Vneg Vpos-Vneg Vout
-0.3 -0.3 -0.2 -0.3 -0.3 -0.3 -500
RESET_B, SCK, CS_B, CLK, TEST, PHASE_SYNC, ENABLE FAULT Maximum difference between
min(Vsignal 0.3;
ICLAMP Tstg
-500 -750
Temperatures
Susceptibility
subject production test, specified design. Susceptability according EIA/JESD 22-A 114B Susceptability according EIA/JESD22-C101
Note: Stresses above ones listed here cause permanent damage device. Exposure absolute maximum rating conditions extended periods affect device reliability. Note: Integrated protection functions designed prevent destruction under fault conditions described data sheet. Fault conditions considered "outside" normal operating range. Protection functions designed continuous repetitive operation.
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
General Product Characteristics
Functional Range
+150 voltages with respect ground, positive current flowing into (unless otherwise specified)
Pos. 4.2.1 Parameter Supply Voltage (VBAT) Full Parametric Operation functions except Pre-drivers Supply Voltage (V5D) Symbol Min. Limit Values Max. Unit Conditions
VBAT
4.2.2 4.2.3 4.2.4 4.2.5 4.2.6 4.2.7
VV5D Supply Voltage (V5A) VV5A V_SIGNAL VV_SIGNAL Clock Frequency fCLK Frequency fPWM Common Mode Voltage POSx, Vpos ,Vneg
NEGx pins
4.75 4.75
5.25 5.25 5.25 4000
Note: Within functional range operates described circuit description. electrical characteristics specified within conditions given related electrical characteristics table.
Thermal Resistance
+150 voltages with respect ground, positive current flowing into (unless otherwise specified)
Pos. 4.3.1 Parameter Symbol Min. Junction Ambient RthJA Limit Values Typ. Max.
Unit
Conditions
Specified RthJA value according natural convestion 2s0p board; Product (Chip Package) simulated 60.0 45.0 X1.5 board 70um).
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
Functional Description Electrical Characteristics
Note: listed characteristics ensured over operating range integrated circuit. Typical characteristics specify mean values expected over production spread. otherwise specified, typical characteristics apply given supply voltage.
Supply Reference
device includes power-on reset circuit. This feature will disable channels reset internal registers their default values when voltage and/or below their respective reset thresholds. GND_D supply ground pins digital circuit blocks OUTx driver circuits. current through these pins contain high frequency components. Decoupling with ceramic capacitors careful layout required obtain good performance. GND_A supply ground pins analog circuit blocks. V_SIGNAL supplies output (SO) source voltage pull currents CS_B RESET_B pins. V_SIGNAL should connected supply microcontroller (3.3V 5.0V). input used detect over voltage faults. This power supply input. series resistor should connected between this solenoid supply voltage transient protection. Electrical Characteristics: 4.75V 5.25V, Vbat 5.5V 42V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.1.1 Parameter Undervoltage reset (internally triggered) Symbol Min. Limit Values Typ. Max. Internal reset occurs under undervoltage limit Internal reset occurs under undervoltage limit Unit Conditions
VV5A
5.1.2
Undervoltage reset (internally triggered)
VV5D
5.1.3 5.1.4 5.1.5
supply current supply current V_SIGNAL supply current
IV5D IV5A IV_SIGNAL
fCLK=20MHz fCLK=40MHz
hi-Z state, digital inputs default state full operating range
V5A=5V, BAT=14V1) V5A=0V, BAT=14V1)
5.1.6
VBAT current
IVBAT
subject production test, specified design.
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
Input Output
digital inputs compatible with logic levels. supply voltage output V_SIGNAL pin. digital inputs pulled known state weak internal current source current sink when connected. However, unused digital input pins should connected ground V_SIGNAL (according desired functionality) external connection resistor. input weak internal current sources supplied V_SIGNAL pin. RESET_B active input pin. When this low, channels off, internal registers reset their default states. device must held reset external source until power supplies have stabilized. contains internal power undervoltage reset which becomes active when fall below undervoltage reset threshold (VUVA, VUVD). ENABLE active high input which must held high normal operation device. When this held channels either turned will remain last state, depending enable behavior channel programmed SPI. default condition that channels turned when ENABLE low. main clock input device. input thresholds compatible with logic levels. synchronization required between clock signal connected clock signal (SCK). frequencies operation (PWM signals, sampling, diagnostics, etc.) based this clock input. Also, this clock required order device accept respond messages.
VILmax
Figure
Timing Diagram
PHASE_SYNC input that used microcontroller synchronize control signals multiple channels. desired phase delay between rising edge signal applied PHASE_SYNC rising edge signal each channel programmed independently message equation calculating offset
Toffset
PhaseSynchOffset FPWM
Each time phase sequence occurs, will latch which reported response message #11. (See interface section bit/message location.) This latch cleared when message read. Note: periods restarted when rising edge detected PHASE_SYNC pin. periodic pulse train this will disturb current regulation.
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
normal turn time gate turns on-time short
OUTx
PWM/32
Programmed delay 8/32 periods
PHASE_SYNC
Figure
Phase Synchronization Diagram
TEST input that used during level test. This should connected directly ground normal device operation. FAULT open drain output pin. This will pulled device when unmasked fault been detected. fault masks programmed message Electrical Characteristics: 4.75V 5.25V, Vbat 5.5V 42V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.2.1 5.2.2 5.2.3 5.2.4 5.2.5 Parameter Logic input voltage Logic input high voltage Logic output voltage Logic output high voltage Pull down digital input (SI, CLK, SCK, PHASE_SYNC, ENABLE, TEST) Pull digital input (CS_B, RESET_B) Fault voltage high time (rise 2.0V fall 2.0V) Symbol Min. Limit Values Typ. Max.
SIGNAL
Unit
Conditions
VILMAX VIHMIN VOLMAX VOHMIN
0.8*V_
IL=200µA IL=-200µA Vin=V_SIGNAL (current drain ground) Vin=0V (Current drain from V_SIGNAL)
Active state;
5.2.6
Vfault
5.2.7 5.2.8 5.2.9
Ifault=2mA
time (fall 0.8V rise 0.8V)
Diagnostics
TLE7242 includes both on-state off-state diagnostics. On-state diagnostics active when OUTx driven high off-state diagnostics active when OUTx driven low. detected fault used activate open drain FAULT This used interrupt microcontroller when
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics fault detected. Certain faults prevented from activating FAULT setting fault mask register message Once fault detected latched into FAULT register. microcontroller access FAULT register sending message RESET_B line transitions high-to-low, latched into FAULT register. register cleared after read from SPI. FAULT register will again until next high-to-low transition occurs RESET_B pin. ENABLE voltage low, latched FAULT register. cleared when ENABLE returns high state FAULT register accessed message diagnostic delay timers on-state off-state diagnostic functions derived from master clock signal applied using programmable predivider. This predivider programmable bits message Table Timebase Diagnostics Pre-divider Tested Timer Fault Detection Timer Period. FCLK=20 µsec µsec µsec µsec FCLK=40 µsec µsec µsec µsec
DIAG PERIOD
fault predivider FCLK
fault
Three fault types different fault bits defined: fault fault detected. Table Fault Type Short Ground Fault Short Battery Fault Open Load Fault Diagnostic Flags Bits Abr. Gate OL-ON-F reported ON/OFF mode) SB-F OL-ON-F ON/OFF mode) OL-OFF-F Gate SG-F
Note: order differentiate between Short Ground Failure Open Load Failure, channel must turned (setpoint 0ma). Tested Diagnostic Bits tested bits allow distinction between true Fault Fault untested state (the detection interval occur). instance when calculated duty cycle complete short battery test.
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics fault tested bits defined: tested when fault test completed successfully. Table Diagnostics Tested Bits Flags OUTx High OUTx OFF-T SB-T
Tested Type Short Ground Open load tested Short Battery tested
Each fault type described bits: FAULT TESTED. Table FAULT FAULT TESTED Bits Matrix Interpretation TESTED Interpretation microcontroller This fault type been tested Fault fault type been tested fault present This combination cannot occur Fault This particular fault type occurred
Divider Select (SPI register)
read fault register
Predivider
Masterclock 1:128 1:192 1:256
Tested timer 1.10 (shared) clear
SG-F (Short Ground Fault)
LOGIC
OFF-T (Short Ground Open Load Tested)
fault filter timer (1.10) (shared)
clear clear clear
SB-F (Short Battery Fault) OL-OFF-FD
VPOS VPOS VPOS
digital filter
OL-FA open load (only while OFF)
SG-FD SB-FD OL-ON-F
SB-T (Short Battery Tested)
OL-OFF-F (Open Load Fault)
digital filter
SG-FA short ground (only while OFF)
OL-ON-F (Open Load Fault)
digital filter
SB-FA short battery (only while
mode enabled Start Gate
Gate Counter 1.64
Figure
Diagnostic Block Diagram
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.3.1
On-State Diagnostics
When OUTx transitions high, fault timers cleared tested timer starts. tested timer expires, SB-T register OUTx transitions low, tested timer cleared then used off-state diagnostics. analog fault signal (SB-FA) changes fault filter timer starts. fault filter timer expires, digitally filtered fault signal (SB-FD) one. SB-FA changes SB-FD changes immediately filter timer cleared SB-FD=1 SB-T=1 switches OUTx signal SB-F FAULT register will set. OUTx remains state until fault retry period counter expires. fault register read, then SB-F SB-FT FAULT register cleared. Also, tested timer cleared Short Battery (SB) detection functions both on/off constant current mode. SG-FD OL-OFFFD signals held while OUTx high. TLE7242 ON/OFF mode, Open Load detection disabled (OL-ON-F TLE7242 ON/OFF mode OUTx high periods, then open load fault mode detected OL-ON-F FAULT register set. This will cleared when fault read occurs. OUTx remains high state, then open load fault condition detected again after another cycles.
PWM_Start
OUTx Fault Retry Time (Address Tested Timer SB-T Tested Timer
short Load
Vpos
SB-F
Fault Filter
Fault Filter
Load Current
READ ADDR
Short Vbat
Figure On-State Diagnostic Timing Short Vbat
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
PWM_Start
OUTx
Vpos period OL-ON-F Message Diagnostic Read
Figure
Open
5.3.2
Off-State Diagnostics
off-state diagnostics function both constant current mode on/off mode. When OUTx transitions low, fault timers cleared tested timer starts count tested timer expires, OFF-T FAULT register set. fault register read occurs, tested timer cleared starts again count OUTx transitions high, tested-timer cleared zero then used on-state diagnostics. analog fault signal (OL-FA) changes fault filter timer starts count fault filter timer expires, digitally filtered fault signal (OL-ON-FD) one. OL-FA changes OL-FD changes immediately fault filter timer cleared analog fault signal (SG-FA) changes fault filter timer cleared starts count fault filter timer expires, digitally filtered fault signal (SG-FD) one. SG-FA changes SG-FD changes immediately fault filter timer cleared SG-FD tested timer expired then SG-F FAULT register OL-OFF-F FAULT register remains unchanged (independently from OL-OFF-FD). SG-FD OL-OFF-FD then OL-F FAULT register set. fault read occurs, OFF-T Bit, SG-F OL-F registers cleared zero (and timers cleared
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
SUPPLY
(Vol+Vsg)/2 (2.5V)
Ipu(sg) (100ua)
POSx Ipd(ol) (100ua) NEGx
Cpos
SG/OL-OFF TESTED
latch
Tested Timer (OFF)
OL-OFFFAULT
OL-OFF-FD
latch
Digital Filter
OL-FA
(3V)
SGFAULT
latch
SG-FD
Digital Filter
SG-FA
OUTx (2V)
Figure
Off-State Diagnostics
OUTx
OFF-T
open
Tested
Tested
LOAD
OL-O FF-F essage Diagnostic Read
Fault Filter
Fault Filter
Figure
Off-State Diagnostics Timing Diagram open
Data Sheet
Solenoid
Cneg
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
OUTx
OFF-T
Short ground
Tested Timer
Tested Timer
LOAD
SG-F
Fault Filter
Fault Filter
READ ADDR
Figure
Off-State Diagnostics Timing Diagram short ground
Over voltage Shutdown Diagnostics voltage above VBATOV, output drivers OUTx pins low, diagnostic (SPI Message OVL). During over voltage condition integrator steady state current control halted (actual value duty cycle changed during over voltage). other functions operate normally (e.g. ADC, Dithering, Auto zero, Filters, Electrical Characteristics: 4.75V 5.25V, Vbat 5.5V 42V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 5.3.6 5.3.7 Parameter Over voltage shutdown Open load detection voltage pull down current Short detection voltage pull-up current Symbol Min. Limit Values Typ. Max. Raise VBAT until outputs shut down V5A=5V, VPOS=VNEG=V5A V5A=5V, VPOS=VNEG=0V V5A=5V, VPOS=VNEG=0V V5A=5V, VPOS=VNEG=V5A Unit Conditions
VBATOV VPOS(OL) IPD(OL)
V5A-2.5
V5A-1.5
VPOS(SHG) V5A-3.5 IPD(SHG) -100
V5A-2.5 -150
bias current common INEG(L) mode bias current High common INEG(H) mode
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics 4.75V 5.25V, Vbat 5.5V 42V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.3.8 Parameter Fault Threshold Voltage Symbol Min. Limit Values Typ. Max. voltage required trigger short battery fault: config bits voltage required trigger short battery fault: config bits voltage required trigger short battery fault: config bits voltage required trigger short battery fault: config bits Clock Divider (SPI Message Predivider Predivider Predivider Clock Divider (SPI Message Predivider Predivider Predivider Unit Conditions
VFLT
5.3.9
Fault Threshold Voltage
VFLT
5.3.10
Fault Threshold Voltage
VFLT
5.3.11
Fault Threshold Voltage
VFLT
5.3.12 5.3.13
Fault Filter Timer Fault Filter Time
nfault
clocks
fault predivider
5.3.14 Tested Timer Time
fault predivider
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
Output Driver
OUTx pins device connected gates external MOSFET transistors. OUTx driver circuits charge discharge MOSFET gate capacitance with constant current source sink. supply current source pin. Internal resistors ground included OUTx pins that external MOSFET held state when power applied device. external resistor typically placed between OUTx gate external MOSFET order MOSFET turn-on turn-off times. value resistor must chosen such that turn-on turnoff times MOSFET longer than 1/(Fpwm*32). Electrical Characteristics: 4.75V 5.25V, Vbat 5.5V 42V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.4.1 Parameter Passive Gate Pull Down Resistance OUTx source current OUTx sink current Symbol Min. Limit Values Typ. Max. Internal pull down resistor present each OUTx VOUT V5D-2V VOUT Unit Conditions
5.4.2 5.4.3
IO_SRC IO_SNK
Current Control
Electrical Characteristics: 4.75V 5.25V, Vbat 5.5V 42V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.5.1 Parameter Offset Error Output from Average block Figure count 320/Rsense 2-14 Gain Error Symbol Min. Limit Values Typ. Max. counts Autozero disabled.VposVneg=0mV Vpos, Vneg Autozero Enabled.VposVneg=300mV Vpos, Vneg Unit Conditions
5.5.2
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
Serial Peripheral Interface (SPI)
messages TLE7242 32-bit values broken down into following fields. Read/Write Read Write Bits 30-26: Message Identifier Bits 25-24: Channel Number (00, Bits 23-0: Message Data message from microcontroller must sent first. data from sent first. TLE7242 will sample data from rising edge will shift data rising edge SCK. messages must exactly 32-bits long, otherwise message discarded. response invalid message (returned next message) message with identifier 00000 (Manufacturer ID). When ENABLE low, writes commands executed read commands. When RESET_B low, port disabled. messages received responses sent. remains high impedance state. There message delay response each message (i.e. response message will returned during message N+1). Read/Write operation referenced from master. TLE7242 slave device. Some messages, such diagnostic information, channel number field. these cases channel number part response. When denote read operation message data bits 23-0 sent message ignored, will contain valid data response message. response data (either from read write operation) direct contents addressed internal register, echo data sent previous message. response first message after reset message Version Manufacturer).
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.1
Signal Description
Electrical Characteristics: 4.75V 5.25V, Vbat 5.5V 42V, +150 voltages with respect ground, positive current flowing into (unless otherwise specified) Pos. 5.6.1 5.6.2 Parameter TLEAD TLAG Symbol Min. Limit Values Typ. Max. CS_B falling (0.8V) rising (0.8V) falling (0.8V) CS_B rising (0.8V) CS_B rise (2.0V) CS_B fall (2.0V) rise rise falling (0.8V) CS_B fall (2.0V) high time (rise 2.0V fall 2.0V) time (fall 0.8V rise 0.8V) CS_B rise (2.0V) rise (0.8V) setup time rise (0.8V) hold time after rise (2.0V) CS_B fall (2.0V) Bit0 valid data valid after rise (2.0V) tristate after CS_B rise (2.0V) Unit Conditions
5.6.3 5.6.4 5.6.5 5.6.6 5.6.7 5.6.8 5.6.9 5.6.10 5.6.11 5.6.12 5.6.13 5.6.14 5.6.15 5.6.16 5.6.17 5.6.18 TSU_SI THOLD_SI TSO_ENABLE TVALID TSO_DISABLE Number clock pulses while CS_B rise time fall time Input capacitance. CS_B, capacitance 1/FSCK Period
TSO_RISE TSO_FALL
(20% 80%) (80% 20%)
Tristate
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
CS_B
time
don't care
clock
clock
clock
clock
clock
don't care
time
don't care
don't care
time
high impedance time
Figure
high impedance
don't care
Timing Diagram
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2 5.6.2.1
Message Structure Message Version Manufacturer
Reset Value:
Sent Values: Version Manufacturer
MSG_ID
used
used
Field
Bits
Type
Description Read Write Read Write Message Identifier 0000 Version Manufacturer
MSG_ID
30:26
Response: Version Manufacturer
MSG_ID
Reset Value:
Manuf
Version Number
Field MSG_ID Manuf Version Number
Bits 30:26 16:23 8:15
Type
Description Message Identifier 0000 Version Manufacturer Manufacturer Number 1100 0001= Infineon Technologies Version Number 0000 0010
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.2
Message Main Period
Reset Value:
MSG_ID
Sent Values: Main Period
unused
used
Divider
Field
Bits
Type
Description Read Write Read Write Message Identifier 0001 Main Period Channel Number Divider
MSG_ID Channel
30:26 25:24 13:0
Response: Main Period
MSG_ID
Reset Value:
Divider
Field MSG_ID Channel
Bits 30:26 25:24 13:0
Type
Description Message Identifier 0001 Main Period Channel Number Divider
FPWM
FCLK
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.3
Message Offset
Reset Value:
MSG_ID
Sent Values: Offset
unused
used
Phase Sync Offset
Field
Bits
Type
Description Read Write Read Write Message Identifier 0010 Offset Channel Number Phase Synch Offset
MSG_ID Channel
30:26 25:24
Phase Synch Response: Offset
MSG_ID
Reset Value:
Phase Sync Offset
Field MSG_ID Channel
Bits 30:26 25:24
Type
Description Message Identifier 0010 Offset Channel Number Phase Synch Offset
Phase Synch
Toffset
PhaseSynchOffset FPWM
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.4
Dither
Message Current Point Dither Amplitude
Sent Values: Current Point Dither Amplitude
MSG_ID
Reset Value:
Dither Step Size
Dither
Dither Step Size
Current Point
Field
Bits
Type
Description Read Write Read Write Message Identifier 0011 Current Point Dither Amplitude Channel Number Sets behavior channel when ENABLE low. channel turned channel remains last current point. Used when channel configured on/off operation Dither Step Size (LSB value Current point LSB) Dither Enable 0=Disabled 1=Enabled Average Current Point Resolution 0.78125 when external resistor used.
MSG_ID Channel
30:26 25:24
ON/OFF
Step Size Dither ON/OFF Current Setpoint
21:12 10:0
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics Response: Current Point Dither Amplitude
MSG_ID
Reset Value:
Dither Step Size
Dither
Dither Step Size
Current Point
Field MSG_ID Channel
Bits 30:26 25:24
Type
Description Message Identifier 0011 Current Point Dither Amplitude Channel Number Sets behavior channel when ENABLE low. channel turned channel remains last current point. Used when channel configured on/off operation Dither Step Size (LSB value Current point LSB) Dither Enable 0=Disabled 1=Enabled Average Current Point Resolution 0.78125 when external resistor used.
ON/OFF
Step Size Dither ON/OFF Current Setpoint
21:12 10:0
Ditheramplitude [mApp]
DitherStepSize DitherSteps RSENSE
Dither amplitude peak peak amplitude dither waveform. Note: actual dither waveform attenuated phase shifted according frequency response control loop. Dither Steps number periods dither waveform, message RSENSE value external sense resistor
Current setpoint [mA]
Setpoint SENSE
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.5
Message Dither Period
Reset Value:
MSG_ID
Sent Values: Dither Period
unused
used
Dither Steps
Field
Bits
Type
Description Read Write Read Write Message Identifier 0100 Dither Period Channel Number Dither Steps Dither Steps dither waveform period.
MSG_ID Channel Dither Steps
30:26 25:24
Response: Dither Period
MSG_ID
Reset Value:
Dither Steps
Field MSG_ID Channel Dither Steps
Bits 30:26 25:24
Type
Description Message Identifier 0100 Dither Period Channel Number Dither Steps Dither Steps dither waveform period.
DitherPeriod [sec]
DitherSteps FPWM
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.6
Message Control Variable
Reset Value:
Sent Values: Control Variable
MSG_ID
Field
Bits
Type
Description Read Write Read Write Message Identifier 0101 Control Variable Channel Number Proportional Coefficient Integral Coefficient
MSG_ID Channel
30:26 25:24 23:12 11:0
Response: Control Variable
MSG_ID
Reset Value:
Field MSG_ID Channel
Bits 30:26 25:24 23:12 11:0
Type
Description Message Identifier 0101 Control Variable KI)t Channel Number Proportional Coefficient Integral Coefficient
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics duty cycle OUTx calculated from difference equations:
Rsense error Rsense error DutyCycle
where error difference between commanded average current measured average current units Amps, where indicates integral number periods that have elapsed since current regulation initiated.
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.7
Message Dynamic Threshold Value
Reset Value:
unused
Sent Values: Dynamic Threshold Value Set)
MSG_ID
Transient Mode Threshold
Transient Mode Threshold
Integrator Preload Value
Field
Bits
Type
Description Read Write Read Write Message Identifier 0110 Dynamic Threshold Value Channel Number Transient Mode Threshold Setpoint changes grater than this threshold will activate transient mode operation. Integrator Preload Value This value will loaded into integrator when controller transitions from transient mode steady state mode.
MSG_ID Channel
30:26 25:24
Transient 22:12 Mode Thresh Int. Preload 11:0
Response: Dynamic Threshold Value
MSG_ID
Reset Value:
Transient Mode Threshold
Transient Mode Threshold
Integrator Preload Value
Field MSG_ID Channel
Bits 30:26 25:24
Type
Description Message Identifier 0110 Dynamic Threshold Value Channel Number
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics Field Bits Type Description Transient Mode Threshold Setpoint changes grater than this threshold will activate transient mode operation. Integrator Preload Value This value will loaded into integrator when controller transitions from transient mode steady state mode. Transient 22:12 Mode Thresh Int. Preload 11:0
CurrentThreshold [mA]
TransientModeThreshold RSENSE
Preload IntPreloadValue Current Point
Preload value limited maximum value
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.8
Message On/Off Control Fault Mask Configuration
Reset Value:
Sent Values: On/Off Control Fault Mask Configuration
MSG_ID
unused
Disable
unused
DIAG_TMR
Field
Bits
Type
Description Read Write Read Write Message Identifier 0111 On/Off Control Fault Mask Configuration Control Mode Channel Current Control On/off Fault Mask Channel faults don't trigger FAULT fault triggers FAULT Fault Mask RESET_B state ENABLE does activate FAULT pin. state ENABLE does activate FAULT pin. Note: when high transition detected ENABLE pin, ENABLE fault will latched until ENABLE returns high diagnostic read message received. Fault Mast ENABLE state RESET_B does activate FAULT pin. state RESET_B does activate FAULT pin. Diagnostic Timer TIME_1 pre-divider TIME_2 pre-divider TIME_2 pre-divider TIME_3 pre-divider Auto-Zero Disable Auto-Zero Enabled Auto-Zero Disabled
MSG_ID
30:26
DIAG_TMR
13:12
Disable
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics Response: On/Off Control Fault Mask Configuration
MSG_ID
Reset Value:
Disable
DIAG_TMR
Field MSG_ID
Bits 30:26
Type
Description Message Identifier 0111 On/Off Control Fault Mask Configuration Control Mode Channel Current Control On/off Fault Mask Channel faults don't trigger FAULT fault triggers FAULT Fault Mask RESET_B state ENABLE does activate FAULT pin. state ENABLE does activate FAULT pin. Note: when high transition detected ENABLE pin, ENABLE fault will latched until ENABLE returns high diagnostic read message received. Fault Mask ENABLE state RESET_B does activate FAULT pin. state RESET_B does activate FAULT pin. Diagnostic Timer TIME_1 pre-divider TIME_2 pre-divider TIME_2 pre-divider TIME_3 pre-divider Auto-Zero Disable Auto-Zero Enabled Auto-Zero Disabled
DIAG_TMR
13:12
Disable
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.9
Message Diagnostic Configuration
Reset Value:
Sent Values: Diagnostic Configuration
MSG_ID
unused
SB_RETRY0
SB_RETRY1
SB_RETRY2
SB_RETRY3
Field
Bits
Type
Description Read Write Read Write Message Identifier 1000= Diagnostic Configuration Short Battery Threshold Short Battery Retry Time Retry after SB_RETRY periods
MSG_ID
30:26 23:22 17:16 11:10
SB_RETRYx 21:18 15:12 Response Values: Diagnostic Configuration
MSG_ID
Reset Value:
SB_RETRY0
SB_RETRY1
SB_RETRY2
SB_RETRY3
Field MSG_ID
Bits 30:26
Type
Description Message Identifier 1000= Diagnostic Configuration
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics Field Bits 23:22 17:16 11:10 Type Description Short Battery Threshold Short Battery Retry Time Retry after SB_RETRY periods
SB_RETRYx 21:18 15:12
Retry Period
SB_Retry
SB_RETRY field programmed value short battery retry period identical programmed period programmed message
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.10
Message Diagnostic Read
Reset Value:
MSG_ID
Sent Values: Diagnostic Read
unused
unused
Field
Bits
Type
Description Read Write Read Write (interpreted read) Message Identifier 1001 Diagnostic Read
MSG_ID
30:26
Response Values: Diagnostic Read
MSG_ID OFFTST0 OLON0
Reset Value:
OFFTST1 SBTST1
SBOLTST0 OFF0
OLOFF1
OLON1
OFFTST2
OLON2
OFFTST3
OLON3
SBOLTST2 OFF2
SBOLTST3 OFF3
Field MSG_ID OFF-TSTx SB-TSTx OL-OFFx OL-ONx Data Sheet
Bits 30:26 25,19,13,7 24,18,12,6 23,17,11,5 22,16,10,4 21,15,9,3 20,14,8,2
Type
Description Message Identifier 1001= Diagnostic Read (channel 0-3) Short Ground Fault Short Ground Open Load (Gate Off) Tested Short Battery Fault Short Battery Tested Open Load (Gate Off) Fault Open Load (Gate Fault Enable Latch Reset_B Latch Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.11
Message Current Read
Reset Value:
MSG_ID
Sent Values: Current Read
unused
unused
Field
Bits
Type
Description Read Write Read Write (interpreted read) Message Identifier 1010 Current Read Channel Number
MSG_ID Channel
30:26 25:24
Response Values: Current Read
MSG_ID
Reset Value:
Current Read
Field MSG_ID Channel
Bits 30:26 25:24
Type
Description Message Identifier 1010 Current Read Channel Number Current Read
Current Read 13:0
CurrentRead [mA]
CurrentRead RSENSE
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.12
Message Autozero Read
Reset Value:
MSG_ID
Sent Values: Autozero Read
unused
unused
Field
Bits
Type
Description Read Write Read Write (interpreted read) Message Identifier 1011 Autozero Read Channel Number
MSG_ID Channel
30:26 25:24
Response Values: Autozero Read
MSG_ID
Reset Value:
AZon AZoff
Autozero (on) value
Autozero (off) value
Field MSG_ID Channel
Bits 30:26 25:24
Type
Description Message Identifier 01011 Autozero Read Channel Number Overvoltage latch This latch when voltage exceeds overvoltage threshold. latch reset when voltage below threshold Autozero Read message received.
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics Field Bits Type Description Phase sync latch This latch when rising edge occurs PHASE_SYNC pin. latch reset when Autozero Read message received. Autozero (on) occurred This latch when autozero sequence completed with common mode input voltage. latch reset when Autozero Read message received Autozero (off) occurred This latch when autozero sequence completed with high common mode input voltage. latch reset when Autozero Read message received Autozero (on) value stored Autozero value used when common mode voltage low. Autozero (off) value stored Autozero value used when common mode voltage high
(on) value 11:6
(off) value
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Functional Description Electrical Characteristics
5.6.2.13
Message Duty Cycle Read
Reset Value:
MSG_ID
Sent Values: Duty Cycle Read
unused
unused
Field
Bits
Type
Description Read Write Read Write (interpreted read) Message Identifier 1100 Duty Cycle Read Channel Number
MSG_ID Channel
30:26 25:24
Response Values: Autozero Read
MSG_ID
Reset Value:
Duty Cycle
Duty Cycle
Field MSG_ID Channel Duty Cycle
Bits 30:26 25:24 18:0
Type
Description Message Identifier 1100 Duty Cycle Read Channel Number Duty Cycle Duty cycle output selected channel.
Duty Cycle
DutyCycle
Data Sheet
Rev. 1.0, 2008-07-09
TLE7242-2G
Application Information
Application Information
Note: following information given hint implementation device only shall regarded description warranty certain functionality, condition quality device.
VBAT
VBAT
10nF 47uF
Digital
100pF 100nF
POS0 NEG0
GND_D
Power Supply e.g. TLE6368
Analog
OUT0
SPD15N06S2L-64
10nF VBAT
10nF
+3.3V Voltage Level)
V_SIGNAL
10nF
POS1 NEG1
OUT1
SPD15N06S2L-64
10nF VBAT
PORTS
FAULT ENABLE PHASE_SYNC RESET_B
TLE7242-2G
CLOCK
POS2 NEG2
PERIPHERAL
µController TC1766 (AUDO-NG)
OUT2 CS_B POS3 NEG3 OUT3
SPD15N06S2L-64
10nF VBAT
TEST
SPD15N06S2L-64
10nF
Figure
Application Diagram
Note: This very simplified example application circuit. function must verified real application.
Further Application Information
Please contact FMEA further information contact http://www.infineon.com/
Data Sheet
Rev. 1.0, 2008-07-09
On/Off Solenoid
Constant Current Solenoid
Constant Current Solenoid
GND_A
Constant Current Solenoid
TLE7242-2G
Package Outlines
Package Outlines
Figure
PG-DSO-28-26
Green Product (RoHS-compliant) meet world-wide customer requirements environmentally friendly products compliant with government regulations device available green product. Green products RoHS-Compliant (i.e Pbfree finish leads suitable Pb-free soldering according IPC/JEDEC J-STD-020).
find packages, sorts packing others Infineon Internet Page "Products": Data Sheet
Dimensions Rev. 1.0, 2008-07-09
TLE7242-2G
Revision History
Revision History
Date July 2008 Changes Release datasheet
Version
Data Sheet
Rev. 1.0, 2008-07-09
Edition 2008-07-09 Published Infineon Technologies 81726 Munich, Germany 2009 Infineon Technologies Rights Reserved. Legal Disclaimer information given this document shall event regarded guarantee conditions characteristics. With respect examples hints given herein, typical values stated herein and/or information regarding application device, Infineon Technologies hereby disclaims warranties liabilities kind, including without limitation, warranties non-infringement intellectual property rights third party. Information further information technology, delivery terms conditions prices, please contact nearest Infineon Technologies Office (www.infineon.com). Warnings technical requirements, components contain dangerous substances. information types question, please contact nearest Infineon Technologies Office. Infineon Technologies components used life-support devices systems only with express written approval Infineon Technologies, failure such components reasonably expected cause failure that life-support device system affect safety effectiveness that device system. Life support devices systems intended implanted human body support and/or maintain sustain and/or protect human life. they fail, reasonable assume that health user other persons endangered.

TLE7242-2G Channel Fixed Frequency Constant Current Control

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