PolarPAK Solder Joint Reliability Based Thermal Fatigue IPC-9701

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PolarPAK Solder Joint Reliability Based Thermal Fatigue IPC-9701

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AN610
PolarPAK Solder Joint Reliability Based Thermal Fatigue IPC-9701
Kandarp Pandya ABSTRACT PolarPAK, thermally enhanced package from Vishay Intertechnology, facilitates MOSFET heat removal from exposed metal lead-frame connected drain surface addition source lead-frame connected PCB. Figures
Figure Bottom View PolarPAK
Figure View PolarPAK
new-generation package like PolarPAK, imperative examine solder joint reliability. IPC-9701[1] guidelines implemented design temperature cycling. latter induces thermal fatigue solder joints, which turn enables study solder joint reliability. design experiment (DOE) consists phases. first phase process development discussed application note titled "Development Lead-free soldering profile PolarPAK"[2] application note describes design, process variables, process development methodology, concludes defining recommended process.
second phase also follows IPC-9701 guidelines, comprising assembling device samples study solder joints under thermal fatigue induced temperature cycling test. assemblies were done third-party vendor, contract-manufacturing facility. Current industrystandard assembly practices equipment setups were used development. This insures smooth implementation results manufacturing practices. assembly process recommendations derived aforesaid application note were used lead-free solder paste. latter includes other process variables such stencil designs parameters solder paste applicator machines part pick-and-place machines. Ramp-soak-spike (RSS) profiles both varieties solder pastes were used. First, visual inspection used check obviously faulty solder joints. Both laminography X-ray transmission X-ray equipment were used data collection analysis. thermal fatigue comprises 3,000 temperature cycles from component sample size 32+10 (re-work) defined IPC-9701. Event recording monitoring solder joint resistances each daisy chain joint each cycle identifies failure point solder joint. primary benchmark IPC-9701 failure occurs before 3,000 temperature cycles, which case part qualifies solder joint reliability.
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PHASE (I): design: worst-case design selected this experiment, using FR-4 board designed with layers 3.175-mm [0.125-in.] thickness IPC-9701 guidelines. Refer Figure more information. layer stack comprised outer copper layers [0.5 oz.] inner copper layers [0.5 oz.]. Each insulation layer FR-4 between [7,709 µin.]. Appendix covers specifications. this experiment, immersion silver board finish used recommendations from external contract manufacturers. connection from termination enters right drain where first solder joint formed between right drain pin. internal inverted structure connects drain pins. turn, daisy chain connection continues second drain left side. second solder joint daisy chain formed between left drain PCB. daisy chain continues trace gate second from left where third solder joint formed. special modification part provides internal connection between gate source pins. fourth solder joint formed source, large metal slug third from left, PCB. trace running from source connection completes daisy chain. When monitoring resistance daisy chain, solder joints PolarPAK device studied thermal stress effects, including possible resulting solder joint failures. Furthermore, three white square test pads shown Figure facilitate resistance measurement each solder joint. recommended minimum layout shown Figure used layout. Refer Vishay site up-to-date information.
Core (7.709mil) TopLayer ((No Net)) ((No Net)) ((No Net)) ((No Net)) ((No Net)) ((No Net)) ((No Net)) ((No Net)) BottomLayer Prepreg (10.031 Core (7.709mil) Prepreg (10.031 Core (7.709mil) Prepreg (10.031 Core (7.709mil) Prepreg (10.031 Core (7.709mil) Prepreg (10.031 Core (7.709mil) Prepreg (10.031 Core (7.709mil) Prepreg (10.031 Core (7.709mil)
Figure Layer-Stack
alternate signal, power, ground plane from both sides have 40%, 70%, copper coverage, respectively, each layer. Horizontal vertical strips controlled width spacing determine percentage copper coverage. concept daisy chain layout PolarPAK followed from Figure
Figure Recommended Minimum Layout
dimensions governed form factor required temperature cycling setup. Accordingly, 16-pin edge connector termination used facilitate connection setup.
Figure Daisy Chain Layout PolarPAK
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accommodate eight PolarPAK packages (see Figure Appendix covers fabrication details. PCBA characteristics: Surface finish: Immersion silver Board thickness: 3.175 [0.125 in.] Board size: Each side designed accommodate types parts. Part #SMDTF125T16L_Ver accommodates PolarPAK PowerPAK SO-8 single ext. assembly: test sample build determined IPC-9701, which calls fresh reworked solder joint assemblies. Seven boards with seven parts each board gives assembled parts. Reworking parts from boards renders reworked parts. Five boards from reworked group seventh non-reworked board temperature cycling were used meet IPC-9701 criteria. sixth reworked board retained zero temperature cycle reference board. Using assembly process developed described AppNote AN-xxx titled "Development Lead-free soldering profile PolarPAK"[2] seven PCBs were assembled with seven PolarPAK parts each board. Part assembled. Assembly process parameters: Stencil aperture opening: Increase aperture increase from original size used Aperture shape size, stencil thickness, aspect ratio described following table:
Stencil thickness (mil) 189.2 189.2 189.2 Aspect ratio Area ratio Component shape POLARPAK 5.04 4.20 18.90 2.22 1.89 6.30
Figure: Dimensions
Version
Aperture shape
Aperture opening Width (mils) Length (mils) 25.2 21.0 94.5
Rectangle Rectangle Rectangle
Aspect ratio (aperture opening stencil thickness) Minimum area ratio (LxW 2(L+W)T) Solder pastes: following solder paste used: Lead-free solder paste SAC-387 (Tamura TLF-20693G)
Stencil printing: Machine: EKRA Squeegee size angle: Front/rear pressure: Newtons Print speed: 8-12 mm/s Snap off: Separation speed: mm/s Stencil thickness: mils Stencil opening: Table below
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Table Version Comp Type PolarPAK Buildt Profile Stencil Thickness mils Aperture Design Drain-Gate (mils) 189.2 Source 94.5 189.2
Pick place Machine: Juki 2060E Note: each board, leave first location empty load/part) Reflow Machine: Pyramax (seven heating zones cooling zones) nitrogen, only profile shown Figure used leadfree solder paste immediate reference, reflow process parameters used lead-free solder summarized below:
quantitative analysis. Appendix bestcase/worst-case void level X-ray images PolarPAK. Using these criteria, good solder assemblies were achieved with void levels less than 25%. Rework: Using worst-case locations from Xray inspection results, PCBs locations each board were selected marked with indelegable black rework. originally soldered part de-soldered replaced with part.
Table
Rework Locations Lead-Free Assemblies
Side Comp Type PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK Rework Location U10, U11, U12, U11, U13, Rework U10,
Board
Rework setup: AirVac DRS24 rework machine Special rework nozzle
Figure Profile Lead-Free Peak Temperature: Time above seconds Soak time (120 °C): seconds
Solder joint visual inspection criteria were derived from IPC-A-610D[4]; refer Appendix relevant details. visual inspection also included looking obvious solder joint defects such cold joint, solder bumps, bridges, other flaws. addition, X-ray X-ray processes were employed inspect void levels each solder joint. images were compared void level. During inspection focus number size voids. measurements were sorted selected based percentage void areas. first method, image review, qualitative comparison. second method, parametric data,
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Rework steps: Remove components using hot-air rework machine Clean pads using soldering iron Solder bump pads using soldering iron solder wire 305. Apply no-clean flux Place component using hot-air rework machine Reflow component using hot-air rework machine profiles shown below Figure
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Figure Rework Reflow Profile Rework Profile Part Removal, Lead-Free Peak temperature: 236.7 °CTime above seconds
Figure: Rework Reflow Profile Rework Profile Part Assembly, Lead-Free Peak temperature: 235.6 °CTime above seconds
Figure shows arrangement thermocouple during rework. thermocouples located rework part, close lead foot adjacent part, surface close rework location insure that actual part temperature limits never exceeded.
Table Profile Event/Cycle Preheat
Rework Machine Settings
Profile Top: Bottom: Time: Top: Flow: Bottom: Time: seconds Top: Flow: 50%Bottom: °CTime: seconds Top: Flow: 50%Bottom: °CTime: seconds 0.125 Profile Top: Bottom: Time: Top: Flow: Bottom: Time: seconds Top: Flow: Bottom: Time: seconds Top: Flow: Bottom: Time: seconds 0.05
Soak
Ramp
Reflow Nozzle Height
Figure Arrangement Thermocouple During Rework Thermocouple attachment locations rework profile (reworked location, package) (adjacent location, solder joint)U11 (adjacent location, solder joint)
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Rework results: Summary complete assembly: Solder release consistent amount voids this package range 30%, which includes noise generated during measurement complexity package lead-frame problem with rework Thermal fatigue test: This main phase DOE. this point work focused preparation. thermal fatigue testing comprised various steps: Test definition Test setup Temperature cycling chamber calibration Temperature cycling Test database Analysis result summary Test definition: Appendix brief summary thermal fatigue temperature cycling test definition guidelines derived from IPC-9701. Basically, each solder joint subjected 3,000 temperature cycles profile shown Figure
Temp Cycle
(max)
Figure Smallest Void After Rework Component Type: PolarPAK Board#: Location:
Temp Deg.C
(min)
Time Min.
Figure tolerance +/-5
Time Figure Largest void after rework Component Type: PolarPAK Board#: Location:
Temp
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solder joint failure occurs, detected comparing joint resistance recoded with respect cycle number which occurred. Test setup: programmable temperature cycling chamber programmed temperature cycle shown Figure test chamber pre-wired card-cage that could take multiple assemblies conforming card-cage form-factor. Each daisy chain connected analysis-tech event detector system. latter device compared, preset interval cycle time during dwell-time, resistance with preset value reported/recorded event time daisy chain resistance exceeded preset value. Thus, even momentarily open circuits were caught reported. Temperature cycling chamber calibration: temperature cycle chamber calibrated thermal mass test load measuring actual temperature profile pertinent locations assembly component. Figure shows calibrated profile used during actual testing.
Vishay Board 100°C min. ramp min. dwell
Test database final test results tabulated following table: Table 3,000-Cycle Test Data
Started 11/17/2004 Board Package PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PPAK SO8-EXT PPAK SO8-EXT PPAK SO8-EXT PPAK SO8-EXT PPAK SO8-EXT PPAK SO8-EXT Terminated 3/2/2005 Side Fail
Degrees
18:55
18:35
18:40
18:45
18:50
19:30
19:00
19:05
19:10
19:15
19:20
19:25
19:35
Time
Figure Calibration Profile
Temperature cycling: very first last steps temperature cycling test measurements daisy chain resistance. Appendix tabulated record each daisy chain resistance before after temperature cycling. first resistance column initial resistance second resistance column value after 3,000 cycles. assemblies were loaded temperature cycling chamber begin thermal fatigue test.
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Started 11/17/2004 Board Package PPAK SO8-EXT PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK Terminated 3/2/2005 Side Fail
Results summary
Table Package PolarPAK First Fail Failed Failed
above results show that PolarPAK package passes lead-free solder joint reliability test guidelines IPC-9701 REFERENCE: "Thermal fatigue analysis study solder joint reliability new-generation parts introduced Vishay Siliconix," Serge Jaunay Kandarp Pandya. IPC-9701 Standard Solder Joint Reliability, publication. "Voiding: Occurrence reliability issues with leadfree," Martin Wickham, NPL. IPC-A-610D Criteria Solder Joint Quality Inspection.
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Appendix POLARPAK X-Ray Images After assembly (without rework) Note: smallest voids based signal pins. images captured through 5DX. void measurement available because many false calls this component type.
Smallest void Board#: Location:
Smallest void Board#: Location:
Largest void Board#: Location:
Largest void Board#: Location:
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Smallest void Board#: Location:
Smallest void Board#: Location:
Largest void Board#: Location:
Largest void Board#: Location:
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Smallest void Board#: Location:
Smallest void Board#: Location:
Largest void Board#: Location:
Largest void Board#: Location:
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Smallest void Board#: Location:
Largest void Board#: Location:
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Appendix Layout SMD125T16L_Ver C_Side
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Appendix Fabrication Material: FR-4 Thickness: 3.175 [0.125 in.] Number copper layers: Nominal outer layer (top/bottom) thickness: [1378 µin.] Nominal inner layer thickness: [472 µin.] Nominal insulation layer thickness: 231.8 [7,709 µin.] Even internal layers from each side: Power ground coverage power/ground layers:70% coverage Signal trace: Min. outer layer trace width: [5906 µin.] Test pads each daisy chain provided Minimum 15-mm [0.6-in.] clearance around each part rework necessary removal failed part without damage adjacent part/trace Minimum large (drain) land pad:50% size: Pitch: [0.040 in.] Diameter: [0.012 in.] Solder mask encroachment these bottom side prevent solder from spreading bottom side. Square test size: [0.060 in.] Drill: [0.040 in.] Surface finish: (preferred)OSP (Organic Solderability Preservative) Silkscreen etch label components, test points, location mandated.
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Appendix Performance Reliability Solder Joints Vishay Siliconix Part Package PolarPAK Scope work temperature cycling Using IPC-9701 guidelines Test sample size distribution: Total number test vehicles (PCBs): Total number daisy chains: Variety PCBs lead-free assemblies: #SMD125T16L Ver_C Side Number PolarPAK parts each PCB: Number PolarPAK daisy chains PCB: Number parts reworked: Number parts reworked PCB: Temperature cycle definition: tolerance +/-5
Temp Cycle
Temp Deg.C
reference board) reference board)
reference board)
reference board) test boards (including reference board)
Time
Temp
(max)
(min)
Time Min.
Temperature ramp rate: High temperature dwell: temperature dwell: Test duration: Whichever condition occurs first:
°C/minutes minutes minutes
cumulative failure Number thermal cycles: NTC-D 3,000 cycles case failure continue testing 6,000 cycles cumulative failures, whichever occurs first.
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Test monitoring: Event detector continuous monitoring electrical resistance each daisy chain
Temperature chamber characterization: Component temperature monitored recorded each board location chamber during initial setup. Characterization should performed using representative sample load, test board configuration, fixtures. Failure definition: Event detector 1,000 events (maximum), duration (maximum), reports first verified time-to-failure. and/or Data logger/voltmeter: nominal resistance increase (maximum), five readings/scans (maximum) Data documentation: Detailed description experimental apparatus, including thermal chamber data acquisition system Temperature time plots both board chamber including chamber setup characterization data Resistance time plot data logger samples Tabular data number cycles failure failures Weibull analysis
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Appendix Continuity Test
Board#: (Lead-Free) Rev: Side: Comp Package type PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK (Ohm) (Ohm) Open 0.209 0.317 0.433 0.072 0.217 0.305 0.406 Open 0.229 0.336 0.451 0.088 0.229 0.305 0.407 (Rework) (Rework) Comp Board#: (Lead-Free) Rev: Side: Comp Package type PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK (Ohm) (Ohm) Open 0.201 0.303 0.425 0.065 0.213 0.297 0.401 Open 0.202 0.306 0.417 0.057 0.205 0.317 0.413 (Rework) Board#: (Lead-Free) Rev: Side: Comp Board#: (Lead-Free) Rev: Side: Comp Package type PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK (Ohm) (Ohm) Open 0.206 0.307 0.425 0.068 0.214 0.296 0.399 Open 0.202 0.302 0.422 0.066 0.247 0.303 0.403 Board#: (Lead-Free) Rev: Side: Comp Board#: (Lead-Free) Rev: Side: Comp Package type PolarPAK PolarPAK PolarPAK PolarPAK (Ohm) (Ohm) Open 0.201 0.305 0.421 Open 0.239 0.344 0.456 Note component Package type PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK (Ohm) (Ohm) Open 0.205 0.312 0.426 0.066 0.215 0.300 0.399 Open 0.215 0.311 0.424 0.053 0.214 0.295 0.398 (Rework) (Rework) Note component (Rework) Note component (Rework) Package type PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK (Ohm) (Ohm) Open 0.201 0.304 0.415 0.063 0.209 0.292 0.394 Open 0.229 0.321 0.438 0.086 0.228 0.309 0.410 Note component Note component (Rework) Board#: (Lead-Free) Rev: Side: Package type PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK PolarPAK (Ohm) (Ohm) Open 0.198 0.304 0.415 0.059 0.207 0.293 0.391 Open 0.229 0.336 0.443 0.084 0.233 0.301 0.399 (Rework) (Rework) Note component Note component Board#: (Lead-Free) Rev: Side: Comp Package type PolarPAK PolarPAK PolarPAK PolarPAK (Ohm) (Ohm) 0.061 0.207 0.291 0.393 0.092 0.233 0.316 0.415 Note (Rework) (Rework)
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PolarPAK Solder Joint Reliability Based Thermal Fatigue IPC-9701

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