N-Channel Reduced Fast Switching MOSFET RDS(on) 0.0095 0.0125

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N-Channel Reduced Fast Switching MOSFET RDS(on) 0.0095 0.0125

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Si7860ADP
N-Channel Reduced Fast Switching MOSFET
RDS(on) 0.0095 0.0125
FEATURES
Halogen-free According 61249-2-21 Available TrenchFET® Power MOSFET Optimized High Efficiency Thermal Resistance PowerPAK® Package with 1.07 Profile Tested
PowerPAK SO-8
APPLICATIONS
6.15
5.15
Buck Converter High Side Side Synchronous Rectifier Secondary Rectifier
Bottom View Ordering Information: Si7860ADP-T1-E3 (Lead (Pb)-free) Si7860ADP-T1-GE3 (Lead (Pb)-free Halogen-free) N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS unless otherwise noted
Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current °C)a Pulsed Drain Current Continuous Source Current (Diode Conduction)a Avalanche Current Single Pulse Avalanche Energy Maximum Power Dissipation
Symbol Tstg
Operating Junction Storage Temperature Range Soldering Recommendations (Peak Temperature)b,
Steady State
Unit
THERMAL RESISTANCE RATINGS
Parameter Maximum Junction-to-Ambient (MOSFET) Maximum Junction-to-Case (Drain)
Symbol Steady State Steady State RthJA RthJC
Typical
Maximum
Unit °C/W
Notes: Surface Mounted board. Solder Profile PowerPAK SO-8 leadless package. lead terminal exposed copper (not plated) result singulation process manufacturing. solder fillet exposed copper cannot guaranteed required ensure adequate bottom side solder interconnection. Rework Conditions: manual soldering with soldering iron recommended leadless components.
Document Number: 72651 S09-0272-Rev. 16-Feb-09
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Si7860ADP
MOSFET SPECIFICATIONS unless otherwise noted
Parameter Static Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Currenta Drain-Source On-State Resistancea Forward Transconductancea Diode Forward Voltagea Dynamicb Total Gate Charge Gate-Source Charge Gate-Drain Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Source-Drain Reverse Recovery Time VGS(th) IGSS IDSS ID(on) RDS(on) td(on) td(off) dI/dt A/µs VGEN VGS, 0.0079 0.0105 0.70 0.0095 0.0125 Symbol Test Conditions Min. Typ. Max. Unit
Notes: Pulse test; pulse width duty cycle Guaranteed design, subject production testing.
Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
TYPICAL CHARACTERISTICS unless otherwise noted
thru
Drain Current
Drain Current
Drain-to-Source Voltage
Gate-to-Source Voltage
Output Characteristics
Transfer Characteristics
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Document Number: 72651 S09-0272-Rev. 16-Feb-09
Si7860ADP
TYPICAL CHARACTERISTICS
0.015
unless otherwise noted
2500
DS(on) On-Resistance
0.012
0.009
Capacitance (pF)
2000
Ciss
1500
0.006
1000 Coss Crss
0.003
0.000
Drain Current
Drain-to-Source Voltage
On-Resistance Drain Current
Gate-to-Source Voltage DS(on) On-Resistance (Normalized) 2.00
Capacitance
1.75
1.50
1.25
1.00
0.75
0.50
Total Gate Charge (nC)
Junction Temperature (°C)
Gate Charge
0.040
On-Resistance Junction Temperature
DS(on) On-Resistance
0.032
Source Current
0.024
0.016 0.008
0.00
0.000
Source-to-Drain Voltage
Gate-to-Source Voltage
Source-Drain Diode Forward Voltage
On-Resistance Gate-to-Source Voltage
Document Number: 72651 S09-0272-Rev. 16-Feb-09
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Si7860ADP
TYPICAL CHARACTERISTICS unless otherwise noted
GS(th) Variance
Power
0.001 0.01 Time Temperature (°C)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
Limited DS(on)*
Drain Current
Single Pulse
0.01 0.01
Drain-to-Source Voltage minimum which RDS(on) specified
Safe Operating Area, Junction-to-Case
Normalized Effective Transient Thermal Impedance Duty Cycle
Notes:
0.05
0.02 Single Pulse 0.01 Square Wave Pulse Duration
Duty Cycle,
Unit Base thJA °C/W PDMZthJA(t) Surface Mounted
Normalized Thermal Transient Impedance, Junction-to-Ambient
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Document Number: 72651 S09-0272-Rev. 16-Feb-09
Si7860ADP
TYPICAL CHARACTERISTICS unless otherwise noted
Normalized Effective Transient Thermal Impedance Duty Cycle
0.05 0.02 Single Pulse 0.01 Square Wave Pulse Duration
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products manufactured several qualified locations. Reliability data Silicon Technology Package Reliability represent composite qualified locations. related documents such package/tape drawings, part marking, reliability data, www.vishay.com/ppg?72651.
Document Number: 72651 S09-0272-Rev. 16-Feb-09
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Legal Disclaimer Notice
Vishay
Disclaimer
product specifications data subject change without notice. Vishay Intertechnology, Inc., affiliates, agents, employees, persons acting their behalf (collectively, "Vishay"), disclaim liability errors, inaccuracies incompleteness contained herein other disclosure relating product. Vishay disclaims liability arising application product described herein information provided herein maximum extent permitted law. product specifications expand otherwise modify Vishay's terms conditions purchase, including limited warranty expressed therein, which apply these products. license, express implied, estoppel otherwise, intellectual property rights granted this document conduct Vishay. products shown herein designed medical, life-saving, life-sustaining applications unless otherwise expressly indicated. Customers using selling Vishay products expressly indicated such applications entirely their risk agree fully indemnify Vishay damages arising resulting from such sale. Please contact authorized Vishay personnel obtain written terms conditions regarding products designed such applications. Product names markings noted herein trademarks their respective owners.
Document Number: 91000 Revision: 18-Jul-08
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N-Channel Reduced Fast Switching MOSFET RDS(on) 0.0095 0.0125

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