N-channel 0.010 DPAK/IPAK Ultra gate charge STripFETPower MOSFET

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N-channel 0.010 DPAK/IPAK Ultra gate charge STripFETPower MOSFET

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STD55NH2LL STD55NH2LL-1
N-channel 0.010 DPAK/IPAK Ultra gate charge STripFETPower MOSFET
Type STD55NH2LL-1 STD55NH2LL VDSS RDS(on) <0.011 <0.011 40A(1) 40A(1)
Value limited wire bonding
RDS(ON) industry's benchmark Conduction losses reduced Switching losses reduced threshold device
iPAK
DPAK
Description
STD55NH2LL based latest generation ST's proprietary STripFETtechnology. innovative layout enables device also exhibit extremely gate charge most demanding requirements highside switch high-frequency DC-DC converters. It's therefore ideal high-density converters Telecom Computer applications.
Internal schematic diagram
Applications
Switching application
Order codes
Part number
Marking D55NH2LL D55NH2LL
Package IPAK DPAK
Packaging Tube Tape reel
STD55NH2LL-1
STD55NH2LLT4
July 2006
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www.st.com
Contents
STD55NH2LL STD55NH2LL-1
Contents
Electrical ratings Electrical characteristics
Electrical characteristics (curves)
Test circuit
Appendix Package mechanical data Packing mechanical data Revision history
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STD55NH2LL STD55NH2LL-1
Electrical ratings
Electrical ratings
Table
Symbol Vspike VDGR ID(2) ID(2)
Absolute maximum ratings
Parameter Drain-source voltage rating Drain-source voltage (VGS Drain-gate voltage (RGS Gate- source voltage Drain current (continuous) 25°C Drain current (continuous) 100°C Drain current (pulsed) Total dissipation 25°C Derating Factor Value Unit
Ptot Tstg
Single pulse avalanche energy Storage temperature Max. operating junction temperature
Garanted when external Rg=4.7 tfmax. Value limited wire bonding Pulse width limited safe operating area. Starting 20A,
Table
Rthj-case Rthj-amb
Thermal data
Thermal resistance junction-case
Thermal resistance junction-ambient Maximum lead temperature soldering purpose
W/°C
°C/W °C/W
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Electrical characteristics
STD55NH2LL STD55NH2LL-1
Electrical characteristics
(TCASE=25°C unless otherwise specified) Table
Symbol V(BR)DSS
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS Gate-body leakage current (VDS Gate threshold voltage Static drain-source resistance Test conditions 25mA, rating rating 125°C VGS, 250µA 10V, 4.5V, 0.010 0.012 Min. ±100 Typ. Max. Unit
IDSS
IGSS VGS(th) RDS(on)
Table
Symbol Ciss Coss Crss
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Test conditions 10V,
Gate Input Resistance
td(on) td(off)
Turn-on delay time Rise time Turn-off delay time Fall time Total gate charge Gate-source charge Gate-drain charge Output charge
Min.
0.011 0.0135
Typ.
Max.
Unit
25V, 1MHz, Gate Bias Test Signal Level Open Drain 10V, 4.5V (see Figure 0.44V 10V, 40A, 4.5V, (see Figure
Qoss(2)
VDS= VGS=
Pulsed: Pulse duration duty cycle Qoss Coss* Coss Chapter Appendix
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STD55NH2LL STD55NH2LL-1
Electrical characteristics
Table
Symbol ISDM IRRM
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward voltage 20A, 32.5 Test conditions Min. Typ. Max. Unit
Reverse recovery time 40A, di/dt 100A/µs, Reverse recovery charge 15V, 150°C Reverse recovery current (see Figure
Pulse width limited safe operating area. Pulsed: Pulse duration duty cycle
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Electrical characteristics
STD55NH2LL STD55NH2LL-1
Figure
Electrical characteristics (curves)
Safe operating area Figure Thermal impedance
Figure
Output characterisics
Figure
Transfer characteristics
Figure
Transconductance
Figure
Static drain-source resistance
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STD55NH2LL STD55NH2LL-1 Figure Gate charge gate-source voltage Figure
Electrical characteristics Capacitance variations
Figure
Normalized gate threshold voltage temperature
Figure Normalized resistance temperature
Figure Source-drain diode forward characteristics
Figure Normalized breakdown voltage temperature
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Test circuit
STD55NH2LL STD55NH2LL-1
Test circuit
Figure Gate charge test circuit
Figure Switching times test circuit resistive load
Figure Test circuit inductive load Figure Unclamped Inductive load test switching diode recovery times circuit
Figure Unclamped inductive waveform
Figure Switching time waveform
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STD55NH2LL STD55NH2LL-1
Appendix
Appendix
Figure Buck converter: power losses estimation
power losses associated with FETs synchronous buck converter estimated using equations shown table below. formulas give good approximation, sake performance comparison, different pairs devices affect converter efficiency. However very important parameter, working temperature, considered. real device behavior really dependent heat generated inside devices removed allow safer working junction temperature.
side (SW2) device requires:
Very RDS(on) reduce conduction losses Small Qgls reduce gate charge losses
Small Coss reduce losses output capacitance Small reduce losses during turn-on Cgd/Cgs ratio lower than Vth/Vgg ratio especially with drain source voltage avoid cross conduction phenomenon; high side (SW1) device requires:
Small allow higher gate current peak limit voltage feedback gate Small have faster commutation reduce gate charge losses RDS(on) reduce conduction losses.
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Appendix
STD55NH2LL STD55NH2LL-1
Table
Power losses calculation
High side switching (SW1) side switch (SW2)
Pconduction
DS(on)SW1
DS(on)SW2
Pswitching
gsth(SW1) gd(SW1)
Zero Voltage Switching
Recovery
applicable
rr(SW2)
Pdiode Conductio applicable
Vf(SW2) deadtime gls(SW2)
Pgate(QG)
g(SW1)
PQoss
oss(SW1)
Dissipated during turn-on
Table
Paramiters meaning
Parameter Qgsth Qgls Duty-cycle
Post threshold gate charge
Pconduction Pswitching Pdiode Pgate PQoss
Third quadrant gate charge state losses
oss(SW2)
Meaning
On-off transition losses Conduction reverse recovery diode losses Gate drive losses Output capacitance losses
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STD55NH2LL STD55NH2LL-1
Package mechanical data
Package mechanical data
order meet environmental requirements, offers these devices ECOPACK® packages. These packages have Lead-free second level interconnect category second level interconnect marked package inner label, compliance with JEDEC Standard JESD97. maximum ratings related soldering conditions also marked inner label. ECOPACK trademark. ECOPACK specifications available www.st.com
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Package mechanical data
STD55NH2LL STD55NH2LL-1
TO-251 (IPAK) MECHANICAL DATA
DIM. MIN. 0.45 0.48 15.9 0.95 16.3 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.64 TYP. MAX. 0.85 0.012 0.037 0.023 0.023 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
0.031
0.031
0.244
0.260
0.181
0.641 0.370
0.047 0.039
0068771-E
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STD55NH2LL STD55NH2LL-1
Package mechanical data
DPAK MECHANICAL DATA
DIM. MIN. (L1) 0.03 0.64 0.45 0.48 2.28 9.35 0.023 10.1 0.173 0.368 0.039 0.252 0.185 0.090 MAX. 0.23 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.200 0.260 TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 inch
0.110 0.031 0.008
0.181 0.397
0.039
0068772-F
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Packing mechanical data
STD55NH2LL STD55NH2LL-1
Packing mechanical data
DPAK FOOTPRINT
dimensions millimeters
TAPE REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
TAPE MECHANICAL DATA
DIM. MIN. 10.4 MAX. 10.6 inch
MIN.
0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0.153 0.161 0.311 0.319 0.075 0.082 1.574
0.618 0.641
MIN. 12.8 20.2 16.4
MAX.
MIN. 0.059 0.795 1.968
MAX. 12.992
inch
13.2 18.4 22.4
0.504 0.520 0.645 0.724 0.881 BULK 2500
BASE 2500
MAX.
12.1
1.85 2.75
16.3
1.65 2.55
15.7
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STD55NH2LL STD55NH2LL-1
Revision history
Revision history
Table
Date 22-Jun-2004 21-Jul-2005 13-Jun-2006 16-Jul-2006
Revision history
Revision Preliminary datasheet Complete version Packing mechanical data inserted template, content change Changes
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STD55NH2LL STD55NH2LL-1
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N-channel 0.010 DPAK/IPAK Ultra gate charge STripFETPower MOSFET

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