High-voltage high side driver High voltage rail dV/dt immunity V/
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L6392
High-voltage high side driver
High voltage rail dV/dt immunity V/nsec full temperature range Driver current capability: source sink Switching times 75/35 nsec rise/fall with load TTL/CMOS inputs with hysteresis Integrated bootstrap diode Operational amplifier advanced current sensing Adjustable dead-time Interlocking function Compact simplified layout Bill material reduction Flexible, easy fast design DIP-14 SO-14
Description
L6392 high-voltage device manufactured with "OFF-LINE" technology. single chip half-bridge gate driver N-channel Power MOSFET IGBT. high side (floating) section designed stand voltage rail logic inputs CMOS/TTL compatible down easy interfacing microcontroller/DSP embeds operational amplifier suitable advanced current sensing applications such field oriented motor control.
Applications
Motor driver home appliances, factory automation, industrial drives. ballasts, power supply units.
Table
Device summary
Order codes L6392 L6392D L6392D013TR Package DIP-14 SO-14 SO-14 Packaging Tube Tube Tape reel
February 2009
1/20
www.st.com
Contents
L6392
Contents
Block diagram connection Truth table Electrical data
Absolute maximum ratings Thermal data Recommended operating conditions
Electrical characteristics
operation operation
Waveforms definitions Typical application diagram Bootstrap driver
CBOOT selection charging
Package mechanical data Revision history
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L6392
Block diagram
Block diagram
Figure Block diagram
BOOTSTRAP DRIVER DETECTION from FLOATING STRUCTURE
BOOT
DETECTION DRIVER
LEVEL SHIFTER
LOGIC SHOOT THROUGH PREVENTION DRIVER
DEAD TIME
OPOUT
OPAMP
3/20
connection
L6392
connection
Figure Pins connection (top view)
OPOUT BOOT OPOP+
Table
description
name
Type
Function side driver logic input (active low) Shut down logic input (active low) High side driver logic input (active high) Lower section supply voltage Dead time setting Opamp output Ground Opamp inverting input Opamp inverting input side driver output connected
OPOUT OPLVG
High side (floating) common voltage High side driver output Bootstrapped supply voltage
BOOT
circuit provides less than pins Isink mA), with This allows omitting "bleeder" resistor connected between gate source external MOSFET normally used hold low; gate driver assures impedance also condition.
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L6392
Truth table
Truth table
Table Truth table
Inputs Outputs
Note:
don't care
5/20
Electrical data
L6392
Electrical data
Absolute maximum ratings
Table
Symbol Vout Vboot Vhvg VIvg Vop+ VopVi dVout/dt Ptot Tstg Supply voltage Output voltage Bootstrap voltage High side gate output voltage side gate output voltage Opamp non-inverting input Opamp inverting input Logic input voltage Allowed output slew rate Total power dissipation Junction temperature Storage temperature
Absolute maximum rating
Value Parameter Vboot Vout -0.3 -0.3 -0.3 -0.3 Vboot +0.3 Vboot V/ns Unit
Note:
immunity pins guaranteed (Human body model)
Thermal data
Table
Symbol Rth(JA)
Thermal data
Parameter Thermal resistance junction ambient SO-14 DIP-14 Unit °C/W
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L6392
Electrical data
Recommended operating conditions
Table
Symbol Vout
Vboot -Vout off. 12.5 Logic operational Vboot
Recommended operating conditions
Parameter Supply voltage Test condition 12.5 12.4 HVG, load
Unit
14-12 Floating supply voltage output voltage Switching frequency Junction temperature
7/20
Electrical characteristics
L6392
Table
Symbol toff
Electrical characteristics
operation
operation electrical characteristics (VCC =+25
Parameter Test condition Dead time setting range
Unit
High/low side driver turnVout propagation delay High/low side driver turn- boot propagation delay Shut down high/low Figure side propagation delay Delay matching, turn-on/off 0.48 1.35
0.18
0.25 0.72 1.85
k;CL CDT=100 k;CL=1 CDT=100 k;CL=1 CDT=100 CL=1 =100
Matching dead time
k;CL=1 CDT=100 k;CL=1 CDT=100 k;CL=1 CDT=100
Rise time Fall time
Figure page DTLH DTHL Figure page
8/20
L6392 Figure Timing characteristics
Electrical characteristics
toff
toff
LVG/HVG
Figure
Typical dead time resistor value
9/20
Electrical characteristics
L6392
Table
Symbol
operation
operation electrical characteristics (VCC
Parameter Test condition Unit
supply voltage section Vcc_hys Vcc_thON Vcc_thOFF hysteresis turn threshold turn threshold GND; GND; GND; GND; 1200 11.5 1500 10.5 1800 12.5
Iqccu
Undervoltage quiescent supply current
Iqcc
Quiescent current
1000
Bootstrapped supply voltage section VBO_hys VBO_thON VBO_thOFF hysteresis turn threshold turn threshold IQBOU GND; GND; Vhvg Vout Vboot 1200 10.6 1500 11.5 1800 12.4 10.9
Undervoltage quiescent current
IQBO
quiescent current
RDS(on)
High voltage leakage current Bootstrap driver resistance
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L6392 Table
Symbol
Electrical characteristics operation electrical characteristics (VCC (continued)
Parameter Test condition Unit
Driving buffers section Logic inputs Vil_S IHINh IHINl ILINI ILINh ISDh ISDl
Vboot Vout RDSon tested following way: RDSon [(VCC VCBOOT1) (VCC VCBOOT2)] [I1(VCC,VCBOOT1) I2(VCC,VCBOOT2)] where current when VCBOOT VCBOOT1, when VCBOOT VCBOOT2
High/low side source short circuit current High/low side sink short circuit current
logic level voltage High logic level voltage Single input voltage logic input bias current logic input bias current logic input bias current logic input bias current logic input bias current logic input bias current connected together floating 2.25
11/20
Electrical characteristics
L6392
Table
Symbol Vicm
OPAMP characteristics (VCC
Parameter Input offset voltage Input offset current Input bias current
Test condition
Unit
Source, Sink 14.7
Input common mode voltage range level output voltage High level output voltage
Output short circuit current
GBWP CMRR
Slew rate Gain bandwidth product Large signal voltage gain Power supply rejection ratio Common mode rejection ratio
1÷4; unity gain
direction input current
12/20
L6392
Waveforms definitions
Figure
Waveforms definitions
Dead time timing waveforms
gate driver outputs (HALF-BRIDGE TRI-STATE)
INTE
INTE
CONTROL SIGNAL EDGES OVERLAPPED: INTERLOCKING DEAD TIME
CKIN
CKIN
DTLH gate driver outputs (HALF-BRIDGE TRI-STATE)
DTHL
CONTROL SIGNALS EDGES SYNCHRONOUS (*): DEAD TIME
DTLH gate driver outputs (HALF-BRIDGE TRI-STATE) gate driver outputs (HALF-BRIDGE TRI-STATE) DTHL
CONTROL SIGNALS EDGES OVERLAPPED, INSIDE DEAD TIME: DEAD TIME
DTLH gate driver outputs (HALF-BRIDGE TRI-STATE) gate driver outputs (HALF-BRIDGE TRI-STATE) DTHL
CONTROL SIGNALS EDGES OVERLAPPED, OUTSIDE DEAD TIME: DIRECT DRIVING
DTLH gate driver outputs (HALF-BRIDGE TRI-STATE) gate driver outputs (HALF-BRIDGE TRI-STATE) DTHL
connected togheter driven just control signal
13/20
Typical application diagram
L6392
Figure
Typical application diagram
Application diagram
BOOTSTRAP DRIVER DETECTION from
FLOATING STRUCTURE
BOOT
DETECTION DRIVER
H.V.
Cboot
LEVEL SHIFTER
LOGIC SHOOT THROUGH PREVENTION DRIVER LATCH LOAD
DEAD TIME OPAMP
OPOUT
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L6392
Bootstrap driver
Bootstrap driver
bootstrap circuitry needed supply high voltage section. This function normally accomplished high voltage fast recovery diode (Figure L6392 patented integrated structure replaces external diode. realized high voltage DMOS, driven synchronously with side driver (LVG), with diode series, shown Figure internal charge pump (Figure provides DMOS driving voltage.
CBOOT selection charging
choose proper CBOOT value external seen equivalent capacitor. This capacitor CEXT related total gate charge:
gate gate
ratio between capacitors CEXT CBOOT proportional cyclical voltage loss.
CBOOT CEXT e.g.: Qgate Vgate CEXT With CBOOT drop would supplied long time, CBOOT selection take into account also leakage quiescent losses. e.g.: steady state consumption lower than CBOOT supply CEXT. This charge capacitor means voltage drop internal bootstrap driver gives great advantage: external fast recovery diode avoided usually great leakage current). This structure work only VOUT close lower) meanwhile charging time (Tcharge) CBOOT time which both conditions fulfilled long enough charge capacitor. bootstrap driver introduces voltage drop DMOS RDSON (typical value: frequency this drop neglected. Anyway increasing frequency must taken account. following equation useful compute drop bootstrap DMOS:
gate drop dson drop dson
where Qgate gate charge external power MOS, Rdson resistance bootstrap DMOS, Tcharge charging time bootstrap capacitor.
15/20
Bootstrap driver example: using power with total gate charge drop bootstrap DMOS about Tcharge fact:
L6392
30nC drop 0.7V
Vdrop taken into account when voltage drop CBOOT calculated: this drop high, circuit topology doesn't allow sufficient charging time, external diode used. Figure Bootstrap driver
DBOOT
BOOT H.V. LOAD
BOOT H.V. LOAD
CBOOT
CBOOT
D99IN1067
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L6392
Package mechanical data
Package mechanical data
order meet environmental requirements, offers these devices different grades ECOPACK® packages, depending their level environmental compliance. ECOPACK® specifications, grade definitions product status available www.st.com. ECOPACK® trademark. Figure
DIM. MIN. 1.27 2.54 0.050 2.54 15.24 0.130 0.51 1.39 0.25 0.335 0.100 0.600 0.280 0.201 1.65
DIP-14 mechanical data package dimensions
TYP. MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 inch TYP. MAX.
OUTLINE MECHANICAL DATA
DIP14
0.100
17/20
Package mechanical data Figure SO-14 mechanical data package dimensions
DIM. MIN.
L6392
inch MAX. 1.75 0.30 1.65 0.51 0.25 8.75 MIN. 0.053 0.004 0.043 0.013 0.007 0.337 0.150 0.050 6.20 0.50 1.27 0.228 0.01 0.016 0.244 0.02 0.050 TYP. MAX. 0.069 0.012 0.065 0.020 0.01 0.344 0.157
TYP.
OUTLINE MECHANICAL DATA
1.35 0.10 1.10 0.33 0.19 8.55 3.80 1.27 0.25 0.40
(min.), (max.) 0.10 0.004
dimension does include mold flash, protusions gate burrs. Mold flash, protusions gate burrs shall exceed 0.15mm side.
SO14
0016019
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L6392
Revision history
Revision history
Table
Date 29-Feb-2008 18-Mar-2008 17-Sep-2008 17-Feb-2009
Document revision history
Revision Initial release Cover page updated Updated Table page Table page Table page Updated Table page Table page Table page Added Table page Changes
19/20
L6392
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