10bit 125MSPS Converter CXA3197R210bit Data 125MSPS12 TTL, TTL, P

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

10bit 125MSPS Converter CXA3197R210bit Data 125MSPS12 TTL, TTL, P

Datasheet Thumbnail

Top Searches for this datasheet

CXA3197R
10bit 125MSPS Converter
CXA3197R210bit Data 125MSPS12 TTL, TTL, PECL PECL 125MSPS 100MSPS 10bit 480mWtyp. TTL, PECL RESET LQFP (Plastic)
LEAD TREATMENT: PALLADIUM PLATING HDTV QPSK,
AGND2
AOUTP
AOUTN
AGND2 VOCLP POLARITY DVCC1 N.C. DGND1 (MSB) RESETN/E RESETP/E RESET/T CLKN/E CLKP/E CLK/T DIV2OUT
DGND2
DIV2IN (LSB)
AVCCO
AVCC2
VSET
DVCC2
VREF
(MSB)
(LSB)
J97639B22-PS
CXA3197R
Ta25 AVCCO, AVCC2, DVCC2 AGND2, DGND2 DVCC1 AVCC2-AGND2 AVCCO-AGND2 DVCC2-DGND2 -0.56.0 -6.00.5 -0.56.0 -0.56.0 -0.56.0 -0.56.0
VSET AGND2-0.5AVCC20.5 DGND1-0.5DVCC10.5 PECL DGND1-0.5DVCC10.5 DGND1-0.5DVCC10.5 VOCLP DGND1-0.5DVCC10.5 Tstg -65150 t1.6
AVCCO AVCC2 AGND2 DVCC1 DGND1 DVCC2 DGND2 VSET PECL VID*1 VOCLP (PECL PECL 4.75 4.75 -0.05 4.75 -0.05 4.75 -0.05 5.25 5.25 0.05 5.25 0.05 5.25 0.05 -0.05 -0.05 -5.50 4.75 -0.05 -0.05 -5.50 -5.0 -5.0 0.05 0.05 -4.75 5.25 0.05 0.05 -4.75 MSPS MSPS
tpw1 tpw0
AGND20.65 DGND12.0 DVCC1-1.05 DVCC1-3.2 DGND12.4 0.75
AGND21.03 DGND10.8 DVCC1-0.5 DVCC1-1.4
DVCC1
RL10k RL50 VIDInput Voltage Differential PECL
1.05
DVCC1 DGND1
CXA3197R
DA0DA9 DB0DB9 DIV2IN DIV2OUT CLK/T CLKP/E CLKN/E RESET/T RESETP/E RESETN/E DGND2 DVCC2 AVCCO AOUTN AOUTP AGND2 VREF VSET 4548 PECL PECL PECL PECL
PECL PECL PECL PECL 5Vtyp. AVCCO-VFS AVCCO-VFS AGND21.25V AGND20.65V AGND21.03V
PECL PECL PECL PECL 0Vtyp. AVCCO-VFS
AVCCO-VFS AGND21.25V AGND20.65V AGND21.03V
AVCC2 AGND2 VOCLP POLARITY DVCC1 N.C. DGND1
High
CXA3197R
DVCC1
DVCC2
VOCLP
AVCC2
10bit
Input Latch
10bit 10bit Latch 10bit
AVCCO AOUTP
AOUTN 10bit Input Latch 10bit AGND2 DIV2OUT
Current Cont. VREF
DIV2IN
CLK/T CLKP/E CLKN/E RESET/T RESETP/E RESETN/E POLARITY AGND2 VSET
DGND1
DGND2
CXA3197R
4548
DA0DA9
DVCC1
DGND1
1.5V
DB0DB9
DVCC1
DIV2IN
1.5V DGND1
MUX. MUX.
DVCC1
DIV2OUT
100K
DGND1
MUX. DIV2OUT
DVCC1
CLKT
1.5V DGND1
CXA3197R
PECL CLKPECLKNE
DVCC1
CLKPE
PECL
DGND1
CLKNE
PECL
CLKPE
DVCC1
RESETT
1.5V DGND1
RESETPE
PECL
DVCC1
RESETNE
PECL
DGND1
MUX. MUX. 2223, PECL POLARITY RESETPERESETN
DGND2
DVCC1
1.5V
DGND1
CXA3197R
DVCC2
AVCCO
AVCCO
AVCCO
AOUTN
AVCCO-VFS
AOUTP
AVCCO-VFS
AGND2
AGND2
AVCC2
VREF
AGND1.25V Typ.
AGND2
AVCC2
VSET
AGND20.65V AGND21.03V
AGND2
AVCC2
AGND2
CXA3197R
TTLHigh MUX. DIV2OUT TTLH VOCLP
DVCC1
VOCLP
DGND1
DVCC1
POLARITY
1.5V DGND1
Active Active High
DVCC1
1.5V DGND1
DVCC1
OPEN
DGND1
DVCC1 N.C. DGND1
CXA3197R
DVCC1, DVCC2, AVCC2, AVCCO5VDGND1, DGND20VTa25 PECL PSPS VOCLP VOCLP IOH-2.0mA IOL1.0mA VO5V VO0V 0.82.4V L10pF 0.82.4V L10pF VIH3.5V VIL0.2V 0.75 1.05 VIH3.5V VIL0.2V DVCC1-1.05 DVCC1-3.2 VFS1000mV
-0.850.5 -1.20.5 ±1.2 DVCC1-0.5 DVCC1-1.4 F.S.
VIHDVCC1-0.8V VILDVCC1-1.6V
IVOCLP VOCLPDVCC1 IVOCLP VOCLP2.4V
RL10k RL50 RL10k RL50
SETAGND2937.5mV
VSETAGND2937.5mV VFS1000mV RL50, VFS1V 10-90 -4.0 0.85 0.75 1.05 0.85
tSET
Mesured DVCC2 -2.1
CXA3197R
VREF PSVREF VREF VSET
VREF VREF ISET DICC1 DICC2 AICC2 AICCO DICC1 DICC2 AICC2 AICCO
AGND21.18 AGND21.25 AGND21.32 AGND21.18 AGND21.25 AGND21.32 100mVp-p, SIN, -3dB
REFOUT1mA
Total DICC1 DICC2 AICC2 AICCO Total DICC1 DICC2 AICC2 AICCO
15.5 0.432 0.38 0.001 0.05 0.001
64step D.L.E.
INV"H"AOUTP AOUTN D.L.E.
AVccO VOC(min) (AVCCO-VFS)- DVCC2-2.1V VOC(max)= (AVCCO-VOF)- DVCC2 1.5V PSVREFVREF AGND2PSVREF1.181.32V VREF IREFOUT AVCC2VREFPS
AVCC2
VREF IREFOUT VREF
AGND2
-10-
PECL PECL 2T-7 2T-7 12.0 2T-7 CL10pF MSPS MSPS PECL RESET Tpw1 Tpw0 ts-rst th-rst td-DIV 2T-tm Tpw1 Tpw0 ts-rst th-rst
DIV2OUT
DIV2OUTDIV2IN
MUX.
MUX.
-11-
CXA3197R
PECL MSPS MSPS RESET Tpw1 Tpw0 ts-DIV th-DIV Tpw1 Tpw0 ts-C2 th-C2
DIV2IN
DIV2IN
MUX.
SELE.A, SELE.B
-12-
MUX.2SELE.ASELE.BRESET
CXA3197R
CXA3197R
DVCC1
10bit Data
DGND1 DVCC2 AVCC2 AVCCO AOUTP AOUTN VSET DGND2 AGND2 937.5mV
CLK/T
CXA3197R
1MHz
DVCC1 DVCC2 AVCC2 AVCCO CXA3197R CLK/T 1MHz DIV2IN DIV2OUT DGND1 DGND2 AGND2 VSET AOUTP
DICC1 DICC2 AICC2 AICCO
AOUTN
937.5mV
DVCC1
DGND1 DVCC2 AVCC2 AOUTP AVCCO
CLK/T
CXA3197R AOUTN VSET
1MHz
DGND2 AGND2
937.5mV
-13-
CXA3197R
DVCC1 CXA3197R CLKP/E CLKN/E 100MHz PECL VSET DGND2 AGND2 VREF DGND1 DVCC2 AVCC2 AOUTP AVCCO AOUTN
VREF PSVREF
DVCC1
DGND1 DVCC2 AVCC2 AVCCO AOUTP
CLKP/E CLKN/E 20MHz PECL
AVCCO AOUTP 0.1µF VSET 100mVp-p AGND2 937.5mV
AOUTN CXA3197R VREF VSET DGND2 AGND2
-14-
CXA3197R
AVCCO AVCCO
AOUTP (INV
AVCCO
(AVCCO VOF) (AVCCO VFS) 1023 V(n) 1LSB 1LSB 1LSB
1LSB
D.L.E.
I.L.E.
(MSB)
(LSB)
INV1 INV0
AOUTP AVCCO-VOF AVCCO-VFS AOUTN AVCCO-VFS AVCCO-VOF
-15-
CXA3197R
CXA3197R4 Mode Data AOUT MSPS Mbps Mbps 62.5 DIV2OUT CLK2TTL High impedance High impedance High impedance High impedance CLK2MUX CLK2MUX DIV2INMUX
MUX.1A MUX.1B MUX.2 SELE.A SELE.B
CXA3197RADA0DA9 BDB0DB92IC DAECL CXA3197RTTL TTL, PECL PECL 1MUX.1A MUX.1AIC1212 DIV2OUTTTLDIV2OUTDIV2OUT CXA3197RDIV2OUT DIV2OUTDIV2INCXA3197R CXA3197R ADA0DA9 BDB0DB92
td-DIV DIV2OUT (DIV2OUT) DIV2IN 10bit Data. CXA3197R 10bit 10bit Data. 10bit CXA3197R DB0DB9
CXA3197R (MUX.1A
DA0DA9
-16-
CXA3197R
MUX.1ACXA3197R12 MUX.1A12 PECL23, 24pinRESETPE, RESETNE22pin RESETTTTL22pinRESETT 24pinRESETPE, RESETNER POLARITY 39pinR POLARITYHActive LowLActive High
RESET
CXA3197R DIV2OUT DIV2OUT
CXA3197R DIV2OUT DIV2OUT
RESET
RESET (Active Low) DIV2OUT
CXA3197R DIV2OUT RESET CXA3197R DIV2OUT RESET RESET
DIV2OUT
-17-
CXA3197R
2MUX.1B C2LC3H MUX.1BIC1212 IC12 ADA0DA9 BDB0DB92IC
th-rst (Active Low) IC12 ts-rst CXA3197R (MUX.1B
DA0DA9
DB0DB9
IC12 (ts) (th)
-18-
CXA3197R
MUX.1BCXA3197RMUX.1A12 MUX.1B PECL23, 24pinRESETPE, RESETNE 22pinRESETTTTL22pin RESETT23, 24pinRESETPE, RESETNE POLARITY39pinR POLARITYH Active LowLActive High
RESET
CXA3197R IC12
CXA3197R IC12
RESET
RESET (Active Low) IC12
CXA3197R RESET CXA3197R RESET RESET
IC12
-19-
CXA3197R
3MUX.2 C3LC2H MUX.2 DIV2INTTLDIV2INDIV2INIC ts_DIVth_DIV DIV2INDIV2INts thADA0DA9 BDB0DB92 ICADIV2IN 2BDIV2IN
ts_DIV DIV2IN th_DIV
CXA3197R (MUX.2
DIV2IN
DA0DA9
DB0DB9
-20-
CXA3197R
4SELE.ASELE.B SELE.AClHC2, SELE.AADA0DA9 SELE.BCl, C2HC3L SELE.BBDB0DB9 tsth SELE.ASELE.BC2HL C2C2 C2ICts_C2 th_C2
ts_C2 th_C2
CXA3197R SELE.ASELE.B
DA0DA9 Select
DB0DB9
-21-
CXA3197R
Block Diagram Timing ChartMUX.1A Mode
RESET DIV2OUT DIV2IN Input Data Input Latch Latch Input Data Input Latch Latch Latch Analog CLK/2 (Internal)
Tpw1 Tpw0 ts-rst th-rst (Active High) (Active Low) td-DIV
RESET
DIV2OUT DIV2IN 2T-tm Input Data Input Data
MUX.1AData AData 12CLK2TTLDIV2OUT CLK2 RESET
PECL
±1/2LSB
2.0V 0.8V
2.0V 0.8V
±1/2LSB
tSET
-22-
CXA3197R
Block Diagram Timing ChartMUX.1B Mode
RESET CLK/2 (Internal)
Input Data
Input Latch Latch Analog
Input Data
Input Latch
Tpw1 Tpw0 RESET (Active High) CLK/2 (Internal) Input Data Input Data ts-rst th-rst (Active High) (Active Low) D-FF
MUX.1BData AData 12CLK2RESET
-23-
CXA3197R
Block Diagram Timing ChartMUX.2 Mode
DIV2IN CLK/2 (Internal)
Input Data
Input Latch
Latch Latch Analog
Input Data
Input Latch
Latch
Tpw1 Tpw0 ts-DIV th-DIV DIV2IN Input Data Input Data
MUX.212DIV2INData AData
-24-
CXA3197R
Block Diagram Timing ChartSELE.A, SELE.B Mode
Latch
Input Data
Input Latch Select Latch Analog
Input Data
Input Latch
Tpw1
Tpw0
Input Data
th-C2
ts-C2
Input Data
Latch
SELE.
SELE.
SELE.A, SELE.BData Data C1"1" C3"0"C2"0"Data AC2"1" Data
-25-
CXA3197R
MUX.2 RL50AVCCO VSET RRO//RL RO50
VSET
VREF R1R2 VREF1.2V R1R21.2k
+5V(D)
0V(D)
-5V(A)
0V(A)
(MSB)
DVCC1
DGND1
POLARITY
AGND2
VOCLP
Latch
AVCC2 VSET VREF AGND2 AOUTP AOUTN AVCCO DVCC2
0V(A) -5V(A) -5V(A) 0V(A)
(LSB)
0V(A) 0V(A) 0V(D) 0V(A) -5V(D)
(MSB)
(LSB)
RESETP/E
RESETN/E
DIV2OUT
+5V(D)
CLKP/E
CLKN/E
0V(D)
CLK/2 PECL
-26-
RESET/T
DGND2
DIV2IN
CLK/T
CXA3197R
CXA3197RPECLTTL PECLPECL TTLTTL CXA3197R MUX.1AMUX.1B IC12 CXA3197RTTLPSHPS LICPSH PECLPHNL PECL TTLTE PECLET CXA3197RDGND1DGND2AGND2 DVCC1DVCC2AVCC2 AVCCO CXA3197R2DGND1DVCC2AVCC2 DVCC15Vtyp. DGND2 -5Vtyp.AGND2-5Vtyp. AVCCO 0.1F DVCC1, DVCC2AVCC2, AVCCO 2DVCC1, DGND2AGND2 2AVCCOAVCCO CXA3197R5050 50AOUTP, AOUTN 5050 -27-
CXA3197R
VSET
1100 1100 RL50 VSETAGND2+937.5mW 1050
1000
VFSmV
RL50
1000
0.65 0.84 VSETV 1.03
VREF
VOFmV
1280
RL50 VSETAGND2+937.5mW
VREFmV
1260
1240
1220
VSETMHz
-28-
CXA3197R
48PIN LQFP (PLASTIC)
(8.0)
0.08 0.18 0.03
(0.22)
0.05 0.127 0.02 0.13
0.18 0.03
DETAIL PALLADIUM DETAIL NOTE: Dimension does include mold protrusion.
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE LQFP-48P-L01 P-LQFP48-7x7-0.5 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.2g
-29-
0.127 0.04
Sony Corporation

10bit 125MSPS Converter CXA3197R210bit Data 125MSPS12 TTL, TTL, P

Top Searches for this datasheet

Other recent searches