Bi-CMOS LV8111V Polygon Mirror Motor 3-phase Brushless

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Bi-CMOS LV8111V Polygon Mirror Motor 3-phase Brushless

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Ordering number ENA1416A
Bi-CMOS
LV8111V
Polygon Mirror Motor
3-phase Brushless Motor Driver
LV8111V 3-phase brushless motor driver polygon mirror motor driving LBP. circuit needed drive polygon mirror motor composed single-chip. Also, output transistor made DMOS using BiDC process, adopting synchronous rectification method, lower power consumption (Heat generation) achieved.
Features 3-phase bipolar drive Direct drive synchronous rectification max1 2.5A max1 3.0A 0.1ms) Output current control circuit speed control circuit Phase lock detection output (with mask function) Compatible with Hall Provides regulator output Specifications
Maximum Ratings 25°C
Parameter Supply voltage Symbol Output current max1 max2 Allowable Power dissipation Operation temperature Storage temperature Junction temperature Topr Tstg 0.1ms
Full complement on-chip protection circuits, including lock
protection, current limiter, under-voltage protection, thermal shutdown protection circuits Circuit switch slowing down method while stopped (Free Short-circuit brake) Constraint protection detection signal switching circuit Forward Reverse switching circuit Hall bias (Bias current stopped state) SDCC (Speed Detection Current Control) function
Conditions
Ratings +150
Unit
Mounted specified board
150°C must exceeded. Specified board: 114.3mm 76.1mm 1.6mm, glass epoxy board.
SANYO Semiconductor Co.,Ltd. products described contained herein are, with regard "standard application", intended general electronics equipment (home appliances, equipment, communication device, office equipment, industrial equipment etc.). products mentioned herein shall intended "special application" (medical equipment whose purpose sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level reliability directly threaten human lives case failure malfunction product cause harm human bodies, shall they grant guarantee thereof. should intend products applications outside standard applications customer considering such and/or outside scope intended standard applications, please consult with prior intended use. there consultation inquiry before intended use, customer shall solely responsible use. Specifications SANYO Semiconductor Co.,Ltd. products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer' products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer' products equipment.
60309 20090521-S00002 22509 20090212-S00001 No.A1416-1/13
LV8111V
Allowable Operating Ranges 25°C
Parameter Supply voltage range constant voltage output current applied voltage output current applied voltage output current applied voltage output current Symbol IREG Conditions Ratings Unit
Electrical Characteristics 25°C,
Parameter Current drain Symbol ICC1 ICC2 Constant Voltage Output Output voltage Line regulation Load regulation Temperature coefficient Output Block Output resistance Output leakage current Lower side Diode forward voltage Upper side Diode forward voltage Charge Pump Output pin) Output voltage Output resistance (High level) Output resistance (Low level) Hall Amplifier Block Input bias current Common mode input voltage range Hall input sensitivity Hysteresis Input voltage Input voltage Hall Bias pin) P-channel Output Output voltage resistance Output leakage current Amplifier Schmitt Block (IN1) Input amplifier gain Input hysteresis Input hysteresis hysteresis FGFIL High level output voltage level output voltage External capacitor charge current External capacitor discharge current Amplitude VOH(FGFIL) VOL(FGFIL) ICHG1 ICHG2 V(FGFIL) VCHG1 1.5V VCHG2 1.5V 0.75 1.95 0.85 2.15 0.95 2.35 Vp-p VSHL(FGS) VSLH(FGS) VFGL Design target value Input referred, Design target value Input referred, Design target value Input referred, Design target value times VOL(HB) IL(HB) -20mA VIN(HA) VSLH VSHL IHB(HA) VICM -0.5 VREG-2.0 mVp-p VOH(CP1) VOL(CP1) ICP1 -2mA ICP1 VGOUT VCC+4.9 IOleak lower upper side outputs Design target value 1.35 1.35 VREG VREG1 VREG2 VREG3 -20mA Design target value 4.65 5.35 mV/°C stop state Conditions Ratings Unit
Design target value, measurement.
Continued next page.
No.A1416-2/13
LV8111V
Continued from preceding page.
Parameter Output Output resistance Output leakage current Oscillator High level output voltage level output voltage External capacitor charge current Oscillation frequency Amplitude Recommended operation frequency range Oscillation Circuit High level output voltage level output voltage Amplitude External capacitor charge current External Capacitor Discharge Current Oscillation frequency Phase comparing output Output resistance (high level) Output resistance (low level) Phase Lock Detection Output Output resistance Output leakage current Error Amplifier Block Input offset voltage Input bias current High level output voltage level output voltage bias level Current Control Circuit Drive gain While phase locked 0.55 times VIO(ER) IB(ER) VOH(ER) VOL(ER) VB(ER) -100µA 100µA Design target value EI+0.7 EI-1.75 EI+0.85 EI-1.6 VREG/2 EI+1.0 EI-1.45 VOL(LD) IL(LD) 10mA VPDH VPDL -100µA 100µA VOH(CSD) VOL(CSD) V(CSD) ICHG1(CSD) VCHG1 2.0V ICHG2(CSD) VCHG2 2.0V f(CSD) 0.068µF, Design target value 1.75 2.25 Vp-p VOH(PWM) VOL(PWM) ICHG(PWM) f(PWM) V(PWM) fOPR VPWM 150pF 2.95 3.45 Vp-p VOL(FG) IL(FG) Symbol Conditions Ratings Unit
Current Limiter Circuit (pins RFS) Limiter voltage Under-voltage Protection Operation voltage Hyteresis Circuit External capacitor charge current Operation voltage Thermal Shutdown Operation Thermal shutdown operation temperature Hysteresis External input frequency High level input voltage level input voltage Input open voltage Hysteresis High level input current level input current fI(CLK) VIH(CLK) VIL(CLK) VIO(CLK) VIS(CLK) IIH(CLK) IIL(CLK) VCLK VREG VCLK VREG-0.5 -110 VREG VREG Design target value (Junction temperature) Design target value (Junction temperature) ICLD VH(CLD) VCLD -4.5 3.25 -3.0 -1.5 3.75 0.35 0.465 0.515 0.565
Design target value, measurement.
Continued next page.
No.A1416-3/13
LV8111V
Continued from preceding page.
Parameter CSDSEL High level input voltage level input voltage Input open voltage High level input current level input current High level input voltage level input voltage Input open voltage Hysteresis High level input current level input current BRSEL High level input voltage level input voltge Input open voltage High level input current level input current High level input voltage level input voltage Input open voltage High level input current level input current VIH(FR) VIL(FR) VIO(FR) IIH(FR) IIL(FR) VF/R VREG VF/R VREG-0.5 -110 VREG VREG VIH(BRSEL) VIL(BRSEL) VIO(BRSEL) IIH(BRSEL) IIL(BRSEL) VBRSEL VREG VBRSEL VREG-0.5 -110 VREG VREG VIH(SS) VIL(SS) VIO(SS) VIS(SS) IIH(SS) IIL(SS) VS/S VREG VS/S VREG-0.5 -110 VREG VREG VIH(CSD) VIL(CSD) VIO(CSD) IIH(CSD) IIL(CSD) VCSD VREG VCSD VREG-0.5 -110 VREG VREG Symbol Conditions Ratings Unit
No.A1416-4/13
LV8111V
Package Dimensions
unit (typ) 3333
VIEW 15.0 SIDE VIEW BOTTOM VIEW
(4.7)
(3.5)
(0.68)
0.65
0.22
1.7MAX
SIDE VIEW
(1.5)
SANYO SSOP44K(275mil)
Specified board: glass epoxy board.
Allowable power dissipation,
0.95
Ambient temperature,
Assignment
GND2 VCC1 VCC2 OUT1 OUT2 OUT3 IN3+ IN2+ IN1+
view
IN3-
IN2-
LV8111V
FGFIL
VREG
IN1-
BRSEL
CSDSEL
No.A1416-5/13
LV8111V
Block Diagram Application Circuit Example
CSDSEL
CSDSEL
COUNT
LOGIC
VREG
BRSEL
BRSEL
LOGIC
CONT
COMP output MASK
PEAK HOLD
VREG VREG LVDS
VCC1 VCC2
input output
CNTROL CIRCUIT CHARGE PUMP
FGFIL
FILTER OUT1 DRIVER OUT2 HALL CURR
OUT3
IN1+
IN1-
IN2+
IN2-
IN3+
IN3-
GND2
No.A1416-6/13
LV8111V
Function
name Function Clock input (10kHz maximum) Equivalent circuit
VREG
Phase lock detection output pin. Goes during PLL-phase lock. Open drain output.
VREG
Start/Stop input pin. START with low-level input. STOP with high-level input open input
VREG
VREG
regulator output pin. (the control circuit power supply) Connect capacitor between this stabilization.
BRSEL
Brake selection pin. level, short-circuit braking when stopped state. (Brake inspection process)
VREG
CSDSEL
Motor constraint protection detection signal selection pin. Select with low, with high open state.
VREG
Continued next page.
No.A1416-7/13
LV8111V
Continued from preceding page.
name Function select Forward Reverse. (Pin select SDCC function)
VREG
Equivalent circuit
phase lock signal mask time. Connect capacitor between this GND. there need masking, this must left open.
VREG
both constraint protection circuit operation time initial reset pulse setting. Connect capacitor between this GND. motor constraint protection circuit used, capacitor resistor must connected parallel between GND.
VREG
Schmitt output pin. Open drain output.
VREG
oscillation frequency PWM. Connect capacitor between this GND.
VREG
Frequency characteristics correction current limiter circuit. Connect capacitor between this GND.
VREG
110k
Continued next page.
No.A1416-8/13
LV8111V
Continued from preceding page.
name FGFIL filter pin. When noise signal problem, connect capacitor between this stabilization.
Function
VREG
Equivalent circuit
stabilize waveform. Connect capacitor between this GND.
VREG
Phase comparison output pin. phase error output duty changing pulse.
VREG
Error amplifier input pin.
VREG
Error amplifier output pin.
VREG
100k
Torque command voltage input pin. Normally, this must connected with pin.
VREG
Ground control circuit block.
Continued next page.
No.A1416-9/13
LV8111V
Continued from preceding page.
name Function Hall element bias current pin. Goes when start state. Goes when stopped state.
VREG
Equivalent circuit
IN1+ IN1- IN2+ IN2- IN3+ IN3-
Hall amplifier input pin. high level state logic recognized when IN-. reverse case low-level state. input amplitude 100mVp-p more (differential) desirable Hall sensor inputs. noise Hall inputs problem, that noise must excluded inserting capacitors across inputs.
VREG
GND2 OUT3 OUT2 OUT1
Frame ground pin. This connected with GND2 pin. Ground output circuit block. Output pin. PWM, Duty control executed upper- side FET.
Source output MOSFET (lower-side). Connect resistance (Rf) between this GND.
VREG
Output current detection pin. Connect pin.
VCC2
Power supply pin. Connect capacitor between this stabilization.
VCC1
Power supply control. Charge pump output (Power supply upper side gate). Connect capacitor between this VCC.
connect capacitor charge pump. Connect capacitor between CP2.
No.A1416-10/13
LV8111V
3-phase Logic Truth Table
indicates state where IN-)
OUT1 Output OUT2 OUT3
Input state High Open Mode Stop Start
BRSEL
Input state High Open While stopped Free Short-circuit brake
CSDSEL
Input state High Open Mode standard standard
SDCC Select
Input state High Open Mode Function Function
LV8111V Description
Speed Control Circuit This realize high efficiency, low-jitter, stable rotation adopting speed control method. This circuit compares phase difference edge between signal signal controls using output error. servo frequency under control becomes congruent with frequency. (Servo) fCLK Output Drive Circuit This adopts direct drive method reduce power loss output. output transistor always saturated while transistor adjusts driving force motor changing duty that output transistor switching output performed upper-side output transistor. Also, this parasitic diode output DMOS regeneration route when switching off. But, this down fever than diode regeneration performing synchronous rectification. Current Limiter Circuit This limits (peak) current value (VRF 0.515V (typical), current detection resister)). current limitation operation consists reducing output duty suppress current. prevent malfunction current limitation operation when reverse recovery current diode detected, operation delay (approximately 300ns). case coil resistance motor small small inductance, since current change start-up fast, there possibility that current more than specified current flowed this delay. necessary current increases delay. Power Saving Circuit This becomes power saving state decreasing consumption current stop state. bias current majority circuits power saving state. Also, regulator output output power saving state. Reference Clock Note that externally-applied clock signal noise chattering. input circuit hysteresis. But, noise problem, that noise must excluded inserting capacitors across inputs. clock input goes input state when start state, drive turned after rotation motor motor constrained protection circuit does operate. (Clock disconnection protection)
No.A1416-11/13
LV8111V
Frequency frequency determined using capacitor connected pin. fPWM (29500 150pF more fPWM (32000 100pF more, less than 150pF frequency oscillated about 225kHz when capacitor 150pF connected. capacitor must placed close control block (GND possible reduce influence output. Hall Effect Sensor Input Signals signal input amplitude hysteresis 42mV more required Hall effect sensor inputs. Also, input amplitude over 100mVp-p desirable Hall effect sensor inputs view influence noise. output waveform (when phase changes distorted noise, that noise must excluded inputting capacitors across inputs. Signals Hall signal used signal noise problem, noise signal excluded inserting capacitor between FGFIL GND. Note that normal operation becomes impossible value capacitor overlarge. Also, note that trouble noise occurs easily when position capacitor incorrect. Constraint Protection Circuit This on-chip constraint protection circuit protect motor motor constraint mode. when CSDSEL high level open input, output remains high (unlocked statement) fixed period start state, this circuit operates. level setting case, signal switched fixed period start state, this circuit operates. Also, upper-side output transistor turned while constraint protection circuit operating. This time capacitance capacitor attached pin. time seconds) (µF) When capacitor 0.068µF attached, protection time becomes about seconds. time must well advance motor start-up time. When motor decelerated switching clock frequency, this protection circuit operated. clear motor constrained state, switched into stop state power must turned reapplied. Since also functions power-on reset pin, were connected directly ground, logic circuit goes reset state speed cannot controlled. Therefore, motor constraint protection circuit used, resistor about 220k capacitor about 4700pF must connected parallel between GND. Phase Lock Signals Phase lock range This speed system counter. speed error range phase lock state indeterminable only characteristics because accelerations change frequency influences.) When necessary specify speed error motor, value obtained while motor actually operating must measured. Since speed error occurs easily when accelerations large, speed error will largest when goes into lock state during start-up unlocked state switching clock. Phase lock signal mask functions When goes into lock state during start-up unlocked state switching clock, signal short-time using hunting when goes into locked state masked. Therefore, lock signal output stable state. But, mask time duration causes delay lock signal output. mask time capacitance capacitor attached between GND. mask time (seconds) (µF) When capacitor 0.1µF attached, mask time becomes about 180ms. signals should masked completely, mask time must well advance. When there need masking, must left open.
No.A1416-12/13
LV8111V
Power Supply Stabilization Since this used applications that draw large output currents adopts drive method switching, power-Supply line subject fluctuations. Therefore, capacitors with capacitances adequate stabilize power-supply voltage must connected between GND. ground-side capacitor must connected close GND2 power possible. impossible connect capacitor (electrolytic capacitor) near pin, ceramic capacitor about 0.1µF must connected close possible. diodes inserted power-supply line prevent destruction reverse power supply connection, Since this makes power-supply voltage even more subject fluctuations, even larger capacitors will required. VREG Stabilization stabilize VREG voltage that power supply control circuit, connect capacitor 0.1µF more. capacitor must attached close control block (GND1 pin) possible. Error Amplifier External components error amplifier block must placed close possible reduce influence noise. Also, these components must placed separate from motor possible. Reverse Metal improve heat radiation, metal part reverse stuck fast substrate using highly-conduction solder. SDCC (Speed Detection Current Control) function SDCC circuit controls speed detection current. limits current specified current reduce acceleration motor when rotation motor exceeds target speed. This enables stabilized phase lock pull-in minimizes variation startup time. SDCC function enabled setting low. disabled setting high open. Notes: selected state SDCC does match rotational direction motor, necessary solve problem changing HALL bias.
SANYO Semiconductor Co.,Ltd. assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO Semiconductor Co.,Ltd. products described contained herein. SANYO Semiconductor Co.,Ltd. strives supply high-quality high-reliability products, however, semiconductor products fail malfunction with some probability. possible that these probabilistic failures malfunction could give rise accidents events that could endanger human lives, trouble that could give rise smoke fire, accidents that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO Semiconductor Co.,Ltd. products described contained herein controlled under applicable local export control laws regulations, such products require export license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written consent SANYO Semiconductor Co.,Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO Semiconductor Co.,Ltd. product that intend use. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. Upon using technical information products described herein, neither warranty license shall granted with regard intellectual property rights other rights SANYO Semiconductor Co.,Ltd. third party. SANYO Semiconductor Co.,Ltd. shall liable claim suits with regard third party's intellctual property rights which resulted from technical information products mentioned above.
This catalog provides information ofof June, 2009. Specifications information herein subject catalog provides information February, 2009. Specifications information herein subject change without notice. No.A1416-13/13

Bi-CMOS LV8111V Polygon Mirror Motor 3-phase Brushless

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