Bi-CMOS LV1117N/NV Surround Processor Electronic Volume

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Bi-CMOS LV1117N/NV Surround Processor Electronic Volume

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Ordering number ENA1046
Bi-CMOS
LV1117N/NV
Surround Processor
Electronic Volume Control
LV1117N/NV sound processor developed sets. They incorporate surround processing functions including (AViSS), pseudo stereo function, (L+R) output, major functional blocks electronic volume control
Features
Input function (4ch stereo inputs R]). Line (through output). Input gain control (-6dB, -4dB, 0dB, 4dB, 6dB: positions). AViSS (ON/OFF/6-stage level control). Tone control (BASS: ±20dB, TREBLE: ±18dB steps]). Volume control (0dB -14dB: step/-14dB -80dB: steps/-=-82dB). Balance control. Through mode/Mute mode. Pseudo stereo function (ON/OFF/MONO). output with (Mute 7-stage level control: positions). control. Parallel output ports (4pin). Initial gain controlled resistance value external resistor.
SANYO Semiconductor Co.,Ltd. products described contained herein are, with regard "standard application", intended general electronics equipment (home appliances, equipment, communication device, office equipment, industrial equipment etc.). products mentioned herein shall intended "special application" (medical equipment whose purpose sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level reliability directly threaten human lives case failure malfunction product cause harm human bodies, shall they grant guarantee thereof. should intend products applications outside standard applications customer considering such and/or outside scope intended standard applications, please consult with prior intended use. there consultation inquiry before intended use, customer shall solely responsible use. Specifications SANYO Semiconductor Co.,Ltd. products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer' products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer' products equipment.
22008 20051207-S00008 No.A1046-1/18
LV1117N/1117NV
Specifications
Maximum Ratings 25°C
Parameter Maximum supply voltage Allowable power dissipation Allowable power dissipation Operating temperature Storage temperature Symbol max1 max2 Topr Tstg 70°C, 70°C SSOP Conditions Ratings 10.5 +125 Unit
Note Mounted specified board: glass epoxy board Operating Condtions 25°C
Parameter Recommended supply voltage Operating supply voltage Operating supply voltage Control data level voltage level voltage Pulse width Hold time Operating frequency thold fopg Symbol opg1 opg2 SSOP Conditions Ratings 10.0 Unit
Electrical Characteristics 25°C, 9.0V, 1kHz, 300mVrms 0dB, (Input=L/Rch-A, Output=L/R-VROUT)
Parameter Quiescent current Symbol ICCO THDT VNOT THDM VNOM CVOS THDS VNOS THDS VNOS THDS VNOS THD=1% AUDIO AUDIO AUDIO THD=1% AUDIO AUDIO AUDIO -1.6 Conditions Ratings Unit
Total through (Total through mode, Volume control: 0dB) Voltage gain Maximum output voltage Total harmonic distortion Output noise voltage Cross talk -0.6 0.03 +0.6 Vrms
Matrix through (Matrix mode, Input gain: 0dB, Volume control: 0dB) Voltage gain Maximum output voltage Total harmonic distortion Output noise voltage Cross talk -1.7 -0.7 0.04 +0.7 Vrms
MONO mode (MONO mode, Input gain: 0dB, Volume control: 0dB) Maximum output voltage Total harmonic distortion Output noise voltage THD=1% AUDIO AUDIO 0.04 Vrms
Surround (Surround mode-A, Input gain: 0dB, Volume control: 0dB) Maximum output voltage Total harmonic distortion Output noise voltage THD=1% AUDIO AUDIO Vrms
Pseudo stereo (Pseudo stereo mode, Input gain: 0dB, Volume control: 0dB) Maximum output voltage Total harmonic distortion Output noise voltage THD=1% AUDIO AUDIO 0.07 Vrms
Continued next page.
No.A1046-2/18
LV1117N/1117NV
Continued from preceding page.
Parameter Symbol Conditions Ratings Unit
Bass band (Matrix through mode, Input gain: 0dB, Volume control: 0dB) Control Range Step resolution GeqB EstepB GeqT EstepT THDF VNOF THD=1% AUDIO AUDIO Max. Boost/Cut Max. Boost/Cut
Treble band (Matrix through mode, Input gain: 0dB, Volume control: 0dB) Control Range Step resolution
output (Output=L+R-OUT, Step=0dB, L+R_Step=Step4) Voltage gain Maximum output voltage Total harmonic distortion Output noise voltage Port Output (20/21/22/23pin) level output voltage Port output sink Current IO=1mA -2.3 -1.3 0.03 -0.3 Vrms
Note: output wave form becomes depending surround tone control setting. Please make sure output waveform distorted. waveform distorted, reduce gain setting surround, tone control, input signal level.
Package Dimensions
unit (typ) 3025C
37.7
[LV1117N]
0.95
5.1max (4.25)
0.51min
1.78
0.48
(1.05)
SANYO DIP42S(600mil)
0.25
15.24
13.8
No.A1046-3/18
LV1117N/1117NV
Package Dimensions
unit (typ) 3277
15.0
[LV1117NV]
(0.68)
0.65
0.22
SANYO SSOP44(275mil)
(1.5) 1.7max
No.A1046-4/18
AGND HPFC L-TC1
Lch-A
Lch-B
Lch-C
Lch-D L-DC ST-2 L-BC1 DATA OUT0
Line L-BC2 L-OUT L-VRIN
TONE CONT DATA CONTROL CONTROL Matrix Bypass Bypass MUTE TOTAL
Block Diagram [LV1117N]
Pseud Stereo (AViSS) SURROUND
ANALOG
LV1117N/1117NV
Bypass Matrix
Bypass TOTAL
TONE CONT
R-DC Rch-D Line Rch-B Rch-C
ST-1
LPFC R-TC1
R-BC1
Rch-A
R-BC2 R-OUT R-VRIN
OUT1 MUTE VREF OUT2 OUT3
No.A1046-5/18
AGND HPFC L-TC1
Lch-A
Lch-B
Lch-C
Lch-D L-DC ST-2 L-BC1 DATA OUT0
Line L-BC2 L-OUT L-VRIN
TONE CONT CONTROL Matrix Bypass Bypass MUTE TOTAL DATA CONTROL
Block Diagram [LV1117NV]
Pseud Stereo (AViSS) SURROUND
ANALOG
LV1117N/1117NV
Bypass Bypass Matrix
TOTAL
TONE CONT
R-DC ST-1 Rch-D Line Rch-C
R-BC1
Rch-A
Rch-B
LPFC R-TC1
R-BC2 R-OUT R-VRIN
OUT1 MUTE VREF OUT2 OUT3
No.A1046-6/18
LV1117N/1117NV
Control Signal
tHIGH tLOW tHD:DAT tSU:DAT
tSU:STA
tHD:STA
tSU:STO
tBUF
Figure1 Control Signal timing chart
register
explanation (Inter Bus) system which PHILIPS company developed. does controls such start, stop control signals (Serial Data) (Serial Clock). output each signal open drain forms wired
Start condition Stop condition ACK: Acknowledge Data transmitted first. unit composed bits back from slave confirm. Slave reads data with rising edge SCL. Master changes data falling edge SCL. control register Table1 Slave Address
Note; LV1117N/NV reception exclusive use. depends uses fixation. Table2 transmission
Function Input control/Gain control Volume control Output/Surround/MODE control Tone control [Bass] Tone control [TREBLE] Output port control Address BINARY 0000 0001 0000 0010 0000 0011 0000 0100 0000 0101 0000 0110 Gain Volume Surround OUT3 Bass TREBLE OUT2 OUT1 OUT0 MODE Data Input
Channel gain
Table3 Input Selection
Address Mute Data
No.A1046-7/18
LV1117N/1117NV
Table4 Gain control
Address -6dB -4dB +4dB +6dB Data
Table5 Mode control
Address Total Matrix Mono Pseudo Data
Table6 Surround control
Address MODE-C MODE-B MODE-A MODE-F MODE-E MODE-D Data
Note; time forced mono mode, there surround effect. Note; Output gain Step1 Step7 Table7 Output Gain control
Address MUTE Step1 Step2 Step3 Step4 Step5 Step6 Step7 Data
Note; Output gain Step1 Step7
No.A1046-8/18
LV1117N/1117NV
Table8 Tone control [Bass control]
Address +20dB +18dB +16dB +14dB +12dB +10dB +8dB +6dB +4dB +2dB -2dB -4dB -6dB -8dB -10dB -12dB -14dB -16dB -18dB -20dB Data
Table9 Tone control [TREBLE control]
Address +18dB +16dB +14dB +12dB +10dB +8dB +6dB +4dB +2dB -2dB -4dB -6dB -8dB -10dB -12dB -14dB -16dB -18dB Data
No.A1046-9/18
LV1117N/1117NV
Table10 Volume control
Address -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -16dB -18dB -20dB -22dB -24dB -26dB -28dB -30dB -32dB -34dB -36dB -38dB -40dB -42dB -44dB -46dB -48dB -50dB -52dB -54dB -56dB -58dB -60dB -62dB -64dB -66dB -68dB -70dB -72dB -74dB -76dB -78dB -80dB Data
No.A1046-10/18
LV1117N/1117NV
Table11 Volume channel control
Address L-ch R-ch Data
Table12 Output port control
Address (sink) (open) Data
Functions [LV1117N]
INPUT-A(R) INPUT-A(L) INPUT-B(R) INPUT-B(L) INPUT-C(R) INPUT-C(L) INPUT-D(R) INPUT-D(L) LINE-OUT(R) VREF Function Output ro=700 Function Voltage VREF Input Impedance ri=50k Remarks Internal equivalent circuit
LINE-OUT(L)
Cut(R)
VREF
offset cancellation capacitor connection
Cut(L)
ST-1
VREF
Pseudo stereo phase shift capacitor connection
ST-2
AViSS
VREF
Capacitor connection surround pass filter
Continued next page.
No.A1046-11/18
LV1117N/1117NV
Continued from preceding page.
Function TREBLE(R) Voltage VREF treble filter Remarks Capacitor connection configuring Internal equivalent circuit
TREBLE(L)
BASS-1(R) BASS-1(L) BASS-2(R) BASS-2(L) OUT(R)
VREF
Bass band filter configuration capacitor resistor connection pins
VREF
Output Impedance ro=100
OUT(L)
EVR-IN(R)
VREF
Input Impedance ri=50k
EVR-IN(L)
EVR-OUT(R)
VREF
Output Impedance ro=100
EVR-OUT(L)
VREF
Output Impedance ro=10k
VREF
0.5VCC
Reference voltage
Continued next page.
No.A1046-12/18
LV1117N/1117NV
Continued from preceding page.
Output Output Output Output I2C-DATA I2C-CLK VREF Internal resistor control data input Function Voltage open drain port output Remarks Internal equivalent circuit
AViSS
VREF
ANALOG
VREF
No.A1046-13/18
LV1117N/1117NV
Treble Bass Band Block Equivalent Circuit Diagram
From L-Input Block ±2dB ±4dB ±6dB ±8dB ±10dB ±12dB ±14dB ±16dB ±18dB R1=10.633k R2=8.446k R3=6.709k R4=5.329k R5=4.233k R6=3.363k R7=2.671k R8=2.122k R9=1.665k R10=6.510k Total=51.7k ±2dB ±4dB ±6dB ±8dB ±10dB ±12dB ±14dB ±16dB ±18dB ±20dB R12=100 L-TC1 L-BC2 R1=15.220k R2=12.089k R3=9.603k R4=7.628k R5=6.059k R6=4.813k R7=3.823k R8=3.037k R9=2.412k R10=1.916k R11=100 Total=66.7k L-OUT Block
L-BC1
Same Right channel
During boost, during cut, when 0dB, 0dBSW
Block Equivalent Circuit Diagram
From L-VROUT
R1=50k Mute R2=50k From R-VROUT Step1 Step2 Step3 Step4 Step5 Step6 Step7 R3=50k R5=10.284k R6=8.169k R7=6.489k R8=5.154k R9=4.094k R10=3.252k R11=12.559k Total=50k R4=10k
L+R_LPF
AGND
ILV00257
No.A1046-14/18
LV1117N/1117NV
Tone Circuit Constant Calculation Examples
Treble Band Circuit: shelving characteristics obtained treble band. equivalent circuit calculation formula during boost indicated below. Calculation example Specification frequency: 10000Hz Gain during maximum boost: G+18dB 17.5dB 6.51k 45.19k above constants inserted following formula Log10 R12+(1/ 10G/20-1
-R12
224000
45190 7.50
2700 (pF)
6510
Bass Band Circuit: equivalent circuit formula calculating external with mean frequency 100Hz shown below. Base band equivalent circuit diagram Calculation example specification Mean frequency: 100Hz Gain during maximum boost: G+20dB 20dB 66.7k,
obtain from 20dB Log10
G+20dB/20
66700 3.6k
obtain from mean frequency 100Hz (R3R2C1C2) R3R2 66700 3600 0.1F
obtain R3R2 R3R2 2.15
Note item when using When turning power, setting inside unsettled. Before setting control data, does mute. prevent digital noise high frequency influence terminal. (SCL, SDA) protected signal line ground pattern shielding cable. prevent noise changing mode, please mute
No.A1046-15/18
LV1117N/1117NV
Volume Control Step Characteristics
9.0V 0dBV Input VRIN Output VROUT
Gain Frequency
9.0V -10dBV Input Ch-A Output
Volume attenuation (dB)
Gain Attenetion (dB)
Step Setting (dB)
Gain Step (dB)
Bass Band Frequency Characteristics
1000 10000 100000
9.0V -20dBV 0.1uF 3.6k Input Ch-A Output
Treble Band Frequency Characteristics
9.0V -20dBV 2700pF Input Ch-A Output
Gain (dBV)
Gain (dBV)
1000
10000
100000
Frequency (Hz)
Frequency (Hz)
Surround Mode Frequency Characteristics
9.0V -20dBV Input Ch-A Output
Frequency Characteristics
9.0V 0dBV Input VRIN Output VROUT
Gain (dBV)
Gain (dBV)
1000 10000 100000
1000 10000 100000
Frequency (Hz) Pseud Phese Shift Frequency Characteristics
9.0V -20dBV Input Ch-A Output
Frequency (Hz)
Vomax Characteristics
100.0
Phase Shift (DEG)
Vomax (dBV)
10.0
Total
Matrix
Input Ch-A Output
Frequency (Hz)
1000
10000
100000
No.A1046-16/18
LV1117N/1117NV
characteristics
characteristics (Surround)
Vcc=9.0V fin=1kHz Mode_A
Total harmonic distotion
Total harmonic distotion
Vcc=9.0V fin=1kHz
0.01
Total Matrix Mono Psudo
0.01
0.001
0.001
(dBV)
(dBV)
Frequency Characteistics
Supply Voltage Characteristics
Vin=-10dBV fin=1kHz
Total harmonic distotion
Total harmonic distotion
Vcc=9.0V Vin=-10dBV
Total Matrix Mono Psudo Surround
Total Matrix Mono Psudo Surround
0.01
1000
10000
100000
0.01
10.0
11.0
Frequency (Hz)
Supply Voltage
VREF
10.0 11.0
VREF
10.0
11.0
AGND
65.0 60.0 55.0
ICCO
10.0 11.0
ICCO (mA)
AGND
50.0 45.0 40.0 35.0 30.0 25.0 20.0 10.0 11.0
No.A1046-17/18
LV1117N/1117NV
SANYO Semiconductor Co.,Ltd. assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO Semiconductor Co.,Ltd. products described contained herein. SANYO Semiconductor Co.,Ltd. strives supply high-quality high-reliability products, however, semiconductor products fail malfunction with some probability. possible that these probabilistic failures malfunction could give rise accidents events that could endanger human lives, trouble that could give rise smoke fire, accidents that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO Semiconductor Co.,Ltd. products described contained herein controlled under applicable local export control laws regulations, such products require export license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written consent SANYO Semiconductor Co.,Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO Semiconductor Co.,Ltd. product that intend use. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. Upon using technical information products described herein, neither warranty license shall granted with regard intellectual property rights other rights SANYO Semiconductor Co.,Ltd. third party. SANYO Semiconductor Co.,Ltd. shall liable claim suits with regard third party's intellectual property rights which resulted from technical information products mentioned above.
This catalog provides information February, 2008. Specifications information herein subject change without notice.
No.A1046-18/18

Bi-CMOS LV1117N/NV Surround Processor Electronic Volume

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