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Monolithic Digital LB1872 Polygon Mirror Motors 3-phase


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Ordering number EN5625C
Monolithic Digital
LB1872
Polygon Mirror Motors
3-phase Brushless Motor Driver
LB1872 3-phase brushless motor driver developed driving polygon mirror motor used laser printers similar products.
Features
Integrates circuits (speed control driver circuits) required laser printer polygon mirror motor drive single chip. Uses current linear drive technique minimal motor noise. Only small capacitors required output oscillation prevention. speed control adopted high-precision rotation with excellent jitter characteristics. Phase lock detection output with chattering prevention function. Four rotation rates using single crystal oscillator support 240, 300, 400, 600dpi operation. Arbitrary rotation rates acquired when external clock used. Deceleration function implemented short-circuit braking (free running when stopped). Built-in error amplifiers. Full complement protection circuits, including thermal protection, voltage protection, current limiter circuits, provided chip.
Specifications
Maximum Ratings 25°C
Parameter Maximum supply voltage Maximum output current Allowable power dissipation Symbol max1 max2 Operating temperature Storage temperature Topr Tstg 0.5s Independent Infinitely large heat sink Conditions Ratings +150 Unit
SANYO Semiconductor Co.,Ltd. products described contained herein are, with regard "standard application", intended general electronics equipment (home appliances, equipment, communication device, office equipment, industrial equipment etc.). products mentioned herein shall intended "special application" (medical equipment whose purpose sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level reliability directly threaten human lives case failure malfunction product cause harm human bodies, shall they grant guarantee thereof. should intend products applications outside standard applications customer considering such and/or outside scope intended standard applications, please consult with prior intended use. there consultation inquiry before intended use, customer shall solely responsible use. Specifications SANYO Semiconductor Co.,Ltd. products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer' products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer' products equipment.
31809 13098HA(OT) No.5625-1/11
LB1872
Allowable Operating Ranges 25°C
Parameter Supply voltage 5.0V fixed-voltage output current voltage voltage output current output current Symbol IREG VFGS IFGS Conditions Ratings Unit
Electrical Characteristics 25°C,
Parameter Current drain Symbol stop mode Conditions Ratings Unit
Output Saturation Voltage VAGC Source V(sat)1-1 V(sat)1-2 Sink V(sat)2-1 V(sat)2-1 Output leakage current Fixed-Voltage Output Output voltage Voltage regulation Load regulation Temperature coefficient Hall Input Block Input bias current Differential-mode input range Common-mode input range Input offset voltage Voltage Protection Circuit Operating voltage Hysteresis Thermal Protection Circuit Shutdown temperature Hysteresis Amplifier Input offset voltage Input bias current bias level Output high-level voltage Output low-level voltage Schmitt Input Block Input hysteresis (high low) Input hysteresis (low high) Hysteresis Input operating level Output saturation voltage Output leakage current Error Amplifier Input offset voltage Input bias current bias level Output high-level voltage Output low-level voltage VIO(ER) IB(ER) VB(ER) VOH(ER) VOL(ER) -500µA IERI 100µA, 500µA Design target value* VREG-1.2 1/2VREG VREG-0.8 VSHL VSLH VFGL VFGSIL VFGS(sat) IL(FGS) IFGS VIO(FG) IB(FG) VB(FG) VOH(FG) VOL(FG) -500µA 500µA Design target value* VREG-1.2 1/2VREG VREG-0.8 Design target value* (junction temperature) Design target value* (junction temperature) IB(HA) VHIN VICM VIOH VAGC With sine wave input Differential input: 50mVp-p Design target value* VCC-3.5 VREG VREG1 VREG2 VREG3 10mA Design target value* 4.65 5.35 mV/°C IO(leak) 0.7A, 1.5A, 0.7A, 1.5A,
Design target value, measurement
Continued next page. No.5625-2/11
LB1872
Continued from preceding page.
Parameter Phase Comparator Output Output high-level voltage Output low-level voltage Output source current Output sink current Lock Detection Output Output saturation voltage Output leakage current Drive Block Output idling voltage Forward gain GDF1 GDF2 Current limiter Brake command voltage Reference Signal Block Crystal oscillator frequency Low-level voltage High-level current External input frequency High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current High-level input voltage Middle-level input voltage Low-level input voltage Input open voltage High-level input current Low-level input current High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current Charge current Discharge current ICLD1 ICLD2 VCLD (Phase locked) VCLD VREG/2 (Phase unlocked) VIH(SS) VIL(SS) VIO(SS) VIS(SS) IIH(SS) IIL(SS) VS/S VREG VS/S VREG-0.5 -350 -275 VREG VREG VIH(N2) VIM(N2) VIL(N2) VIO(N2) IIH(N2) IIL(N2) VREG -270 -200 VREG fI(N1) VIH(N1) VIL(N1) VIO(NI) VIS(N1) IIH(N1) IIL(N1) VREG external clock mode VREG-0.5 -350 -275 10000 VREG VREG fOSC VOSCL IOSCH crystal oscillator mode IOSC -0.5mA VOSC VOSCL 0.3V VBRK When phase locked When unlocked 0.45 0.55 VLD(sat) ILDLEAK VPDH VPDL IPD+ IPDIOH -100µA 100µA VREG/2 VREG/2 VREG-0.2 VREG-0.1 -0.6 Symbol Conditions Ratings Unit
No.5625-3/11
LB1872
Package Dimensions
unit (typ) 3147C
Infinitely large heat sink
Allowable power dissipation,
12.7 11.2
R1.7
20.0 26.75
Independent
1.68
(1.81)
1.78
Ambient temperature,
SANYO DIP28H(500mil)
Assignment
IN3- IN3+ IN1- IN1+ IN2- IN2+ OUT3 OUT2 OUT1 VREG view FGIN- FGOUT
LB1872
Clock Divisor Switching
open Divisor 2048 512) 4096 512) 5120 512) 3072 512) EXT.CLK
3-Phase Logic Truth Table
OUT1 OUT2 OUT3
No.5625-4/11
LB1872
Block Diagram
OUT1 OUT2 OUT3
DRIVER
Vreg
CONTROL CIRCUIT
CURR
CONT
LVSD
ERROR
Vreg
HALL MATRIX
LOCK
Vreg
Vreg
DIVIDER
SELECT
FGOUT Vreg Vreg
Vreg
FGIN-
Vreg
X'tal
Vreg
No.5625-5/11
LB1872
Function
name IN3- IN3+ IN1- IN1+ IN2- IN2+ Function Hall amplifier inputs. input high state, reverse input state. Connect capacitor between inputs there noise Hall sensor signals. amplitude over 50mVp-p under 350mVp-p desirable Hall sensor signals. Kickback occur output input signal amplitude greater than 350mVp-p.
Equivalent circuit
OUT3 OUT2 OUT1
Motor drive outputs. Connect capacitors between motor outputs between motor outputs ground) oscillation occurs outputs. (Use capacitors range 0.1µF 0.47µF.)
VREG
Output current detection. Connect resistor (Rf) between this ground. output current limited IOUT VREG/Rf.
VREG
Power supply Stabilized power supply output output). Connect capacitor (about 0.1µF) between this ground stabilization.
Crystal oscillator connections. These pins used drive reference clock oscillator element. external clock (with frequency MHz) used, connect resistor (about 13k) series input clock signal through that resistor. Leave open this case.
VREG
Control amplifier frequency correction. Current limiter system closed loop oscillation prevented inserting capacitor (about 0.022 0.47µF) between this ground. capacitance this capacitor large, output current response characteristics degraded.
VREG
Continued next page.
No.5625-6/11
LB1872
Continued from preceding page.
name Error amplifier output. When high, output current increased. Function Equivalent circuit
VREG
Control amplifier
Error amplifier input.
VREG
Phase comparator output (PLL output). phase error output changes duty pulse waveform. output current increased duty becomes smaller.
VREG
output mask time setting. Chattering masked inserting capacitor (about 0.47µF) between this ground. startup time increased masking used servo constants re-optimized.
VREG
Phase lock detector output. This goes state when phase locked. This collector output.
VREG
Divisor switch. Low: 1.0V Middle: 3.0V High: VREG This goes middle level when open.
VREG
Continued next page.
No.5625-7/11
LB1872
Continued from preceding page.
name Function Divisor switch external clock input. Low: 1.5V High: VREG This functions external clock input when middle level. This goes high level when open.
Equivalent circuit
VREG
Start/stop control. Low: Start High: Stop This goes high level when open.
VREG
pulse-converted output. This outputs post-hysteresis comparator signal. This open collector output.
VREG
FGOUT
amplifier output. noise signal problem, e.g. discharge noise detected, insert capacitor (about 0.01 0.1µF) between this ground.
VREG
schmitt comparator
FGIN-
amplifier input.
VREG
amplifier frequency characteristics correction. Insert capacitor (about 0.1µF) between this ground.
VREG
Ground.
No.5625-8/11
LB1872
LB1872 Functional Description Speed control circuit Since this adopts speed control circuit, provide high-precision, jitter-free, stable motor operation. This circuit compares phases (external clock) rising edge Schmitt output rising edge uses error output from that comparison control. internal clock system used, servo frequency determined following formula. Therefore, motor speed setting number pulses crystal oscillator frequency. fFG(servo) fOSC/N fOSC: Crystal oscillator frequency Clock divisor (See separately provided table.) external clock (input pin) used, controls motor speed holding servo frequency identical external clock frequency. Output drive circuit suppress motor noise much possible, this adopts three-phase full wave current linear drive technique. Also, adopts midpoint control technique prevent destruction output transistors. This uses short-circuit braking (lower side output) motor deceleration during speed switching lock pull stop mode, output turned off. motor with coil resistance (inter-phase) lower used, diodes (rectifying) inserted between outputs ground (for outputs) current limitation also applied during braking prevent excessive braking currents. Although this disadvantageous from standpoint, since states with large back states with high switching frequency amount time during which loads applied transistors will shorter, problems will particular severe. Current limiter circuit current limiter circuit peak current limiter whose limit current determined VRF/Rf (where 0.5V (typical) current detection resistor). Reference clock following three techniques used input reference clock used speed control. Crystal oscillator generated clock following circuit, consisting crystal element, capacitors, resistors, crystal oscillator circuit.
Sample External Component Values
Oscillator frequency (MHz) (µF) (pF) (pF) 220k 100k 4.7k
This circuit these component values only provided reference purposes. Consult with manufacturer crystal element concerning influence such factors characteristics crystal element itself stray capacitances printed circuit board wiring pattern assure that problems occur.
Used oscillator stabilization. Used oscillator element coupling. Improves oscillator margin.
VREG
No.5625-9/11
LB1872
Notes printed circuit board wiring Since crystal oscillator circuits high-frequency circuits, they easily influenced stray capacitances printed circuit board wiring. Therefore, lines external components must kept short possible lines must made narrow possible. this external circuit, connection between oscillator element (and particularly subject influence stray capacitance, requires special care. External clock (crystal oscillator equivalent: MHz) signal equivalent crystal oscillator signal input from external signal generator, input that signal through series resistor about 13kto pin. Leave open. External clock frequency equivalent: kHz) signal equivalent frequency input from external signal generator, middle level open) input that signal pin. this case, motor will remain stopped state (short-circuit braking operation) even start input applied when clock input. However, since heating large output drive currents that flow short braking state (since lower side transistors phases driven) care required braking state must held extended periods. Hall input signals Even amplitude Hall sensor input signals changed motor, influence output will suppressed circuit. However, there discrepancies between amplitudes three phases, output phase switching timing shifted. output current will protection circuit start signal input when there signals applied Hall inputs. maximum operating frequency Hall inputs affected saturation state outputs. While there problems frequencies under (the frequency single Hall phase), higher operating frequency required, advantageous outputs remain unsaturated. outputs remain unsaturated state, this used frequencies about kHz. Since motors with higher speeds have higher operating frequencies, recommend using motors with four motor magnet poles. output output goes when phase locked. Phase lock determined speed error phase error only. Therefore, speed error when output during, example, lock pull-in, will change with acceleration signal. (The speed error will smaller lower accelerations.) necessary stipulate speed error when output this must determined based result speed measurement motor state. This includes built-in circuit that masks output chattering (rapid switching between off) during phase lock pull-in. mask time determined shown below capacitance capacitor inserted between ground. 0.35 Mask time External capacitance (µF) chattering masked, output delayed mask time. Therefore care required, since speed error when changed mask time. Leave open there need masking. Power supply stabilization Since this provides large output currents, easily cause fluctuations power supply line voltage. Therefore, capacitors with adequate capacitances stabilization must inserted between ground pins. diodes inserted power supply lines prevent device destruction reverse power supply connection, power supply line voltage becomes especially liable fluctuations. this case, even larger capacitors required. External protection circuits application will include external motor constraint protection other external protection circuits, open collector transistor output shut drive current.
No.5625-10/11
LB1872
SANYO Semiconductor Co.,Ltd. assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO Semiconductor Co.,Ltd. products described contained herein. SANYO Semiconductor Co.,Ltd. strives supply high-quality high-reliability products, however, semiconductor products fail malfunction with some probability. possible that these probabilistic failures malfunction could give rise accidents events that could endanger human lives, trouble that could give rise smoke fire, accidents that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO Semiconductor Co.,Ltd. products described contained herein controlled under applicable local export control laws regulations, such products require export license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written consent SANYO Semiconductor Co.,Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO Semiconductor Co.,Ltd. product that intend use. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. Upon using technical information products described herein, neither warranty license shall granted with regard intellectual property rights other rights SANYO Semiconductor Co.,Ltd. third party. SANYO Semiconductor Co.,Ltd. shall liable claim suits with regard third party's intellctual property rights which resulted from technical information products mentioned above.
This catalog provides information March, 2009. Specifications information herein subject change without notice. No.5625-11/11

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