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parallel interface transceiver/buffer Rev. August 2008 Product da


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PDI1284P11
parallel interface transceiver/buffer
Rev. August 2008 Product data sheet
PDI1284P11 parallel interface chip designed provide asynchronous, 8-bit, bidirectional, parallel interface personal computers. PDI1284P11 includes signal lines defined IEEE 1284 interface specification Byte, Nibble, EPP, modes. PDI1284P11 designed hosts peripherals operating interface devices. eight transceiver pairs (A/B allow data transmission from A-bus B-bus, from B-bus A-bus, depending state direction DIR. B-bus lines have either totem pole resistor pull-up outputs, depending state high drive enable A-bus only totem pole style outputs. inputs compatible with least input hysteresis
Features
Asynchronous operation 8-bit transceivers additional buffer/driver lines peripheral cable Five additional control lines from cable tolerant protection: JESD22-A114E exceeds 2000 JESD22-A115-A exceeds Latch-up current protection exceeds JEDEC Input hysteresis Low-noise operation IEEE 1284 compliant level Overvoltage protection side off-state side 3-state option side active resistive pull-up option Cable side supply voltage operation
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Ordering information
Table Ordering information Package Temperature range Name PDI1284P11DL PDI1284P11DGG SSOP48 TSSOP48 Description plastic shrink small outline package; leads; body width plastic thin shrink small outline package; leads; body width Version SOT370-1 SOT362-1 Type number
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Functional diagram
CNTL
CNTL CNTL CNTL CNTL CNTL CNTL CNTL CNTL PLHI HLHO
001aai290
PLHO HLHI
Logic symbol
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Pinning information
Pinning
VCC(B) VCC(B) PLHO HLHI
001aai291
PLHI HLHO
PDI1284P11
configuration
description
Table Symbol PLHI
PDI1284P11_3
description Description high drive enable/disable input data input/output IEEE 1284 standard output/input[1] data input control input (cable)[1] control output (peripheral) supply voltage ground peripheral logic high input (peripheral)
B.V. 2008. rights reserved.
IEEE 1284 standard output[1]
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Table Symbol HLHO HLHI PLHO VCC(B)
description .continued Description host logic high output (cable) host logic high input (cable) peripheral logic high output (cable) supply voltage (cable side side output enable input (active LOW) direction selection input
with pull-up resistor load cable.
Functional description
Function selection
Table
Function table[1] Input HLHI PLHI PLHI Output HLHO PLHO PLHO Output type Z[2] RP[2]
side driving internal side driving external cable (bidirectional); side receiving control signals from external cable; HIGH voltage level; voltage level; Open Collector; don't care (control signals in); side driving external cable (unidirectional); high impedance (high-Z) 3-state; totem pole output; resistive pull-up: (nominal) B/Y/C cable side VCC. However, while side output driven signal side, that particular side resistor switched stop current drain from through When output signal isolated from input signal. Signals maintain resistive pull-up input this mode.
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Limiting values
Table Limiting values accordance with Absolute Maximum Rating System (IEC 60134).[1] Symbol VCC(B) Vtrt IGND Tstg Ptot
Parameter supply voltage supply voltage input clamping current output clamping current input voltage output voltage transient voltage supply current ground current output current storage temperature total power dissipation
Conditions pins pins VCC(B); cable side
-0.5 -0.5 -0.5 -0.5 -0.5
+4.6 +6.5 +5.5 +5.5 +150
Unit
side side side; transient
-200
output HIGH Tamb
performance capability high-performance integrated circuit conjunction with thermal environment create junction temperatures which detrimental reliability. input output voltage ratings exceeded input output current ratings observed. Vtrt guarantees only that PDI1284P11 will damaged reflections application long voltage levels remain specified range. Above value Ptot derates linearly with mW/K.
Recommended operating conditions
Table Symbol VCC(B) Tamb Operating conditions Parameter supply voltage supply voltage HIGH-level input voltage LOW-level input voltage output voltage HIGH-level output current LOW-level output current ambient temperature pins pins pins pins free-air Conditions pins pins VCC(B); cable side -0.5 +5.5 Unit
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Static characteristics
Table Static characteristics Tamb ground unless specified otherwise. Symbol Parameter LOW-level input voltage Conditions PLHI inputs; HLHI input;
1.55
Unit
HIGH-level input PLHI inputs; voltage inputs; HLHI input; hysteresis voltage LOW-level output voltage inputs; inputs; pins HLHO; pins HLHO; pins PLHO;
2.23
0.47 0.47 0.77
HIGH-level output voltage
pins HLHO; -500 pins HLHO; pins PLHO; 3.15
supply current
VCC; pins VCC(B); VCC(B) VCC; pins VCC(B); pins VCC(B) floating pins VCC(B); VCC; pins VCC(B) VCC(B) VCC(B) pins VCC(B) pins
±100 ±100
IOFF
power-off leakage current
pins VCC(B) VCC(B) 3-state; Figure 1.65 side side; output high-Z with resistive pull-up
input leakage current OFF-state output current output resistance pull-up resistance
1.15
1.65
Typical values Tamb Includes extra ICC(B) current from pull-up resistors, i.e. ICC(B) (total number inputs sides) (VCC(B) RPU). pull-up resistor side outputs makes impossible test side. This applies input current side inputs well.
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Dynamic characteristics
Table Dynamic characteristics ground Tamb unless specified otherwise. Symbol tPLH tPHL Parameter HIGH propagation delay HIGH propagation delay propagation delay Conditions Figure Figure Figure PLHI PLHO HLHI HLHO tdis slew rate disable time Bn/Yn; Figure Figure PLHO; Figure Figure load side enable time Figure PLHO; Figure Figure load side propagation delay difference tPZH tPHZ; output
Typ[2] 12.5 13.9
Unit
0.05
V/ns
same tPLH tPHL. Value Tamb tdis same tPHZ tPLZ. same tPZH tPZL.
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Waveforms
input tPLH output tPHL
001aai293
Input output propagation delays
input tPHL output
001aai292
tPLH
never goes below typical voltage output levels that occur with output load.
Input output propagation delays
input output
001aai295
Measurement data given Table measured both LOW-to-HIGH HIGH-to-LOW transition.
Table
Slew rate side Slew rate measurements transition (see Figure Rising from Falling from
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
tPLZ output LOW-to-OFF OFF-to-LOW tPHZ output HIGH-to-OFF OFF-to-HIGH outputs enabled outputs disabled outputs enabled
001aai294
tPZL
tPZH
Test circuit shown Figure Measurement points given Table typical voltage output levels that occur with output load.
Enable disable times
VEXT
mna616
Test conditions given Table
Table
Test circuit measuring enable disable times Test data test circuit measuring enable disable times Input Output VEXT tPZH, tPHZ open open tPZL, tPLZ 2VCC 2VCC
Parameter PHLO
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
negative pulse
001aai298
positive pulse
Input pulse definition
VEXT
001aai296
Test circuit
load capacitance includes probe capacitance. load resistance. termination resistance should equal output impedance pulse generator. Test conditions propagation delays given Table test conditions slew rate given Table
Table Output
Test circuit outputs; slew rate side Test conditions outputs Repetition rate
Switch position tPLH, tPZH tPHL, tPHZ VEXT
001aai299
measured forcing 0.5VCC output. output impedance then calculated 0.5VCC |IO|.
Output impedance
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Package outline
SSOP48: plastic shrink small outline package; leads; body width SOT370-1
detail
index
scale
DIMENSIONS original dimensions) UNIT max. 2.35 2.20 0.25 0.22 0.13 16.00 15.75 0.635 10.4 10.1 0.25 0.18 0.85 0.40
Note Plastic metal protrusions 0.25 maximum side included. OUTLINE VERSION SOT370-1 REFERENCES JEDEC MO-118 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Package outline SOT370-1 (SSOP48)
PDI1284P11_3 B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
TSSOP48: plastic thin shrink small outline package; leads; body width
SOT362-1
index
detail
scale
DIMENSIONS original dimensions). UNIT max. 0.15 0.05 1.05 0.85 0.25 0.28 0.17 12.6 12.4 0.50 0.35 0.25 0.08
Notes Plastic metal protrusions 0.15 maximum side included. Plastic interlead protrusions 0.25 maximum side included. OUTLINE VERSION SOT362-1 REFERENCES JEDEC MO-153 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Package outline SOT362-1 (TSSOP48)
PDI1284P11_3 B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Abbreviations
Table Acronym CMOS LSTTL Abbreviations Description Charged Device Model Complementary Metal-Oxide Semiconductor Device Under Test Extended Capability Port Enhanced Parallel Port ElectroStatic Discharge Human Body Model Low-power Schottky Transistor-Transistor Logic Machine Model Transistor-Transistor Logic
Revision history
Table Revision history Release date 20080825 Data sheet status Product data sheet Change notice Supersedes PDI1284P11_2 Document PDI1284P11_3 Modifications:
format this data sheet been redesigned comply with identity guidelines Semiconductors. Legal texts have been adapted company name where appropriate. Quick reference table removed. Table tPHL: Maximum value replaced Table Abbreviations list added. Product specification Product specification PDI1284P11_1
PDI1284P11_2 PDI1284P11_1
19990917 19970915
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Legal information
15.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
Product status[3] Development Qualification Production
Definition This document contains data from objective specification product development. This document contains data from preliminary specification. This document contains product specification.
Please consult most recently issued document before initiating completing design. term `short data sheet' explained section "Definitions". product status device(s) described this document have changed since this document published differ case multiple devices. latest product status information available Internet http://www.nxp.com.
15.2 Definitions
Draft document draft version only. content still under internal review subject formal approval, which result modifications additions. Semiconductors does give representations warranties accuracy completeness information included herein shall have liability consequences such information. Short data sheet short data sheet extract from full data sheet with same product type number(s) title. short data sheet intended quick reference only should relied upon contain detailed full information. detailed full information relevant full data sheet, which available request local Semiconductors sales office. case inconsistency conflict with short data sheet, full data sheet shall prevail.
malfunction Semiconductors product reasonably expected result personal injury, death severe property environmental damage. Semiconductors accepts liability inclusion and/or Semiconductors products such equipment applications therefore such inclusion and/or customer's risk. Applications Applications that described herein these products illustrative purposes only. Semiconductors makes representation warranty that such applications will suitable specified without further testing modification. Limiting values Stress above more limiting values defined Absolute Maximum Ratings System 60134) cause permanent damage device. Limiting values stress ratings only operation device these other conditions above those given Characteristics sections this document implied. Exposure limiting values extended periods affect device reliability. Terms conditions sale Semiconductors products sold subject general terms conditions commercial sale, published including those pertaining warranty, intellectual property rights infringement limitation liability, unless explicitly otherwise agreed writing Semiconductors. case inconsistency conflict between information this document such terms conditions, latter will prevail. offer sell license Nothing this document interpreted construed offer sell products that open acceptance grant, conveyance implication license under copyrights, patents other industrial intellectual property rights.
15.3 Disclaimers
General Information this document believed accurate reliable. However, Semiconductors does give representations warranties, expressed implied, accuracy completeness such information shall have liability consequences such information. Right make changes Semiconductors reserves right make changes information published this document, including without limitation specifications product descriptions, time without notice. This document supersedes replaces information supplied prior publication hereof. Suitability Semiconductors products designed, authorized warranted suitable medical, military, aircraft, space life support equipment, applications where failure
15.4 Trademarks
Notice: referenced brands, product names, service names trademarks property their respective owners.
Contact information
more information, please visit: http://www.nxp.com sales office addresses, please send email salesaddresses@nxp.com
PDI1284P11_3
B.V. 2008. rights reserved.
Product data sheet
Rev. August 2008
Semiconductors
PDI1284P11
parallel interface transceiver/buffer
Contents
15.1 15.2 15.3 15.4 General description Features Ordering information Functional diagram Pinning information Pinning description Functional description Function selection. Limiting values. Recommended operating conditions. Static characteristics. Dynamic characteristics Waveforms Package outline Abbreviations Revision history Legal information. Data sheet status Definitions Disclaimers Trademarks Contact information. Contents
Please aware that important notices concerning this document product(s) described herein, have been included section `Legal information'.
B.V. 2008.
rights reserved.
more information, please visit: http://www.nxp.com sales office addresses, please send email salesaddresses@nxp.com Date release: August 2008 Document identifier: PDI1284P11_3

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