3-channel Video Buffer with Built-in wideband SM5308AS 3-channel

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3-channel Video Buffer with Built-in wideband SM5308AS 3-channel

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SM5308AS
3-channel Video Buffer with Built-in wideband
SM5308AS 3-channel video buffer with built-in 5th-order lowpass filters. lowpass filter cutoff frequency range adjust from 5.0MHz 44MHz*1 steps. lowpass filter supports 480i 1080i format, video signal equipment analog input/outputs. video input systems, device functions next-stage system anti-aliasing filter. video output systems, filter reduces video aliasing external noise drive terminating resistance. cutoff frequency, signal input type, output gain switching controlled using I2C-BUS*2, slave address (3-state input) allow three SM5308AS same bus.
When resistor connected ISET (RISET) 1.8k. I2C-BUS registered trademark Philips Electronics N.V.
FEATURES
PINOUT
(Top view)
Supply voltages Analog: 4.75 5.25V Digital: 5.5V Lowpass filter with adjustable cutoff frequency (256 steps) Cutoff frequency range: 5.0MHz 44MHz (RISET 1.8k) Filter bypass mode function display specifications SXGA resolution Passband: 80MHz (typ) Half mode switch function (CH-2, CH-3) suitable component signals Video input pins independently synctip clamp/bias/direct inputs terminating resistance drive capability Output gain switching: 0dB/6dB Disable function 300µA current consumption when disabled I2C-BUS interface control Slave address: 90h, 92h, three devices used simultaneously, selected input) Data transfer rate: Fast mode 400kbit/s) Operating ambient temperature range: 70°C Package: 28-pin HSOP
REF1 TEST
REF2 REF3 VCC1 OUT1 GND1 VCC2
ISET
OUT2 GND2 VCC3 OUT3 GND3
PACKAGE DIMENSIONS
(Unit:
0.15
APPLICATIONS
HDTVs PDPs Projectors
1.3TYP 18.6
5.15
0.10 0.35 0.05
0.12
Device SM5308AS
Package 28-pin HSOP
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0.05
ORDERING INFORMATION
SM5308AS
BLOCK DIAGRAM
ISET REF1
Control
Vref Current Source
REF2 REF3
Bypass 0dB/6dB
Clamp/Bias/Direct
VCC1 OUT1
order (Standard
Filter GND1
CH-1
Bypass 0dB/6dB
Clamp/Bias/Direct
VCC2 OUT2
order (Standard /Half
Filter GND2
CH-2
Bypass 0dB/6dB
Clamp/Bias/Direct
VCC3 OUT3
order (Standard /Half
Filter GND3
CH-3
Note. recommended value external resistor (RISET) connected ISET 1.8k.
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SM5308AS
DESCRIPTION
Number input, output analog, digital Name REF1 TEST ISET GND3 OUT3 VCC3 GND2 OUT2 VCC2 GND1 OUT1 VCC1 REF3 REF2 I/O*1 A/D*2 Internal reference voltage Digital supply data signal input/output clock signal input Digital ground Test (connect ground) slave address select (3-state input) Video signal input (CH-1 input) connection Internal current-setting resistor (RISET) connection (standard 1.8k) Video signal input (CH-2 input) connection Video signal input (CH-3 input) connection Analog ground (CH-3) connection Video signal output (CH-3) Analog supply (CH-3) Analog ground (CH-2) connection Video signal output (CH-2) Analog supply (CH-2) Analog ground (CH-1, Vref) connection Video signal output (CH-1) Analog supply (CH-1, Vref) Internal reference voltage Internal reference voltage Description
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SM5308AS
EQUIVALENT CIRCUITS
Number Name I/O*1 Equivalent circuit
VCCn
INnA
GNDn
VCCn
OUT1 OUT2 OUT3
OUTnA
GNDn
VCC1
REF1
REF1
GND1
VCC1
REF2
REF2
GND1
VCC1
REF3
REF3
GND1
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SM5308AS
Number Name I/O*1 Equivalent circuit
input, output Note. Resistance values equivalent circuits indicate design values.
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SM5308AS
SPECIFICATIONS
Absolute Maximum Ratings
GND1 GND2 GND3 VCC1 VCC2 VCC3
Parameter Supply voltage Input voltage Storage temperature range Power dissipation Junction temperature Symbol TSTG 60°C/W Note. measured quantity under mounted condition which specified. Condition VCC1, VCC2, VCC3, ADS, SDA, SCL, Rating Unit
Recommended Operating Conditions
Parameter Supply voltage Supply voltage difference Supply voltage Operating ambient temperature Symbol Condition VCC1, VCC2, VCC3 VCC1 VCC2, VCC1 VCC3, VCC2 VCC3 Rating 4.75 5.25 Unit
Note. VCC1 VCC3 should applied simultaneously.
Electrical Characteristics
Characteristics 5.0V, 5.5V, 25°C, 100kHz, 1.0Vp-p, RISET 1.8k, CH-1 clamp input, CH-2 CH-3 bias input, FCDATA 227, unless otherwise noted.
Rating Parameter Current consumption Current consumption Current consumption Current consumption HIGH-level input voltage LOW-level Input voltage HIGH-level input voltage LOW-level input voltage open-circuit input voltage LOW-level input leakage current HIGH-level input leakage current output voltage Symbol ICC1 ICC2 ICC3 ICC4 VIH1 VIL1 VIH2 VIL2 VOPEN Condition Filter mode, FCDATA Filter bypass mode Power-down mode, 3-address mode Power-down mode, 2-address mode SDA, SDA, SDA, SCL, SDA, SCL, output, Sink current VDD/2 VDD/2 Unit Test level
Total current consumption VCC1, VCC2, VCC3, VDD, when input signals.
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SM5308AS Characteristics (I2C-BUS) 5.0V, 5.5V, 25°C, unless otherwise noted.
Rating Parameter clock frequency hold time (start condition) clock LOW-level pulsewidth clock HIGH-level pulsewidth setup time (start condition) data hold time data setup time SDA, rise time SDA, fall time setup time (stop condition) SDA, input capacitance Symbol fSCL tHD;STA tLOW tHIGH tSU;STA tHD;DAT tSU;DAT tSU;STO Condition Unit Test level
tLOW
tSU;DAT
tHD;STA
tHD;STA
tHD;DAT
tHIGH
tSU;STA
tSU;STO
Note. start condition, stop condition
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SM5308AS Analog Characteristics
Analog input characteristics
5.0V, 5.5V, 25°C, 100kHz, 1.0Vp-p, RISET 1.8k, CH-1 clamp input, CH-2 CH-3 bias input, FCDATA 227, unless otherwise noted. Internal mode settings shown table "Mode Condition Settings".
Rating Parameter Clamp voltage Bias voltage Input resistance Symbol VCLMP VBIAS RBIAS VAI1 Filter mode maximum input voltage VAI2 VAI3 VAI4 VAI5 Bypass mode maximum input voltage VAI6 VAI7 VAI8 VIDC1 Direct mode input voltage range VIDC2 VIDC3 VIDC4 Clamp input Bias input Bias input Mode: (bias, 0dB), 1.0% Mode: (bias, 6dB), 1.0% Mode: (clamp, 0dB), 1.0% Mode: (clamp, 6dB), 1.5% Mode: (bias, 0dB), 1.0% Mode: (bias, 6dB), 1.5% Mode: (clamp, 0dB), 1.0% Mode: (clamp, 6dB), 1.5% Mode: 1.5%, 1.4Vp-p Mode: 1.5%, 1.2Vp-p Mode: 1.5%, 1.4Vp-p Mode: 1.5%, 1.2Vp-p Condition 1.65 2.15 1.85 2.35 2.05 2.55 Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p Unit Test level
Note. This item represents values maximum input signal amplitude which output distortion rate shown condition column filled. When signal amplitude that exceeds this specification value input, output distortion rate deteriorated. When using this device, input signal level should exceed standard value (min) signal amplitude.
Filter mode bypass mode frequency characteristics
5.0V, 5.5V, 25°C, 100kHz, 1.0Vp-p, RISET 1.8k, CH-1 clamp input, CH-2 CH-3 bias input, FCDATA 227, unless otherwise noted.
Rating Parameter Symbol Cutoff frequency Half mode cutoff frequency ratio attenuation Filter bypass mode passband Rhalf1 Rhalf2 FCDATA FCDATA FCDATA FCDATA Half mode, FCDATA Half mode, FCDATA 4fc, attenuation from 100kHz 0.7Vp-p, Gain Condition 5.93 32.4 5.00 6.74 36.78 44.27 7.55 41.2 Unit Test level
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SM5308AS
Analog output characteristics
5.0V, 5.5V, 25°C, 100kHz, 1.0Vp-p, RISET 1.8k, CH-1 clamp input, CH-2 CH-3 bias input, FCDATA 227, unless otherwise noted. Internal mode settings shown table "Mode Condition Settings".
Rating Parameter Symbol AVF1 AVF2 Filter bypass mode output gain AVB1 AVB2 Filter bypass mode gain error Channel channel gain error Maximum output voltage dAVBP dAVCH Vout1 Vout2 THDB1 Output distortion THDB2 THDC1 THDC2 Channel channel crosstalk Drive load resistance response time XTLK1 Mode: (0dB), 1.0% Mode: (6dB), 1.5% Mode: 1kHz, 1.4Vp-p Mode: 1kHz, 1.2Vp-p Mode: 1kHz, 1.4Vp-p Mode: 1kHz, 1.0Vp-p 0.5Vp-p input, 1MHz, between channels load Response time from output when changing settings using I2C-BUS Gain Gain Gain Gain Gain error between filter mode bypass mode Condition Filter mode output gain Vp-p Vp-p load Unit Test level
Reference voltage characteristics
5.0V, 5.5V, 25°C, unless otherwise noted.
Rating Parameter Symbol output voltage REF1 REF2 REF3 Condition 2.40 2.50 3.40 Unit Test level
Test level
definition "Test Level" shown electrical characteristic table follows. 100% products tested 25°C. Guaranteed result design characteristics evaluation.
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SM5308AS Mode Condition Settings
Table Mode settings
Input type Mode setting CH-1 Clamp Bias Clamp Bias Clamp Bias Clamp Direct Bypass Standard Filter Half Bypass Half Filter Bias Bias Standard CH-2 CH-3 Output gain mode Filter/Bypass mode
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SM5308AS Evaluation Circuit Diagram
Controller
0.1µF
100µF
10µF REF1 TEST
10µF
10µF REF2 REF3 VCC1 OUT1 GND1 VCC2 100µF
OUT1
4.7µF
100µF OUT2 GND2 VCC3 OUT3 GND3 100µF
OUT2
4.7µF
ISET RISET 1.8k
OUT3
4.7µF
Note. This electrical characteristics evaluation circuit only, then recommended application circuit. TEST should connected GND.
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SM5308AS
FUNCTIONAL DESCRIPTION
I2C-BUS Control
SM5308AS uses interface following functions. Cutoff frequency Output gain mode switching (1/2 cutoff frequency switching) Filter mode/filter bypass mode switching Input type switching (sync-tip clamp, bias, direct) Disable function Maximum number slave addresses
transfer rate I2C-BUS corresponds fast-mode 400kbit/s). Note that SM5308AS does support read function write only). Basic cycle
Start condition
Stop condition
2C-BUS
start/stop condition
basic access cycle comprises following elements. Start condition byte: Slave address byte: Subaddress byte: Control data Stop condition
input data does match slave address subaddress incorrect, corresponding (acknowledge) output LOW. However, output after byte irrespective byte data. Also note that does support subaddress auto-increment function, hence each subaddress access requires basic cycle steps
Start
byte:Slave address
byte:Subaddress
byte:Control data
Stop
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SM5308AS byte: slave address three slave addresses. Note that must (Write)".
byte: slave address Open*1
When open (94h), I2C-BUS control able address. "P16. Maximum number slave addresses".
byte: subaddress byte sets subaddress, selecting three registers.
byte: subaddress Register name FCSET CONDITION1 CONDITION2
byte: control data byte control data sets register flags corresponding subaddress selected byte. flags assigned shown following table.
byte: control data Register name FCSET CONDITION1 CONDITION2 HALF BYPASS
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SM5308AS Flag settings Cutoff frequency Register name: FCSET Flag names: FCM, [6:0] FCSET register setting sets cutoff frequency using tuning adjustment functions, thus total steps possible.
Flag name FCDATA FCSET 43.73 44.00 44.27 23.58 23.72 23.85 9.31 9.62 9.93 Cutoff frequency [MHz] 5.00 5.17 5.35
Default
Input type switching (sync-tip clamp, bias, direct) Register name: CONDITION1 Flag names: [5:4], [3:2], [1:0] These flags input type CH-1, CH-2, CH-3 three types: sync-tip clamp input, bias input, direct input.
Channel CH-1 CH-2 CH-3 Flag name Don't care Input type Default
Sync-tip clamp input Bias input Direct input*1
input coupling capacitor should connected when direct input selected.
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SM5308AS Output gain Register name: CONDITION1 Flag name:
Flag name Output gain Default
Disable mode select Register name: CONDITION2 Flag name: This flag enables/disables analog block. When analog block disabled, output pins high impedance.
Flag name Mode Enable (normal operation) Disable operation) Default
mode switching (1/2 cutoff frequency switching) Register name: CONDITION2 Flag name: HALF This flag switches cutoff frequency CH-2 CH-3 divide value FCSET register into halves. Note that CH-1 cutoff frequency cannot switched 1/2. This mode suitable systems where sampling frequency varies requirements, such component signals.
Flag name mode HALF Standard mode (CH-1, CH-2, CH-3 cutoff frequency identical) Half mode (CH-2, CH-3 cutoff frequency that CH-1) Default
Filter bypass mode Register name: CONDITION2 Flag name: BYPASS This flag allows internal lowpass filter SM5308AS bypassed. output gain switched, even filter bypass mode. input type output gain just filter mode. However, cutoff frequency mode settings have effect outputs.
Flag name Filter BYPASS Filter mode (signals pass through lowpass filter) Filter bypass mode (signals bypass lowpass filter) Default
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SM5308AS Maximum number slave addresses Register name: CONDITION2 Flag name: flag sets maximum number slave address selected input pins either setting resistor. input equivalent circuit shown below. When LOW, switches SW31 SW33 input levels (LOW HIGH) valid. When HIGH, switches SW31 SW33 input levels (LOW, HIGH, Open) valid. this time, current consumption increases several hundreds compared setting. Note.The default value plug HIGH address). once address) device addressed setting when Open, that device subsequently longer accessible until power supply turns OFF.
Flag name Maximum number slave address (2-address mode) (3-address mode) Default setting HIGH Open HIGH Open Slave address 1001000 1001001 Invalid 1001000 1001001 1001010 current flow
NCA=2
SW21
Control
NCA=L(2) Address decoder NCA=H(3)
SW31 SW32 SW33
NCA=3
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SM5308AS
Lowpass Filter
SM5308AS built-in 5th-order lowpass filters with variable cutoff frequency. cutoff frequency range resistor (RISET) connected between ISET GND, cutoff frequency setting determined FCDATA data. cutoff frequency FCDATA values listed table shown graphically figure
Table Cutoff frequency FCDATA (RISET 1.8k)
FCDATA FCSET (hex) Cutoff freq. [MHz] 5.00 5.17 5.35 5.52 5.70 5.87 6.04 6.22 6.39 6.57 6.74 6.92 7.09 7.26 7.42 7.59 7.75 7.92 8.08 8.24 8.41 8.57 8.74 8.89 9.06 9.21 9.38 9.53 9.69 9.85 10.01 10.17 10.33 10.49 10.65 10.80 10.97 11.12 11.28 11.43 11.59 11.74 11.89 12.05 12.20 12.36 12.50 12.65 12.80 12.95 13.10 13.25 13.39 13.55 13.69 13.85 13.99 14.15 14.29 14.44 14.59 14.74 14.89 15.04 FCDATA FCSET (hex) Cutoff freq. [MHz] 15.18 15.33 15.47 15.62 15.76 15.90 16.05 16.19 16.33 16.48 16.62 16.77 16.91 17.05 17.20 17.34 17.49 17.62 17.76 17.90 18.04 18.18 18.32 18.45 18.60 18.73 18.87 19.01 19.15 19.29 19.43 19.56 19.71 19.84 19.97 20.11 20.24 20.37 20.51 20.64 20.78 20.91 21.04 21.18 21.31 21.44 21.58 21.71 21.85 21.98 22.11 22.25 22.38 22.51 22.65 22.78 22.91 23.05 23.18 23.32 23.45 23.58 23.72 23.85 FCDATA FCSET (hex) Cutoff freq. [MHz] 9.31 9.62 9.93 10.24 10.55 10.86 11.16 11.47 11.78 12.09 12.40 12.71 13.00 13.30 13.60 13.90 14.20 14.48 14.77 15.06 15.35 15.64 15.92 16.21 16.50 16.79 17.08 17.36 17.65 17.94 18.23 18.51 18.80 19.09 19.38 19.66 19.93 20.21 20.49 20.77 21.04 21.32 21.60 21.88 22.15 22.43 22.71 22.99 23.26 23.54 23.82 24.09 24.35 24.62 24.89 25.16 25.42 25.69 25.96 26.22 26.49 26.76 27.03 27.29 FCDATA FCSET (hex) Cutoff freq. [MHz] 27.56 27.83 28.10 28.36 28.63 28.90 29.16 29.43 29.69 29.96 30.21 30.48 30.74 31.00 31.26 31.53 31.79 32.05 32.31 32.58 32.83 33.10 33.36 33.63 33.88 34.15 34.41 34.67 34.93 35.20 35.46 35.72 35.98 36.25 36.51 36.78 37.05 37.32 37.58 37.85 38.12 38.39 38.65 38.92 39.19 39.45 39.72 39.99 40.26 40.52 40.79 41.06 41.33 41.59 41.86 42.13 42.39 42.66 42.93 43.20 43.46 43.73 44.00 44.27
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SM5308AS
FCDATA
Figure Cutoff frequency FCDATA (RISET 1.8k)
RISET
RISET controls internal current source, connection essential. recommended value (RISET) 1.8k. disable mode filter bypass mode, ISET high impedance, current flows into RISET. Note. value other than 1.8k will change current consumption SM5308AS. determination resistance value, caution should taken ensure power dissipation does exceed absolute maximum rating package.
Half Mode
half mode, CH-2 CH-3 cutoff frequency that CH-1 cutoff frequency setting. Half mode useful systems where sampling frequency varies luminance color difference signal (Cr, requirements component signals.
Group Delay Characteristics
group delay varies with cutoff frequency setting, shown figure Note also that half mode, group delay between CH-1 CH-2/CH-3 varies.
Ratio FCDATA Group delay [ns] HALF High RISET 1.8k
[MHz]
FCDATA
FCDATA
Frequency [MHz]
ratio (CH-2/CH-1, CH-3/CH1)
Figure Cutoff frequency ratio (half mode)
Figure Group delay characteristics
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SM5308AS
Filter Bypass Mode
filter bypass mode, internal lowpass filter SM5308AS bypassed signal input output buffer stage directly. filter bypass mode, input type output gain just filter mode. cutoff frequency setting mode setting have effect outputs. this mode, passband frequency 80MHz (typ), which support SXGA-class signals.
Power-ON Reset
When power applied, internal power-ON reset circuit operates initializing internal register flags their default settings. power-ON, supplies should applied simultaneously.
Reference Voltage (REF)
REFn pins internal reference voltage outputs. capacitor connected between ground recommended stability movement. REF1, REF2, REF3 independent reference voltage outputs, have correspondence with settings CH-1, CH-2, CH-3. disable mode, they high impedance outputs.
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SM5308AS
USAGE PRECAUTIONS
Slave Address (94h) Setting
When slave address used, input must left open circuit. this case, external resistor should connected shown figure reduce risk malfunction I2C-BUS interface large external spikes other noise invaded from outside. recommended value 10k.
Direct Input Mode
direct input mode, signal connected input without capacitor. However, input voltage range varies with mode setting, hence signal must appropriately biased corresponding mode. recommended LOW-level voltage (VL) HIGH-level voltage (VH) each mode shown table (see figure 5V). input voltage exceeds these limits, careful because harmonic distortion occur output signal. (For preventing device breakdown, input bottom voltage voltage should within absolute maximum ratings.)
Video Signal
INnA INnB
Slave address
Figure Slave address setting
Figure Direct input mode
Table Direct mode recommended input voltage range (VCC
Mode setting Gain mode Filter/Bypass mode Channel CH-1 Standard CH-2, CH-3 Filter CH-1 Half CH-2, CH-3 CH-1 Bypass CH-2, CH-3 CH-1 Standard CH-2, CH-3 Filter CH-1 Half CH-2, CH-3 CH-1 Bypass CH-2, CH-3
Power Supply Invest Timing
SM5308AS uses 2-type power supply, analog (VCC1, VCC2, VCC3) digital (VDD). Therefore power supply pins should forced voltage same time power supply invested. case analog power supply digital simultaneously, composing system time-lag makes short time standard under need. voltage digital power supply comes higher than analog power supply, necessary voltage digital power supply make potential difference bellow 100mV compared with voltage analog one.
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SM5308AS
TYPICAL CHARACTERISTICS
5.0V, 5.0V, 25°C, 1.0Vp-p, RISET 1.8k, unless otherwise noted.
Gain
Gain
Frequency [MHz]
-180 -270 -360 -450 -540 -630
Phase [deg]
Phase
Group delay
Frequency [MHz]
Figure Gain Phase characteristics (6dB, filter bypass mode)
Figure Gain Group delay characteristics (6dB, filter bypass mode)
Gain
Frequency [MHz]
-180 -270 -360 -450 -540 -630
Phase [deg]
Phase
Gain
Group delay
Frequency [MHz]
Figure Gain Phase characteristics (6dB, standard mode, FCDATA
Figure Gain Group delay characteristics (6dB, standard mode, FCDATA
Gain
Phase [deg]
Frequency [MHz]
-180 -270 -360 -450 -540 -630
Gain [dB]
Gain [dB]
Phase
Gain
Group delay
Frequency [MHz]
Figure Gain Phase characteristics (6dB, half mode, FCDATA
Figure Gain Group delay characteristics (6dB, half mode, FCDATA
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Group delay [ns]
Group delay [ns]
Gain [dB]
Gain [dB]
Group delay [ns]
Gain [dB]
Gain [dB]
SM5308AS
Gain Phase
Frequency [MHz]
-180 -270 -360 -450 -540 -630
Gain
Group delay
Frequency [MHz]
Figure Gain Phase characteristics (6dB, standard mode, FCDATA 227)
Figure Gain Group delay characteristics (6dB, standard mode, FCDATA 227)
Gain
Gain
Frequency [MHz]
-180 -270 -360 -450 -540 -630
Phase [deg]
Phase
Group delay
Frequency [MHz]
Figure Gain Phase characteristics (6dB, half mode, FCDATA 227)
Figure Gain Group delay characteristics (6dB, half mode, FCDATA 227)
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Group delay [ns]
Gain [dB]
Gain [dB]
Group delay [ns]
Phase [deg]
Gain [dB]
Gain [dB]
SM5308AS
(Bypass mode)
(Bypass mode)
Phase [deg]
Gain [dB]
-180 -270 -360 -450 -540
Frequency [MHz]
-630
Frequency [MHz]
Figure Gain FCDATA, mode (6dB)
FCDATA mode standard half standard half
Figure Phase FCDATA, mode (6dB)
FCDATA mode standard half standard half
Group delay [ns]
(Bypass mode)
Frequency [MHz]
Figure Group delay FCDATA, mode (6dB)
FCDATA mode standard half standard half
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SM5308AS
[mA] 4.50 4.75 5.00 5.25 5.50 ICC2*2 [mA] ICC1
[°C] ICC2*2 ICC1*1
filter mode, FCDATA filter bypass mode
filter mode, FCDATA filter bypass mode
Figure ICC1, (6dB, FCDATA 255)
FCDATA
Figure ICC1, (6dB, FCDATA 255)
Gain [dB]
[mA]
4.75
5.25
Figure ICC1 FCDATA (6dB)
Figure Gain (6dB)
Gain [dB] Gain [dB] [°C]
-0.5
-1.0
4.75
5.25
Figure Gain (6dB)
Figure Gain (0dB)
Gain [dB]
-0.5
-1.0
[°C]
Figure Gain (0dB)
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SM5308AS
VOUT VOUT
Figure VOUT (0dB, filter mode, direct mode)
VOUT VOUT
Figure VOUT (6dB, filter mode, direct mode)
Figure VOUT (0dB, filter bypass mode, direct mode)
Figure VOUT (6dB, filter bypass mode, direct mode)
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SM5308AS
Please your attention following points time using products shown this document. products shown this document (hereinafter "Products") intended used apparatus that exerts harmful influence human lives defects, failure malfunction Products. Customers requested obtain prior written agreement such from SEIKO CORPORATION (hereinafter "NPC"). Customers shall solely responsible for, indemnify hold free harmless from, claims, damages, losses, expenses lawsuits, such without such agreement. reserves right change specifications Products order improve characteristic reliability thereof. makes claim warranty that contents described this document dose infringe intellectual property right other similar right owned third parties. Therefore, shall responsible such problems, even accordance with descriptions provided this document. descriptions including applications, circuits, parameters Products this document reference Products, shall guaranteed free from defect, inapplicability design mass-production products without further testing modification. Customers requested export re-export, directly indirectly, Products country entity compliance with violation national export administration laws, treaties, orders regulations. Customers requested appropriately take steps obtain required permissions approvals from appropriate government agencies.
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NC0418BE 2006.04
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3-channel Video Buffer with Built-in wideband SM5308AS 3-channel

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