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Software Creates Compatible 64Kbit 2-Wire Serial EEPROMs

Application Note May 5, 2005 AN74.0

Software Creates Compatible 64Kbit 2-Wire Serial EEPROMs
Application Note May 5, 2005 AN74.0
Author: Applications Staff
Introduction
provided. The code was debugged using Turbo C® and Fig. 3 shows the simple test set-up.
Slave Address
DIP / SOIC NC S1 S2 VSS X24645 VCC WP SCL SDA A0 A1 A2 VSS
DIP / SOIC VCC 24C65 NC SCL SDA A0 A1 A2 GND
DIP / SOIC VCC AT24C64 WP SCL SDA
Pin Descriptions SCL SDA S1 S2 WP NC VCC VSS Serial Clock Serial Data Device Select Input Device Select Input Write Protect No Connect Supply Ground
Pin Descriptions SCL SDA A0-A2 NC VCC VSS Serial Clock Serial Data Chip Select Inputs No Connect Supply Ground
Pin Descriptions SCL SDA A0-A2 WP VCC GND Serial Clock Serial Data Address Inputs Write Protect Supply Ground
Application Note 74 Write Protection Register
The X24645 contains an internal Write Protect Register (WPR) that is used to control the state of the device. As soon as the X24645 is detected, a separate routine is used to correctly set the WPR. First the WEL bit is set, then the RWEL bit is set, and then the Block Protect (BP) and WPEN registers are set. If the BP registers are set to protect the upper 1 / 2 of the array, then control of the array write protection for both the Atmel and Intersil devices will behave similarly, depending on the WP pin (pin 7). protection. The only way to alter the write protection at that point is to take WP LOW and / or reset the WPEN bit. Because of the difficulties, write protection on the Microchip 24C65 has not been implemented in the attached code, though simple modifications can be made to provide for it.
Serial EEPROM Modes of Operation
Array Write Protection
SLAVE ADDRESS
WORD ADDRESS (n)
DATA (n)
DATA (n+31)
R / W A C K SLAVE ADDRESS WORD ADDRESS 1
A C K WORD ADDRESS 0
DATA (n+7)
R / W A C K FIRST WORD ADDRESS (n)
A C K SECOND WORD ADDRESS (n)
SLAVE ADDRESS
DATA (n)
DATA (n+31)
FIGURE 1. PAGE WRITE (BYTE WRITE) OPERATIONS FOR EACH DEVICE
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Application Note 74
DUMMY WRITE OPERATION SLAVE ADDRESS WORD ADDRESS (n)
SLAVE ADDRESS
DATA (n)
DATA (n+x)
DUMMY WRITE OPERATION SLAVE ADDRESS WORD ADDRESS 1 WORD ADDRESS 0
SLAVE ADDRESS
DATA (n)
DATA (n+x)
R / W A C K DUMMY WRITE OPERATION FIRST WORD ADDRESS (n)
SLAVE ADDRESS
SECOND WORD ADDRESS (n)
SLAVE ADDRESS
DATA (n)
DATA (n+x)
FIGURE 2. RANDOM SEQUENTIAL READ (OR CURRENT ADDRESS SEQUENTIAL READ) OPERATIONS FOR EACH DEVICE. FOR A CURRENT ADDRESS READ OPERATION, DISREGARD THE DUMMY WRITE OPERATION.
Endurance
Conclusion
Though all three devices have been tested and will work with this generic code, the Intersil X24645 and Atmel AT24C64 clearly stand-out as the best design choices. The potential headaches associated with guaranteeing compatibility between the Microchip 24C65 software protocols (i.e. setting the high endurance block or the array write protection) and the protocols of the other devices would prevent the use of some advanced features on the 24C65, possibly limiting its usefulness in a system. Furthermore, the X24645 has some apparent advantages over the AT24C64 because of its more flexible BlockLock array write protection and the presence of the WPEN bit in the WPR, which makes this device more attractive for programming during system production.
Vcc Vcc Connector DB25
Page Size
74LS07
FIGURE 3. SIMPLE INTERFACE BETWEEN 2-WIRE SERIAL EEPROMS AND A PARALLEL PRINTER PORT ON A PC
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Application Note 74
/ reset SDA bit at port /
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Application Note 74
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/ read port / / isolate SDA / / shift to LSB / / and return data /
/ master sends acknowledge /
/ master receives acknowledge /
/ send data to EEPROM / / one bit at a time /
/ shift for next bit /
/ read data from EEPROM / / one bit at a time / / input bit from port /
/ return data byte /
/ send slave address / / check for acknowledge /
/ ack polling loop /
Application Note 74
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/ Intersil slave address / / Microchip and Atmel slave address / / check for acknowledge /
/ set WPEN, BP1, and BP0 bits /
/ construct X24645 / / slave address /
/ construct X24645 address byte /
/ Microchip and Atmel slave address / / construct first address byte /
/ construct second address byte /
Application Note 74
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Application Note 74
/ begin nonvolatile write cycle / / poll for cycle completion /
char char char char
buffer buffer buffer buffer
data bytes / data bytes / store bytes from EEPROM / store bytes from EEPROM /
Intersil Corporation reserves the right to make changes in circuit design, software and / or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com 8
AN74.0 May 5, 2005