Application Note 2005 AN74.0 Author: Applications Staff Intr

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Application Note 2005 AN74.0 Author: Applications Staff Intr

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Software Creates Compatible 64Kbit 2-Wire Serial EEPROMs
Application Note 2005 AN74.0
Author: Applications Staff
Introduction
recent years, nonvolatile memory manufacturers have pushed envelope serial EEPROM performance. Devices exist with higher densities, extra data protection features, lower operating voltages, while same time consuming less power. many applications, these newer generation devices ideal because they satisfy important system requirements. Among these devices, 64Kbit 2-wire serial EEPROMs 8-lead SOIC packages have been particularly well received. Unfortunately, manufacturers have implemented common features within their devices. This causes problems designer desires multiple sources. Although none these devices could ever considered second sources another, there some steps that taken designer guarantee that these 64Kbit devices used interchangeably system. this note, we'll consider devices from Intersil (X24645), Atmel (AT24C64), Microchip (24C65). addressing X24645, Intersil implemented approach that differs slightly from more conventional addressing scheme found lower density 2-wire devices (e.g. X24C02). advantage simplification protocol accessing X24645. AT24C64 24C65 adhere older standard, however systems attempting multiple sources 64Kbit devices, certain software modifications connections could made ensure compatibility. this note, details this implementation explained general purpose code
provided. code debugged using Turbo Fig. shows simple test set-up.
Slave Address
first discrepancy encountered between Intersil's X24645 Microchip 24C65 Atmel AT24C64 difference slave addressing protocol sending upper address bits device. Both 24C65 AT24C64 8-bit slave address consisting device (1010), 3-bit device address (A2,A1,A0), bit. 13-bit array address transferred following slave address sending additional bytes, containing zeroes (000) don't cares (XXX) complete address. This sequence similar lower density devices available from three manufacturers. Intersil's X24645 slave address upper array address protocol consisting 8-bit slave address followed single address byte. slave address consists device select bits (S2,S1), MSBs array address (A12,A11,A10,A9,A8), bit. This allows 1-byte simplification software overhead when X24645 accessed. order make these devices functional same socket, pins must tied Vss. power-up, master should transmit (10101110) slave address. Intersil device present, master will receive acknowledge. Microchip Atmel devices present, then there will acknowledge. software routine should then "X24645 detected" flag later use.
DIP/SOIC X24645
DIP/SOIC 24C65
DIP/SOIC AT24C64
Descriptions Serial Clock Serial Data Device Select Input Device Select Input Write Protect Connect Supply Ground
Descriptions A0-A2 Serial Clock Serial Data Chip Select Inputs Connect Supply Ground
Descriptions A0-A2 Serial Clock Serial Data Address Inputs Write Protect Supply Ground
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. Rights Reserved other trademarks mentioned property their respective owners.
Application Note Write Protection Register
X24645 contains internal Write Protect Register (WPR) that used control state device. soon X24645 detected, separate routine used correctly WPR. First set, then RWEL set, then Block Protect (BP) WPEN registers set. registers protect upper array, then control array write protection both Atmel Intersil devices will behave similarly, depending (pin protection. only alter write protection that point take and/or reset WPEN bit. Because difficulties, write protection Microchip 24C65 been implemented attached code, though simple modifications made provide
Serial EEPROM Modes Operation
Once software detected X24645, necessary modifications protocol made automatically. 2-wire serial EEPROMs, there really only modes operation, with others being special cases these modes: Page Write Random Sequential Read. Single Byte Write operation merely special case Page Write operation, where only data byte sent device. Likewise, Single Byte Read operation special case Sequential Read operations. Because that Random Read protocol implemented code, Current Address Read operation seen Random Read operation without "dummy" address write preceding Note that X24645 does internally increment address counter after last byte written, which differs from behavior AT24C64 24C65. example, write operations ending last byte page (e.g. $001F) followed current address read, will return data from different locations, depending device. X24645, data would read from $001F. 24C65, would from $0018, with AT24C64, would from $0000. This should taken into account when using current address Sequential Read operation.
Array Write Protection
three devices have write protection features, however guaranteeing compatibility with Microchip device problem. order protect upper array Microchip part, software sequence must sent device. order implement this feature, would have assume that input socket being driven microcontroller, which could then also execute special routine Microchip device. AT24C64 actually present when this occurs, data corruption possible unless starting block Microchip device defined with (i.e. B3,B2,B1,B0 1XXX). Additionally, with 24C65, once write protection mechanism set, cannot undone. This contrast Intersil Atmel devices which allow write protection control pin. special note scheme used X24645. using with Write Protect Enable (WPEN), system have hard-wired HIGH without array being protected. During system test, E2PROM loaded with data this point, WPEN set, which would "lock" array write
SLAVE ADDRESS
WORD ADDRESS
DATA
DATA (n+31)
SLAVE ADDRESS WORD ADDRESS
WORD ADDRESS
DATA
DATA (n+7)
FIRST WORD ADDRESS
SECOND WORD ADDRESS
SLAVE ADDRESS
DATA
DATA (n+31)
FIGURE PAGE WRITE (BYTE WRITE) OPERATIONS EACH DEVICE
AN74.0 2005
Application Note
DUMMY WRITE OPERATION SLAVE ADDRESS WORD ADDRESS
SLAVE ADDRESS
DATA
DATA (n+x)
DUMMY WRITE OPERATION SLAVE ADDRESS WORD ADDRESS WORD ADDRESS
SLAVE ADDRESS
DATA
DATA (n+x)
DUMMY WRITE OPERATION FIRST WORD ADDRESS
SLAVE ADDRESS
SECOND WORD ADDRESS
SLAVE ADDRESS
DATA
DATA (n+x)
FIGURE RANDOM SEQUENTIAL READ CURRENT ADDRESS SEQUENTIAL READ) OPERATIONS EACH DEVICE. CURRENT ADDRESS READ OPERATION, DISREGARD DUMMY WRITE OPERATION.
Endurance
Another peculiarity with Microchip 24C65 device well Microchip's 24LC65 24AA65 lower voltage versions 24C65) endurance specification. Although Microchip touts their EEPROMs having more than million cycles endurance 24C65, this only applies small portion memory array. user defined 4Kbit block will provide 1,000,000 cycles, rest array only specified 10,000 cycles. Both Intersil Atmel specify their devices 100,000 cycles every byte array. With Microchip, average endurance 71,875 endurance cycles byte perhaps more appropriate spec. reality, systems require such endurance this code does attempt change high endurance block position from Microchip default position. Again, simple modifications code that required implement this feature, desirable relocate this high endurance block.
Conclusion
Though three devices have been tested will work with this generic code, Intersil X24645 Atmel AT24C64 clearly stand-out best design choices. potential headaches associated with guaranteeing compatibility between Microchip 24C65 software protocols (i.e. setting high endurance block array write protection) protocols other devices would prevent some advanced features 24C65, possibly limiting usefulness system. Furthermore, X24645 some apparent advantages over AT24C64 because more flexible BlockLockarray write protection presence WPEN WPR, which makes this device more attractive programming during system production.
Connector DB25
Page Size
Though Intersil's X24645 Atmel's AT24C64 have 32-byte pages, Microchip 24C65 only 8-byte page. compensate this flaw, Microchip uses 64-byte FIFO buffer internally write consecutive pages. this feature make Microchip device compatible with 32-byte page devices, however there could some problems with 24C65 wrap-around within FIFO. Careful seq_write() routine will prevent anomalous behavior. Never write more than bytes page time never attempt utilize wrap-around feature Intersil Atmel devices when Microchip device could present. That should sufficient avoid problems.
74LS07
FIGURE SIMPLE INTERFACE BETWEEN 2-WIRE SERIAL EEPROMS PARALLEL PRINTER PORT
AN74.0 2005
Application Note
Software creating compatibility between Intersil's X24645, Atmel's AT24C64, Microchip's 24C65 2-wire serial EEPROMs. This code contains routines necessary accessing these devices. Simply seq_read() seq_write() routines access, regardless which device present. Note that this code, attempts read status assume that level logically inverted, this particular test set-up (Fig. this true other hardware set-ups, then this code must altered accordingly. #include <stdio.h> #include <stdlib.h> data_port 0x378; printer port output address*/ status_port 0x379; printer port input address*/ unsigned char control 0xFF; unsigned char intersil_flag; X24645 detected flag void SCL_high(){ control control 0x04; port outportb(data_port, control); void SCL_low(){ control control 0xFB; reset port outportb(data_port, control); void SDA_high(){ control control 0x02; outportb(data_port,control); void SDA_low(){ control control 0xFD; outportb(data_port,control); void start(){ SDA_high(); SCL_high(); SDA_low(); SCL_low(); void stop(){ SDA_low(); SCL_high(); SDA_high(); unsigned char clock(){ unsigned char SDA_value; SCL_high();
port
reset port
AN74.0 2005
Application Note
SDA_value inportb(status_port); SDA_value SDA_value 0x80; SCL_low(); SDA_value SDA_value return(SDA_value); void ack(){ SDA_low(); clock(); void nack(){ SDA_high(); clock(); void out_byte(unsigned char byte){ char count; (count count count++){ ((byte 0x80) SDA_low(); else SDA_high(); byte byte clock(); unsigned char get_byte(){ count; unsigned char byte,temp; byte (count count count++){ byte byte SDA_high(); temp clock(); (temp byte byte 0x01; return(byte); unsigned char serial_detect(){ unsigned char temp; start(); out_byte(0xAE); SDA_high(); temp clock(); stop(); return(temp); void ack_poll(){ unsigned char poll; start(); (intersil_flag
AN74.0 2005
read port isolate shift return data
master sends acknowledge
master receives acknowledge
send data EEPROM time
shift next
read data from EEPROM time input from port
return data byte
send slave address check acknowledge
polling loop
Application Note
out_byte(0x80); else out_byte(0xA0); SDA_high(); poll clock(); while (poll stop(); void program_WPR(){ start(); out_byte(0xBE); nack(); out_byte(0xFF); nack(); out_byte(0x02); nack(); stop(); start(); out_byte(0xBE); nack(); out_byte(0xFF); nack(); out_byte(0x06); nack(); stop(); start(); out_byte(0xBE); nack(); out_byte(0xFF); nack(); out_byte(0x92); nack(); stop(); ack_poll(); void dummy_write(int addr){ temp; (intersil_flag temp (((addr 0x3E) 0x80); start(); out_byte(temp); nack(); temp (addr 0xFF); out_byte(temp); nack(); else{ start(); out_byte(0xA0); nack(); temp ((addr 0xFF00) 16); out_byte(temp); nack(); temp addr 0xFF; out_byte(temp); nack();
AN74.0 2005
Intersil slave address Microchip Atmel slave address check acknowledge
X24645 slave address location $1FFF
RWEL
WPEN, BP1, bits
construct X24645 slave address
construct X24645 address byte
Microchip Atmel slave address construct first address byte
construct second address byte
Application Note
Sequential read routine that handles read operations. current address reads, current addr don't care when calling routine, otherwise addr starting address *bytes points buffer where data stored later use. no_bytes number bytes sequentially read from EEPROM. void seq_read(int current,int no_bytes,int addr,unsigned char *bytes){ temp; (current dummy_write(addr); random read? yes, send address
(intersil_flag X24645? start(); temp (((addr 0x3E) 0x81); construct slave address out_byte(temp); nack(); else{ start(); out_byte(0xA1); slave address Atmel Microchip nack(); no_bytes n++){ sequentially read data bytes[n] get_byte(); loop send acknowledges ack(); bytes[no_bytes get_byte(); last databyte, don't stop(); send acknowledge
AN74.0 2005
Application Note
Sequential write routine handles write operations. no_bytes number bytes write, starting address (addr), take data from buffer pointed *bytes. void seq_write(int no_bytes,int addr,unsigned char *bytes){ unsigned char temp; dummy_write(addr); no_bytes; n++){ out_byte(bytes[n]); nack(); stop(); ack_poll(); Simple program demonstrate these routines. main(){ unsigned unsigned unsigned unsigned send address EEPROM loop send data bytes
begin nonvolatile write cycle poll cycle completion
char char char char
data1[]={31,32,33,34,35}; data2[]={41,42,43,44,45}; data3[512]; data4[512];
buffer buffer buffer buffer
data bytes data bytes store bytes from EEPROM store bytes from EEPROM
intersil_flag=serial_detect(); (intersil_flag==1) program_WPR(); seq_write(5,59,&data1); seq_write(5,64,&data2); seq_read(0,6,59,&data3); seq_read(1,4,0,&data4);
check X24645 X24645? yes, page write ending last byte page page write beginning byte next page random read across page boundaries bytes) current address read remaining bytes
Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that Application Note Technical Brief current before proceeding.
information regarding Intersil Corporation products, www.intersil.com
AN74.0 2005

Application Note 2005 AN74.0 Author: Applications Staff Intr

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