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DUAL-USE COMMITTED SINCE 1980 With unrivaled experience, Atm


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DUAL-USE
COMMITTED SINCE 1980
With unrivaled experience, Atmel® recognized leading supplier delivering highly integrated solutions
aerospace industry. Atmel offers customers access latest technological innovations commercial field adapting them radhard applications requirements.
This dual-use strategy allows highly competitive solutions combined with fast time-to-market delivery. addition, leading edge technologies available various Atmel group locations extend manufacturing capability aerospace products. Standard products include processors optimized harsh space environment operation that complemented with Atmel circuits available rad-hard versions that meet stringent requirements (cumulated dose, latch-up transient phenomena) space applications. specialized memories. System integration challenge Atmel's customers Atmel's offering most attractive complete market. Application specific products range from standard Gates advanced integration.
Design manufacturing facilities meet international quality standards recognition QML-V certified. system also supported existing products.
BROADEST RANGE MARKET
ASIC Libraries
MG2(RT) Gate Arrays 700K cells, 350/250 MHz, MG2RTP Gate Arrays 500K cells, MHz, MH1(RT) Gate Arrays 0.35 3300K sites, 3.3V, 2.5V compliant MH2(RT) Standard Cells 0.25 5000K gates, 2.5V
Reprogrammable FPGA
Dual AT40 Military (2002) AT40KAL free version (2002) Space Avionics
Memories
SRAMs: 15/20 (Q3/2002) FIFOs: bits/16K bits Dual Port RAM: bits EEPROM (2003)
Memory Cubes
SRAM: bits/2M bits 3.3V, bits/4M bits (Q2/2003) TPRAM: bits
Standard ASICs
EDACs (2003) Scalable Multi-channel Communication Subsystem (SMCS) Advanced Glonass GPS/GLONASS/ASIC (AGGA2) Peripheral Controller (DPC) SMCS Lite SpaceWire Router (2004) Controller (2003)
Processors
TSC21020F: 32-bit floating point SPARC 32-bit RISC MPU: TSC695F: single chip TSC698E: generation 2003
EDACs (2003) 1553 Remote Terminal Controller Programmable PLLs SpaceWire Rx/Tx (2004) SPARC 32-bit 0.25 hard core (2003)
Fast 8-bit microcontroller: 80C32E MHz)
Services
Aerospace System Integration requires large range services support ASIC standard products. System optimization, test coverage, commercial trade off, screening flow components packaged bare form, radiation hardening models, quality reliability data services that Atmel offers customers. addition, Atmel skilled engineers dedicated support circuit designs that meet demanding Space requirements.
ASIC
SYSTEM
Atmel ASIC offering enhanced with libraries each time latest-generation technology introduced. MH1RT series eighth-generation dual-use ASIC series dedicated, respectively, Military/Avionics Space applications.Together with libraries, embedded options offered memory specialized blocks. Thus far, libraries have been Gates based. next generations libraries, from 0.25 CMOS technology onward, will move Standard Cell offer improved trade options designers speed, power consumption size.
CHIP
MG2/RT CMOS Process Feature Size (µm) Metal Layers Library SoG/Std Cell Design Gates Complexity Used Ggates/mm2 Count Interface Libraries 2200 5/3V 0.17 5.5V >100 >100 2.7V
MG2RTP 1600 5/3V 0.22 5.5V >100 >100 2.7V
MH1/RT 0.35 1600 8000 5/3V 3.3V 0.3V 2.5V 0.2V 0.08 3.6V >100 >100 2.3V
MH2/RT 0.25 Cell 5000 25000 2.5V 0.2V
MH3/RT 0.18 Cell 9000 48000 3V/2.5V 1.8V 0.15V
Cold Sparing Power Consumption1 (µW/gate/MHz) NAND2 typ. prop. delay (ps) Hardness Functional (Krads) Latch (MeV) Threshold (MeV)2 Availability
0.05 2.5V 2.5V 2.7V >100 >100 2.3V Q4/2002
0.03 2.5V 1.8V 2.7V >100 >100 1.65V 2004
gate activity when using free cell library
0.35
0.25 0.18
Technology
immune DPRAM FPGA Reusable Flash E2PROM Embedded cores Logic synthesis Floor planning
System Libraries Level Integration
Design tools
Automatic test pattern generator Accurate back annotation Power consumption estimator Bonding diagram
available
on-going development
future development
Abbreviations
Shallow Trench Isolation Gate
Total Induced Dose Intellectual Property
FPGA
FREE
gate count ASIC, aerospace market trends toward FPGA. Capitalizing Atmel's expertise System Level
Integration, Atmel offers flexibility Aerospace market with AT40K re-programmable FPGA series.
AT40K Series
AT40K FPGAs series specifically designed compute-intensive functions. Innovative features include:
CacheLogic® dynamic full/partial in-system re-configuration. Eight global clocks four fast clocks. User-defined re-usable hard macro capability.
FreeRam- distributed, single/dual port SRAM, independent logic cells.
compliant I/Os. architecture optimized efficient ultra-fast array multipliers.
Hard macro generators. I/Os with multiple direct paths center FPGA array.
Code
Applications
KGates
Registers
RESET
FreeRAM
LOAD
CLEAR
AT40K40 AT40K40 AT40K80
Mil. Avionics Space (SEU-free) Mil. Avionics
40-50 40-50 80-90
2,676 2,676 4,468
18,432 bits 18,432 bits 32,768 bits
Developments
AT40K series FPGA, currently being introduced Atmel's 0.35 CMOS process, RAM-based. Thus suitable groundbased, missile avionics type applications. Space Avionics, SEU-free variant made available where susceptible cells, including FreeRams, have been replaced SEU-free variants.
Future developments encompass:
Embedded FPGA blocks into ASIC, both military/avionics space applications. Migration latest technologies 0.18 further down.
Atmel long track record with memories (SRAM, FIFO DPRAM) current offering support space industry efforts rationalization part variants with respect
MEMORIES
Size format, Package, Power consumption speed.
M67204F
Type Process feature size (µm) Format Bias voltage Prime speed spec (ns) Package Availability (Krads) FP28.4 FIFO
M67206F
FIFO
M67025E
DPRAM
M65608E
SRAM
M65609E
SRAM 0.335
AT60142E
SRAM 0.25
AT61162E
SRAM 0.35 bits Cube
AT61182E
SRAM 0.25 bits Cube Q2/2003
bits bits bits 128K bits 128K bits 512K bits FP28.4 MQFPL84 FP32.4 FP32.4 15/20 FP36.5
niche nature space market does allow development memory types formats along with each process generation.
Atmel also developing EDACs (fast voltage) used with Atmel's latest memories, mitigate their inherent susceptibility, when directed application.
compensate this, Atmel found efficient solution that offers Atmel's customers packaging higher density complexity. Thanks dice stacking technology Plus Company (France), Atmel introduces SRAM cube family Aerospace, featuring bits (T61162E), Future memory designs advanced processes will allow Atmel serve markets that demand higher speed.
dice packaging 128K bits SRAM (M65609E).
Future prospects include:
SRAM: 64-Mbit 128-Mbit TPRAM: bits bits FIFO: bits bits
ASIC
today's space market, re-use existing blocks, components, boards systems
RE-USABILITY
application support provided design owner.
means, many companies, access standard functions reasonable price while focusing design efforts their core expertise. Atmel working with some customers make their ASIC designs available standard ASICs when they correspond commonly used functions market. procurement specification corresponds original ASIC specification. Only ASIC owner responsible further changes improvements. Atmel's products encompass which some will
(Intellectual
Property)
complemented standards emerge from market. Potential future Standard ASICs include:
high speed EDACs, SpaceWire Router SPARC 32-bit 0.25 hard core (2003) Controller
Example System Using Standard ASICs
multi-chip module designed Astrium® (France), illustrates various Standard ASICs, together with standard products from Atmel.
SRAM
M65608E
T7904E
TSC21020F
DPRAM
M67025E
SMCS
TSS901E
HARD
Digital Signal Processor: TSC21020F
32-bit floating point processor code compatible with Product ADSP-21020, allowing cost effective straightforward system development using existing development tools algorithms.
Cache Memory bits Program Sequencer JTAG Test Emulation Flags Timer
bits)
bits)
connect
Floating Fixed-Point Multiplier, Fixed-Point Accumulator
Register File bits
32-bit Barrel Shifter
Floating-Point Fixed-Point
32-bit Single-Precision 40-bit ExtendedPrecision IEEE Floating-Point Data Formats
1024-point Complex Benchmark: 0.975 CPGA package breadboarding Multi-layer quad flat pack flight models
32-bit Fixed-Point Formats, Integer Fractional, with 80-bit Accumulators
Latch-up immune, Total dose better than Krad (Si)
IEEE Exception Handling with Interrupt Exception
immunity better than 1E-9 error/ device/day worst case orbit.
IEEE JTAG Standard 1149.1 Test Access Port On-chip Emulation Circuitry
MIPS Instruction Rate, Single-Cycle Execution, MFLOPS Peak.
Companion Standard ASICs
Part Number TSS901E T7906E T7904E
Designation Scalable multi-channel system (SMCS) SMCS Lite Peripheral controller
Main functions Provides IEEE 1355 links Provides IEEE 1355 channel additional services Generic support device on-board application using T21020F
Multi-chip Module multi-chip module available from Astrium (France), including TSC21020 DSP, TSS901E SMCS, T7904E Peripheral Controller, SRAM DPRAM chips from Atmel.
SPARC
IMMUNE 32-BIT RISC
Single-chip SPARC Processor: TSC695F TSC695F monolithic version ERC32 chipset developed with serve increasing demand on-board processing.
Clock Reset Management
32-bit Integer Unit
32/64-bit Floating-point Unit
Arbiter Access Controller Wait state Controller Address Interface
Error Management
General Purpose Timer UART
Real Time Clock Timer UART
Watch Interrupt Controller
EDAC Parity Gen./Check
General Purpose Interface
Integer Unit based SPARC high performance RISC architecture Optimized integrated 32/64-bit Floating-Point Unit AINSI/IEEE-754 compliant IEEE 1149.1 test access port (TAP) debugging test purposes Fully static design Performance: MIPs/5 MFlops (double precision) SYSCLK 5V±10% MIPs/4 MFlops (double precision) SYSCLK 3.3V±5%
Consumption: 1.0W typ.@18 MIPs/0.7W typ. MIPs 0.4W typ.@14 MIPs/0.2W typ. MIPs 3.3V
Operating range: 3.135V 5.5V, -55°C +125°C
Starter
help designers developing their application, Atmel offers starter including:
Demo-board with TSC695F engineering sample,
On-board 4-Mbyte with possible extension, Resident remote debugger monitor Flash boot memory space,
Documentation both TSC695F (user's manual datasheet) demo-board (eVAB-695F user's manual),
Modelsim compiled model TSC695F hardware simulation,
CD-ROM including software program editing, compilation debug,
Brief introduction started with development tools.
Packaging technology become dominant parameter applications dictates only
Available Offer
Atmel started developments resulting packages better serve market:
electrical performance systems
FLIP CHIP
thermal dissipation), also challenge offering greater integration terms size/ volume weight. Finally, this must achieved with ever increasing cost constraints.
Power supply dedicated package pins providing much better noise immunity ASICs operation,
Selection hermetic solution denser packaging, Ceramic Land Grid Array (CLGA) with count 472.
Developments
Further size reduction requires that assembly process changed from mature wire bonding solution mature flip-chip technology widely used consumer applications which will allow:
Another achieve higher packaging integration stacking with technology which capable affordable assembly yields: Plus Company (France) technology been identified competitive solution. Atmel currently uses this technology memory products.
Further size reduction going smaller ball/column pitches etc.), higher count (613),
introduction Chip Size/Scale Package (CSP) alternative High-Reliability Die.
These major developments challenges that Atmel will undertake near future.
Example memory cube
leader highly integrated solutions, Atmel continuously investing technologies products with feature-rich capabilities quickly respond customers' needs highly integrated
rad-hard systems.
WORKS CUSTOMERS' FUTURE
Atmel's memories provide optimum combination size, high speed, power small size features. Memories with larger sizes also developed stacking dice, using technology from Plus company (France).
Atmel's ASICs offering meet most stringent requirements terms technology, speed, power consumption density, enabling outstanding integration harsh radiation environments.
4-Mbit SRAM 64-Mbit SRAM Modules
ASIC Standard Cells 0.25 metal layers, Mgates
Memory
Application Specific Functions
Processing
SPARC Processor MIPS
Reprogrammable FPGA Kgates SEU-free AT40K compatible
Designed space applications, Atmel's SPARC processors bring absolute security high computing power along with special debug features reduced software development costs.
Atmel's RAM-based reprogrammable FPGAs either provide cost-effective solutions gate count designs, offer quick solution validate portions larger designs. SEU-free variants compatible with their non-SEUfree counterparts developped space use.
Corporate Headquarters 2325 Orchard Parkway Jose, 95131, TEL.: (1)408) 441-0311 FAX.: (1)(408) 487-2600 Europe Atmel Sarl Route Arsenaux Case Postale CH-1705 Fribourg Switzerland TEL.: (41) 26-426-5555 FAX.: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza Mody Road Tsimhatsui East Kowloon Hong Kong TEL.: (852) 2721-9778 FAX.: (852) 2722-1369 Japan Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL.: (81) 3-3523-3551 FAX.: (81) 3-3523-7581 Product Contact Chantrerie 70602 44306 Nantes Cedex France TEL.: (33) FAX.: (33) e-mail literature@atmel.com Site http://www.atmel.com
©Atmel Corporation, 2002 Atmel Corporation makes warranty products, other than those expressly contained Company's standard warranty which detailed Atmel's Terms Conditions located Company's site. Company assumes responsibility errors which appear this document, reserves right change devices specifications detailed herein time without notice, does make commitment update information contained herein. licenses patents other intellectual property Atmel granted Company connection with sale Atmel products, expressly implication. Atmel's products authorized critical components life support devices systems. Atmel® CacheLogic® registered trademarks Atmel Corporation. Freeramis trademark BySoft, Astrium® registered trademark Astrium SAS. Other terms products trademarks Atmel others. Ref.: 4015A-AERO-06/02/12M

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