MC74HC164A identical pinout LS164. device inputs compatible with stand
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MC74HC164A 8-Bit Serial-Input/ Parallel-Output Shift Register
MC74HC164A identical pinout LS164. device inputs compatible with standard CMOS outputs; with pullup resistors, they compatible with LSTTL outputs. MC74HC164A 8-bit, serial-input parallel-output shift register. serial data inputs, provided that input used data enable. Data entered each rising edge clock. active-low asynchronous Reset overrides Clock Serial Data inputs.
PDIP-14 SUFFIX CASE MC74HC164AN AWLYYWW SOIC-14 SUFFIX CASE 751A TSSOP-14 SUFFIX CASE 948G 164A ALYW HC164A AWLYWW
Output Drive Capability: LSTTL Loads Outputs Directly Interface CMOS, NMOS, Operating Voltage Range: Input Current: High Noise Immunity Characteristic CMOS Devices Compliance with Requirements Defined JEDEC Standard Chip Complexity: FETs Equivalent Gates
LOGIC DIAGRAM
SERIAL DATA INPUTS DATA PARALLEL DATA OUTPUTS
Assembly Location Wafer Year Work Week
ASSIGNMENT
RESET CLOCK
CLOCK
RESET
FUNCTION TABLE
Inputs Outputs Change
ORDERING INFORMATION
Device MC74HC164AN MC74HC164AD MC74HC164ADR2 MC74HC164ADT MC74HC164ADTR2 Package PDIP-14 SOIC-14 SOIC-14 TSSOP-14 TSSOP-14 Shipping 2000 Rail 2500 Reel Rail 2500 Reel
Reset Clock
data input data shifted from preceding stage rising edge clock input.
Semiconductor Components Industries, LLC, 2000
March, 2000 Rev.
Publication Order Number: MC74HC164A/D
MC74HC164A
MAXIMUM RATINGS*
Symbol Parameter Value Unit Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Vout Output Voltage (Referenced GND) Input Current, Iout Output Current, Supply Current, Pins Power Dissipation Still Air, Plastic SOIC Package TSSOP Package Tstg Storage Temperature
This device contains protection circuitry guard against damage high static voltages electric fields. However, precautions must taken avoid applications voltage higher than maximum rated voltages this high-impedance circuit. proper operation, Vout should constrained range (Vin Vout) VCC. Unused inputs must always tied appropriate logic voltage level (e.g., either VCC). Unused outputs must left open.
Lead Temperature, from Case Seconds (Plastic DIP, SOIC TSSOP Package)
*Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions. Derating Plastic DIP: mW/_C from 125_C SOIC Package: mW/_C from 125_C TSSOP Package: mW/_C from 125_C high frequency heavy load considerations, Chapter Semiconductor High-Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Unit
Supply Voltage (Referenced GND)
Vin, Vout
Input Voltage, Output Voltage (Referenced GND) Operating Temperature, Package Types Input Rise Fall Time (Figure
1000
ELECTRICAL CHARACTERISTICS (Voltages Referenced GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
-55_C 25_C 3.15 1.35
85_C 125_C
3.15 1.35 3.15 1.35
Unit
Minimum High-Level Input Voltage
Vout |Iout|
Maximum Low-Level Input Voltage
Vout |Iout|
Minimum High-Level Output Voltage
|Iout|
|Iout| |Iout| |Iout|
2.48 3.98 5.48
2.34 3.84 5.34
2.20 3.70 5.20
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MC74HC164A
ELECTRICAL CHARACTERISTICS (Voltages Referenced GND)
Guaranteed Limit Symbol Parameter Test Conditions -55_C 25_C
85_C 125_C
0.33 0.33 0.33 0.40 0.40 0.40
Unit
Maximum Low-Level Output Voltage
|Iout|
|Iout| |Iout| |Iout| Iout
0.26 0.26 0.26
Maximum Input Leakage Current
Maximum Quiescent Supply Current (per Package)
NOTE: Information typical parametric values found Chapter Semiconductor High-Speed CMOS Data Book (DL129/D).
Guaranteed Limit Symbol fmax Parameter -55_C 25_C
ELECTRICAL CHARACTERISTICS Input
85_C 125_C
Unit
Maximum Clock Frequency (50% Duty Cycle) (Figures
tPLH, tPHL
Maximum Propagation Delay, Clock (Figures
tPHL
Maximum Propagation Delay, Reset (Figures
tTLH, tTHL
Maximum Output Transition Time, Output (Figures
Maximum Input Capacitance
NOTES: propagation delays with loads other than Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). Information typical parametric values found Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). Typical 25°C, Power Dissipation Capacitance (Per Package)* Used determine no-load dynamic power consumption: load considerations, Chapter Semiconductor High-Speed CMOS Data Book (DL129/D).
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NOTE: Information typical parametric values found Chapter Semiconductor High-Speed CMOS Data Book (DL129/D).
TIMING REQUIREMENTS (Input
Symbol
trec
Maximum Input Rise Fall Times (Figure
Minimum Pulse Width, Reset (Figure
Minimum Pulse Width, Clock (Figure
Minimum Recovery Time, Reset Inactive Clock (Figure
Minimum Hold Time, Clock (Figure
Minimum Setup Time, Clock (Figure
Parameter
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MC74HC164A
-55_C 25_C 1000 Guaranteed Limit
85_C 125_C
1000
1000
Unit
MC74HC164A
DESCRIPTIONS
INPUTS (Pins
register completely static, allowing clock rates down continuous intermittent mode.
OUTPUTS (Pins
Serial Data Inputs. Data these inputs determine data entered into first stage shift register. high level entered into shift register, both inputs must high, thereby allowing input used data-enable input. When only serial input used, other must connected VCC.
Clock (Pin
Parallel Shift Register Outputs. shifted data presented these outputs true, noninverted, form.
CONTROL INPUT Reset (Pin
Shift Register Clock. positive-going transition this shifts data each stage next stage. shift
Active-Low, Asynchronous Reset Input. voltage applied this input resets internal flip-flops sets Outputs level state.
SWITCHING WAVEFORMS
CLOCK
tPHL 1/fmax tPLH tPHL RESET
trec
tTLH tTHL
CLOCK
Figure
Figure
TEST POINT VALID CLOCK *Includes probe capacitance DEVICE UNDER TEST OUTPUT
Figure
Figure Test Circuit
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MC74HC164A
EXPANDED LOGIC DIAGRAM
CLOCK
RESET
TIMING DIAGRAM
CLOCK RESET
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MC74HC164A
PACKAGE DIMENSIONS
PDIP-14 SUFFIX CASE 646-06 ISSUE
NOTES: LEADS WITHIN 0.13 (0.005) RADIUS TRUE POSITION SEATING PLANE MAXIMUM MATERIAL CONDITION. DIMENSION CENTER LEADS WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. ROUNDED CORNERS OPTIONAL. INCHES 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 0.052 0.095 0.008 0.015 0.115 0.135 0.300 0.015 0.039 MILLIMETERS 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 1.32 2.41 0.20 0.38 2.92 3.43 7.62 0.39 1.01
SEATING PLANE
SOIC-14 SUFFIX CASE 751A-03 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.127 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION.
0.25 (0.010)
SEATING PLANE
0.25 (0.010)
MILLIMETERS 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 0.19 0.25 0.10 0.25 5.80 6.20 0.25 0.50
INCHES 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 0.008 0.009 0.004 0.009 0.228 0.244 0.010 0.019
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MC74HC164A
PACKAGE DIMENSIONS
TSSOP-14 SUFFIX CASE 948G-01 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH GATE BURRS SHALL EXCEED 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSION. INTERLEAD FLASH PROTRUSION SHALL EXCEED 0.25 (0.010) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. TERMINAL NUMBERS SHOWN REFERENCE ONLY. DIMENSION DETERMINED DATUM PLANE -W-. MILLIMETERS 4.90 5.10 4.30 4.50 1.20 0.05 0.15 0.50 0.75 0.65 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 INCHES 0.193 0.200 0.169 0.177 0.047 0.002 0.006 0.020 0.030 0.026 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252
0.10 (0.004) 0.15 (0.006)
0.25 (0.010)
IDENT.
DETAIL
0.15 (0.006)
SECTION
0.10 (0.004) SEATING
PLANE
DETAIL
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MC74HC164A/D
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