MC74AC573/74ACT573 high-speed octal latch with buffered common Latch E

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MC74AC573/74ACT573 high-speed octal latch with buffered common Latch E

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MC74AC573, MC74ACT573 Octal Buffer/Line Driver with 3-State Outputs
MC74AC573/74ACT573 high-speed octal latch with buffered common Latch Enable (LE) buffered common Output Enable (OE) inputs. MC74AC573/74ACT573 functionally identical MC74AC373/74ACT373 inputs outputs opposite sides.
PDIP-20 SUFFIX CASE
Inputs Outputs Opposite Sides Package Allowing Easy
Interface with Microprocessors Useful Input Output Port Microprocessors Functionally Identical MC74AC373/74ACT373 3-State Outputs Interfacing Outputs Source/Sink ACT573 Compatible Inputs
SO-20 SUFFIX CASE
TSSOP-20 SUFFIX CASE 948E EIAJ-20 SUFFIX CASE
ORDERING INFORMATION
Device MC74AC573N MC74ACT573N MC74AC573DW Package PDIP-20 PDIP-20 SOIC-20 SOIC-20 SOIC-20 SOIC-20 TSSOP-20 Shipping Units/Rail Units/Rail Units/Rail 1000 Tape Reel Units/Rail 1000 Tape Reel Units/Rail
Figure Pinout 20-Lead Packages Conductors (Top View)
ASSIGNMENT
D0-D7 O0-O7 FUNCTION Data Inputs Latch Enable Input 3-State Output Enable Input 3-State Latch Outputs
MC74AC573DWR2 MC74ACT573DW MC74ACT573DWR2 MC74AC573DT MC74AC573DTR2 MC74ACT573DT MC74ACT573DTR2 MC74AC573M
TSSOP-20 2500 Tape Reel TSSOP-20 Units/Rail
TSSOP-20 2500 Tape Reel EIAJ-20 EIAJ-20 EIAJ-20 EIAJ-20 Units/Rail 2000 Tape Reel Units/Rail 2000 Tape Reel
MC74AC573MEL MC74ACT573M MC74ACT573MEL
Figure Logic Symbol
DEVICE MARKING INFORMATION
general marking information device marking section page this data sheet.
Semiconductor Components Industries, LLC, 2001
May, 2001 Rev.
Publication Order Number: MC74AC573/D
MC74AC573, MC74ACT573
TRUTH TABLE
Inputs Outputs
HIGH Voltage Level Voltage Level High Impedance Immaterial Previous before LOW-to-HIGH Transition Clock
FUNCTIONAL DESCRIPTION MC74AC573/74ACT574 contains eight D-type latches with 3-state output buffers. When Latch Enable (LE) input HIGH, data inputs enters latches. this condition latches transparent, i.e., latch output will change state each time input changes. When latches store information that present inputs setup time preceding HIGH-to-LOW transition 3-state buffers controlled Output Enable (OE) input. When LOW, buffers enabled. When HIGH buffers high impedance mode this does interfere with entering data into latches.
NOTE:
That this diagram provided only understanding logic operations should used estimate propagation delays.
Figure Logic Diagram
MAXIMUM RATINGS*
Symbol VOUT IOUT Tstg Parameter Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Output Voltage (Referenced GND) Input Current, Output Sink/Source Current, Current Output Storage Temperature Value -0.5 +7.0 -0.5 +0.5 -0.5 +0.5 +150 Unit
*Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions.
MC74AC573, MC74ACT573
RECOMMENDED OPERATING CONDITIONS
Symbol VIN, VOUT Supply Voltage Input Voltage, Output Voltage (Ref. GND) Input Rise Fall Time (Note Devices except Schmitt Inputs Input Rise Fall Time (Note Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current High Output Current Parameter ns/V ns/V Unit
from VCC; individual Data Sheets devices that differ from typical input rise fall times. from individual Data Sheets devices that differ from typical input rise fall times.
MC74AC573, MC74ACT573
CHARACTERISTICS
74AC Symbol Parameter +25°C Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage Maximum Level Output Voltage Maximum Input Leakage Current Maximum 3-State Current Minimum Dynamic Output Current Maximum Quiescent esce Supply Current 2.25 2.75 2.25 2.75 2.99 4.49 5.49 0.002 0.001 0.001 74AC -40°C +85°C Unit Conditions
Guaranteed Limits 3.15 3.85 1.35 1.65 2.56 3.86 4.86 0.36 0.36 0.36 ±0.1 3.15 3.85 1.35 1.65 2.46 3.76 4.76 0.44 0.44 0.44 ±1.0 VOUT VOUT IOUT *VIN IOUT *VIN VCC, (OE) VIL, VCC, VCC, VOLD 1.65 VOHD 3.85
±0.5
±5.0
IOLD IOHD
*All outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time. NOTE: guaranteed less than equal respective limit VCC.
MC74AC573, MC74ACT573
CHARACTERISTICS (For Figures Waveforms Section
74AC Symbol Parameter VCC* tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Propagation Delay Propagation Delay Propagation Delay Output Enable Time Output Enable Time Output Disable Time Output Disable Time +25°C 13.0 10.0 12.0 13.0 12.0 11.0 11.0 12.5 11.0 74AC -40°C +85°C 15.0 11.5 14.0 11.0 15.0 11.0 14.0 10.0 12.0 10.0 12.5 13.5 12.0 10.5 Unit Fig.
*Voltage Range ±0.3 Voltage Range ±0.5
OPERATING REQUIREMENTS
74AC Symbol Parameter VCC* Setup Time, HIGH Hold Time, HIGH Pulse Width, HIGH Width +25°C 74AC -40°C +85°C Unit Fig.
Guaranteed Minimum
*Voltage Range ±0.3 Voltage Range ±0.5
MC74AC573, MC74ACT573
CHARACTERISTICS
74ACT Symbol Parameter +25°C Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage Maximum Level Output Voltage ICCT Maximum Input Leakage Current Additional Max. ICC/Input Maximum 3-State Current Minimum Dynamic Output Current Maximum Quiescent esce Supply Current 4.49 5.49 0.001 0.001 74ACT -40°C +85°C Unit Conditions
Guaranteed Limits 3.86 4.86 0.36 0.36 ±0.1 ±0.5 3.76 4.76 0.44 0.44 ±1.0 ±5.0 VOUT VOUT IOUT *VIN IOUT *VIN VCC, (OE) VIL, VCC, VCC, VOLD 1.65 VOHD 3.85
IOLD IOHD
*All outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time.
CHARACTERISTICS (For Figures Waveforms Section
74ACT Symbol Parameter VCC* tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ agation Propagation Delay Propagation Delay agation agation Propagation Delay agation Propagation Delay Output Enable Time Output Enable Time Output Disable Time Output Disable Time +25°C 10.5 10.5 10.5 74ACT -40°C +85°C 10.5 10.5 12.5 Unit Fig.
*Voltage Range ±0.5
MC74AC573, MC74ACT573
OPERATING REQUIREMENTS
74ACT Symbol Parameter VCC* Setu Setup Time, HIGH Hold Time, HIGH Pulse Width, HIGH Width +25°C 74ACT -40°C +85°C Unit Fig.
Guaranteed Minimum
*Voltage Range ±0.5
CAPACITANCE
Symbol Input Capacitance Power Dissipation Capacitance Parameter Value Unit Test Conditions
MC74AC573, MC74ACT573
MARKING DIAGRAMS
PDIP-20 MC74AC573N AWLYYWW SO-20 AC573 AWLYYWW TSSOP-20 EIAJ-20
ALYW
74AC573 AWLYWW
MC74ACT573N AWLYYWW
ACT573 AWLYYWW
ALYW
74ACT573 AWLYWW
Assembly Location Wafer Year Work Week
MC74AC573, MC74ACT573
PACKAGE DIMENSIONS
PDIP-20 SUFFIX PLASTIC PACKAGE CASE 738-03 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEAD WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. INCHES 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 0.050 0.070 0.100 0.008 0.015 0.110 0.140 0.300 0.020 0.040 MILLIMETERS 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 1.27 1.77 2.54 0.21 0.38 2.80 3.55 7.62 0.51 1.01
SEATING PLANE
0.25 (0.010)
0.25 (0.010)
SO-20 SUFFIX PLASTIC SOIC PACKAGE CASE 751D-05 ISSUE
NOTES: DIMENSIONS MILLIMETERS. INTERPRET DIMENSIONS TOLERANCES ASME Y14.5M, 1994. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL 0.13 TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. MILLIMETERS 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 10.05 10.55 0.25 0.75 0.50 0.90
0.25
0.25
SEATING PLANE
MC74AC573, MC74ACT573
TSSOP-20 SUFFIX PLASTIC TSSOP PACKAGE CASE 948E-02 ISSUE
0.15 (0.006)
0.10 (0.004)
IDENT
SECTION 0.25 (0.010)
0.15 (0.006)
0.100 (0.004) SEATING
PLANE
DETAIL
EIAJ-20 SUFFIX PLASTIC EIAJ PACKAGE CASE 967-01 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD FLASH PROTRUSIONS MEASURED PARTING LINE. MOLD FLASH PROTRUSIONS SHALL EXCEED 0.15 (0.006) SIDE. TERMINAL NUMBERS SHOWN REFERENCE ONLY. LEAD WIDTH DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS LEAD WIDTH DIMENSION MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT LOCATED LOWER RADIUS FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS ADJACENT LEAD 0.46 0.018). MILLIMETERS -2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 7.40 8.20 0.50 0.85 1.10 1.50 0.70 0.90 -0.81 INCHES -0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 0.291 0.323 0.020 0.033 0.043 0.059 0.028 0.035 -0.032
DETAIL
VIEW
0.13 (0.005)
0.10 (0.004)
DETAIL
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH GATE BURRS SHALL EXCEED 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSION. INTERLEAD FLASH PROTRUSION SHALL EXCEED 0.25 (0.010) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. TERMINAL NUMBERS SHOWN REFERENCE ONLY. DIMENSION DETERMINED DATUM PLANE -W-. MILLIMETERS 6.40 6.60 4.30 4.50 -1.20 0.05 0.15 0.50 0.75 0.65 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 INCHES 0.252 0.260 0.169 0.177 -0.047 0.002 0.006 0.020 0.030 0.026 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252
MC74AC573, MC74ACT573
Notes
MC74AC573, MC74ACT573
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MC74AC573/D

MC74AC573/74ACT573 high-speed octal latch with buffered common Latch E

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