Transient Voltage Suppression AN8820.3 AN9108.4 AN9211.2 AN9304.4
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Transient Voltage Suppression
AN8820.3 AN9108.4 AN9211.2 AN9304.4 AN9307.3 AN9308.2 AN9310.1 AN9311.6 AN9312.5 AN9612.2 AN9671.2 AN9708 AN9732.1 AN9734 AN9767.1 AN9768 AN9769 AN9771.1 AN9772 AN9773 AN9774.1 TB373.1
Recommendations Soldering Terminal Leads Varistor Discs 10-3 Littelfuse "ML" Multilayer Surface Mount Surge Suppressors 10-4 Soldering Recommendations Surface Mount Multilayer Metal Oxide Varistors. 10-13 Transient Protection Using SP720 10-19 Connector Varistor Transient Voltage Protection Connectors 10-29 Line Voltage Transients Their Suppression 10-36 Surge Suppression Technologies Mains Compared (MOVs, SADs, Tubes, Filters Transformers). 10-41 ABCs MOVs 10-46 Suppression Transients Automotive Environment. 10-49 1000-4-2 Immunity Transient Current Capability SP72X Series Protection Arrays 10-61 ABCs Littelfuse Multilayer Suppressors 10-67 SP720, SP721 SP723 Turn-On Turn-Off Characteristics. 10-70 Combining GDTs MOVs Surge Protection Power Lines 10-73 Electromagnetic Compatibility Standards Industrial Process Measurement Control Equipment 10-76 Littelfuse Varistors Basic Properties, Terminology Theory 10-89 Transient Suppression Devices Principles 10-102 Overview Electromagnetic Lightning Induced Voltage Transients 10-110 Selecting Littelfuse Varistor 10-121 Littelfuse Varistor Design Examples 10-127 Varistor Testing 10-141 Surgectors Telecommunications Systems 10-149 Introduction Surface Mount Surgector 10-155
10-1
Subject Listing
General/Transient Suppression AN9211.2 AN9308.2 AN9310.1 AN9768 AN9769 TB373.1 MOVs AN8820.3 AN9307.3 AN9311.6 AN9732.1 AN9767.1 AN9771.1 AN9772 AN9773 Multilayer Suppressors AN9108.4 AN9211.2 AN9671.2 SP72X Series AN9304.4 AN9612.2 Automotive AN9312.5 ESD/EMC AN9304.4 AN9612.2 AN9708 AN9734 AN9671.2 AN9108.4 Telecom AN9774.1 TB373.1 Surgectors Telecommunications Systems 10-149 Introduction Surface Mount Surgector 10-155 Transient Protection Using SP720 10-19 1000-4-2 Immunity Transient Current Capability SP72X Series Protection Arrays 10-61 SP720, SP721 SP723 Turn-On Turn-Off Characteristics. 10-70 Electromagnetic Compatibility Standards Industrial Process Measurement Control Equipment 10-76 ABCs Littelfuse Multilayer Suppressors 10-67 Littelfuse "ML" Multilayer Surface Mount Surge Suppressors 10-4 Suppression Transients Automotive Environment. 10-49 Transient Protection Using SP720 10-19 1000-4-2 Immunity Transient Current Capability SP72X Series Protection Arrays 10-61 Littelfuse "ML" Multilayer Surface Mount Surge Suppressors 10-4 Soldering Recommendations Surface Mount Multilayer Metal Oxide Varistors. 10-13 ABCs Littelfuse Multilayer Suppressors 10-67 Recommendations Soldering Terminal Leads Varistor Discs 10-3 Connector Varistor Transient Voltage Protection Connectors 10-29 ABCs MOVs 10-46 Combining GDTs MOVs Surge Protection Power Lines 10-73 Littelfuse Varistors Basic Properties, Terminology Theory 10-89 Selecting Littelfuse Varistor 10-121 Littelfuse Varistor Design Examples 10-127 Varistor Testing 10-141 Soldering Recommendations Surface Mount Multilayer Metal Oxide Varistors. 10-13 Line Voltage Transients Their Suppression 10-36 Surge Suppression Technologies Mains Compared (MOVs, SADs, Tubes, Filters Transformers). 10-41 Transient Suppression Devices Principles 10-102 Overview Electromagnetic Lightning Induced Voltage Transients 10-110 Introduction Surface Mount Surgector 10-155
10-2
Recommendations Soldering Terminal Leads Varistor Discs
Application Note January 1998 AN8820.3
Introduction
series varistor discs with silver electrodes specifically designed custom assembly packaging. take advantage excellent performance reliability Littelfuse varistor technology, important that correct materials processes used when soldering terminal leads disc.
These mildly activated fluxes, most commonly used mounting electronic components. They used with varistors, recommended. These fully activated fluxes corrosive, difficult remove, lead varistor failure. They must used flux varistor discs.
/Title (AN88 Solder Fixtures /SubWhere varistor discs custom assembled packaged, ject fixturing normally employed maintain disc terminal (Recalignment during solder reflow. Soldering fixtures should ommen lightweight design reduce their thermal mass and, hence, dations time necessary bring them reflow temperature. Disc terminal lead should pressed together lightly Solder- during whole soldering process help expel flux residues excess solder from interface. Trapped flux residue result bubbling solder, which leaves Termi- voids between silver electrode terminal. Excess solder will enhance tendency silver electrode leach. Leads Soldering Ovens Box, convection, conveyor belt ovens suitable reflow solder processes using fixtures. VarisBox ovens should have forced circulation with sufficient ventilation remove flux vapors. important that every Discs) fixture position oven subjected same heating /Autho conditions. Therefore, fixture positions should limited locations within oven where uniform flow temperature maintained. /KeyConvection ovens employ carefully designed exit baffles words (Littel- facilitate close control soldering environment. best environment soldering varistors. inert fuse, (nitrogen) reducing atmosphere sometimes employed Inc., reduce oxidation these ovens, neither these semirecommended processing unpassivated varistors. conA very repeatable temperature profile achieved with ductor, conveyor belt oven. profile determined temperature heated zone(s) speed belt. SupA fixed loading pattern also helps achieving uniform results. presFluxes sion Fluxes used chemical cleaning disc terminal Prodsurfaces. There three basic types: ucts, These unactivated fluxes less effective than TVS, others reducing oxides copper Tranpalladium/silver metallizations, ones recsient ommended varistors. other fluxes
increase leakage, reduce long term reliability, promote leaching silver electrode. Noncharring, non-activated type fluxes such Alpha equivalent best. 10-3
Solders Solder Temperature
Solders form pastes preforms used with varistors. Preforms solder shapes premanufactured specific sizes. Upon melting, they provide highly reproducible volumes solder joining. Preforms prefluxed, eliminating need additional fluxing. Heat should applied varistor quickly, flux will have sufficient time activate clean joining surfaces. result will poor solderability. other hand, varistor should held longer than necessary elevated temperature. heat applied slowly maintained above reflow temperature long, leaching silver electrode into solder will occur, reducing disc terminal bond strength. avoid leaching, only solders with least silver content (e.g., 62Sn/36Pb/2Ag equivalent) should used; Table equally important observe processing time temperature limits. Failure result excessive leakage alterations varistor's characteristic.
Cleaning Cleaning Fluids
Cleaning important step soldering process. prevents electrical faults such high current leakage caused ionic contamination, absorbed organic material, dirt films, resins. wide variety cleaning processes applied varistors, including water based, solvent based mixture both, tailored specific applications. Littelfuse recommends 1.1.1 trichloroethane removal flux residues after soldering. Defluxing solvent bath with ultrasonic agitation, followed solvent vapor wash, very effective cleaning process. After cleaning, boiling point solvent completely evaporates from disc, will harm solder joints.
TABLE SILVER BEARING SOLDERS (ALPHA METALS) ALLOY 62Sn/36Pb/2AG 96.5Sn/3.5Ag 96Sn/5 10Sn/88Pb/2Ag 5Sn/92.5Pb/2.5Ag 97.5Pb/2.5Ag
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MELTING TEMPERATURE 179oC 221oC 221oC 245oC 268oC 302oC 280oC 305oC
Littelfuse, Inc. 1999
Littelfuse "ML" Multilayer Surface Mount Surge Suppressors
Application Note July 1999 AN9108.4
/Title (AN91 /Subject (Harris "ML" Multilayer Surface Mount Surge Suppressors) /Autho /Keywords (ESD, IEC, EMC, Electromagnet Compatibility, TVS, Transient Suppression, Protection, Sur-
Littelfuse produces four families multilayer suppressors: MLE, AUML. While much information presented here generic four, this note focuses version.
found wherever energy stored inductances, capacitors, mechanical devices, such motors generators, returned circuit. Stray capacitance inductance also oscillations, making problem even worse. While direct from lightning real concern printed circuit board user, what concern level transient which "let through" primary suppressor. This "follow current" will last number microseconds. this current above failure threshold device circuit, will destroyed. most likely types transients from which circuit must protected electrostatic discharge (ESD), switching reactive loads. will result when conducting materials brought close another voltage discharge occurs. resulting voltage discharge high 25kV will last 50ns. Transients also generated when inductive load disconnected existing energy discharged back into circuit. generated from opening mechanical relay switches another common source switching transients. Whatever cause transient, natural man-made, damage potential real cannot casually dismissed reliable operation equipment expected. properly select transient suppressor, frequency occurrence transients, open-circuit voltage, short circuit-current, source impedance circuit must known.
LIGHTNING
Introduction
Sensitivity Components
Modern electronic circuits vulnerable damage from voltage transient overstresses. progress development faster with higher levels integration accompanied increase vulnerability. Figure shows relative damage susceptibility some commonly used components, including discrete semiconductors integrated circuits voltage, current, power seen device must below failure threshold device. magnitude voltage transient determined nature source, characteristic impedance circuit resistance inductance between source transient device.
Transient Threat
Transients exist every system, wire connecting pieces equipment components. sources transient lightning, nuclear electromagnetic pulse, high energy switching high voltage sparkover, electrostatic discharge. These transients
DIODES WAVE MIXER SIGNAL RECTIFIERS REFERENCE ZENER TRANSISTORS POWER HIGH POWER DIGITAL LINEAR BASIC COMPONENTS SCRS JFETS CAPACITORS RESISTORS WATTS
ELECTROMAGNETIC INTERFERENCE ELECTROSTATIC DISCHARGE ELECTROMAGNETIC PULSE
FIGURE RELATIVE DAMAGE SUSCEPTIBILITY ELECTRONIC COMPONENTS (FOR PULSE)
10-4
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Littelfuse, Inc. 1999
Application Note 9108 Multilayer Surge Suppressor Description
Littelfuse multilayer (ML) series transient voltage surge suppressors represents breakthrough area semiconducting ceramic processing. suppressor compact, surface mountable chip that voltage dependent, nonlinear, bidirectional. electrical behavior similar that back-to-back diode, i.e. inherently fully symmetrical, offering protection both forward reverse directions. sharp, symmetrical breakdown characteristics device provides excellent protection from damaging voltage transients (Figure When exposed high voltage transients, impedance changes many orders magnitude from near open circuit highly conductive state.
Energy handling capability significantly increased with larger overall package outline. energy handling capability doubles from 0.6J (10/1000µs waveform) 0.120 inch 0.06 ("1206") inch device 1.2J 0.120 inch 0.100 ("1210") inch device. crystalline structure transient voltage suppressor (TVS) consists matrix fine, conductive grains separated uniform grain boundaries, forming many junctions (Figure These boundaries responsible blocking conduction voltages, source nonlinear electrical conduction higher voltages. Conduction transient energy takes place between these junctions. uniform crystalline grains heat sinks energy absorbed device transient condition, ensures even distribution transient energy (heat) throughout device. This even distribution results enhanced transient energy capability long term reliability.
FIRED CERAMIC DIELECTRIC
FIGURE SHARP SYMMETRICAL BREAKDOWN MULTILAYER SUPPRESSOR
METAL ELECTRODES
Construction
constructed forming combination alternating electrode plates semiconducting ceramic layers into block. Each alternate layer electrode connected opposite terminations (Figure interdigitated block formation greatly enhances available cross-sectional area active conduction transients. This paralleled arrangement inner electrode layers represents significantly more active surface area than small outline package suggest. This increased active surface area results proportionally higher peak energy capability.
SEMICONDUCTING CERAMIC INNER ELECTRODES TERMINATION DEPLETION REGION
DEPLETION REGION GRAINS
FIGURE MULTILAYER TRANSIENT VOLTAGE SUPPRESSOR
Package Outline
surge suppressor leadless chip device that much smaller size than components designed protect. present size offerings "0603", "0805", "1206", "1210", "1812" "2220" chip sizes. Littelfuse MLE, AUML data sheets detailed device information size offering. Since device inherently bidirectional, symmetrical orientation placement printed circuit board concern. robust construction makes ideally suitable endure thermal stresses encountered soldering, assembling manufacturing steps involved surface mount applications. device inherently passivated fired ceramic material, will support combustion thus immune risk flammability which present plastic epoxy molded parts used industry standard packages.
FIGURE MULTILAYER INNER ELECTRODES SEMICONDUCTING CERAMIC (CROSS-SECTION)
Another advantage this type construction that breakdown voltage device dependent dielectric thickness between electrode layers overall thickness device. Increasing decreasing dielectric thickness will change breakdown voltage device.
10-5
Application Note 9108 Characteristics
Speed Response
clamping action suppressor depends conduction mechanism similar that other semiconductor devices. response time zinc oxide material itself been shown less than 500ps apparent slow response time often associated with zinc oxide parasitic inductance package leads. Thus, single most critical element affecting response time suppressor lead length and, hence, inductance leads. suppressor true surface mount device, with leads external packaging, virtually zero inductance. actual applications, estimation voltage overshoot more practical relevance than that speed response. multilayer suppressor essentially zero inductance little voltage overshoot. actual response time surge suppressor 5ns. This response time more than sufficient transients which likely encountered component printed circuit board.
Temperature Dependence
state, characteristics suppressor approaches linear (ohmic) relationship shows temperature dependent affect (Figure suppressor high resistance mode (approaching 106) appears near open circuit. This equivalent leakage region traditional zener diode. Leakage currents maximum rated voltage microamp range. When clamping transients higher currents above milliamp range), suppressor approaches near short circuit. Here temperature variation characteristics becomes minimal throughout full peak current energy range (Figure clamping voltage multilayer transient voltage suppressor same 25oC 125oC.
V3.5MLA1206
V33MLA1206
V68MLA1206
Clamping Voltage
clamping voltage suppressor peak voltage appearing across device when measured under conditions specified pulse current specified waveform. industry recommended waveform clamping voltage 8/20µs pulse which been endorsed IEEE ANSI. clamping voltage should level which transient must suppressed ensure that system component failure does occur. Shunt-type suppressors like used parallel systems they protect. effectiveness shunt suppressors increased understanding important influence that source line impedance play system, such shown Figure
TEMPERATURE (oC)
FIGURE TEMPERATURE DEPENDENCE LOWER VOLTAGE
V26MLA1206 CLAMPING VOLTAGE V14MLA1206
ZSOURCE
ZLINE (CLAMPING VOLTAGE) SYSTEM PROTECTED
V3.5MLA1206
VSOURCE
ZSUPPRESSOR
FIGURE VOLTAGE DIVISION BETWEEN SOURCE, LINE SUPPRESSOR IMPEDANCE
TEMPERATURE (oC)
FIGURE CLAMPING VOLTAGE VARIATION OVER TEMPERATURE
obtain lowest clamping voltage (VC) possible, desirable lowest suppressor impedance (ZSUPPRESSOR) highest line impedance (ZLINE). suppressor impedance inherent feature device, line impedance become important factor, selecting location suppressor, adding resistances inductances series.
SUPPRESSOR SOURCE SUPPRESSOR LINE SOURCE
Peak Current Capability
peak current handling capability, hence ability dissipate transient energy, suppressor's best features. This achieved interdigitated construction which ensures that large volume suppressor material available absorb transient energy. This structure ensures that peak temperatures generated transient kept low, because package available absorb energy.
10-6
Application Note 9108
(Figure Because peak temperatures, will experience very thermal stress, both during heating cooling.
METAL ELECTRODES
Size
principal benefit suppressor their compact size comparison other surface mount components. Additionally, solder mounting pads required much smaller, resulting even more circuit board area savings. stated, present offering multilayer suppressor size ranges from 0603 2220, depending upon series type. Surface mounted surge suppressors include leaded gullwing j-bend zener diodes relatively large surface mount metal oxide varistor. such cases large area board needed mounting. Electrically equivalent suppressors much smaller, resulting significant surface mount board area savings (Figure 10). Additional board area savings realized with smaller solder mounting area required compared gullwing j-bend packages (Figure 11).
ELEVATION VIEW 0.400 0.095 GULLWING J-BEND 0.064 PLAN VIEW 0.320 0.137
DEPLETION REGION
DEPLETION REGION
GRAINS
FIGURE INTERDIGITATED CONSTRUCTION
Repetitive pulsing suppressors (Figure show negligible shift nominal voltage milliamp (less than 3%). There also minimal change leakage current these devices. Littelfuse suppressor also operate 125oC without need derating.
V26MLA1206 150A (8/20ms) 10,000 PULSES NOMINAL VOLTAGE
0.245 VOLTAGE V26MLA1206 GULL WING J-BEND 0.077
FIGURE COMPARATIVE SURFACE MOUNT SURGE SUPPRESSORS
2000 4000 6000 8000 10000 12000
NUMBER PULSES
FIGURE REPETITIVE PEAK PULSE CAPABILITY FIGURE SOLDERING LAND REQUIREMENTS
Capacitance
suppressor constructed building composite assembly alternate layers ceramic material metal electrode. Since capacitance proportional area, inversely proportional thickness, lower voltage have higher capacitance. Littelfuse data sheets specific values which range from less than 6000 picofarads. Typical values capacitance frequency shown Table (for types).
TABLE TYPICAL CAPACITANCE VALUES FREQUENCY CAPACITANCE (pF) FREQUENCY BIAS 1VP-P) DEVICE TYPE V5.5MLA1206 V68MLA1206 1kHz 6250 10kHz 5680 100kHz 5350 1MHz 5000 DIMENSIONS ML1206 Gull Wing J-Bend 0.203 0.410 0.330 0.103 0.125 0.125 0.065 0.050 0.070
Applications
Protection Integrated Circuits Voltage Circuits
Protection against coupling transients mainly required locations printed circuit board. first input/output port which affords protection sensitive inputs line drivers receivers. second location power input integrated circuits input side board. This location will serve keep transient threat from transmitting throughout rest board.
10-7
Application Note 9108
past, IC's have been protected means decoupling capacitors across input power supply lines. capacitors suppressed transients supplied peak current high speed switching operations. Unfortunately, energy stored capacitor, with it's suppression capability, very small: Large electrolytic capacitors usually placed output supply. These capacitors bulky somewhat ineffective because their poor high frequency response. Crowbars also used sense overvoltages. crowbar functions such that overvoltage shorts output until input fuse circuit breaker opens, thereby turning system off. Other concerns consider well power supplies supply circuitry, input output terminals carrying information. long interconnections short, transients seem problem. However, when connections from board-to-board, system-to-system, system-to-sensor considered transients must controlled (see Figure 12). still converted into heat silicon pellet. heat travels somewhat faster surrounding mass copper. However, large temperature differentials still exist. mismatch thermal coefficient expansion between silicon copper will create shearing forces that lead failures thermal fatigue. voltage V5.5MLA1206 used protect integrated circuits requiring input, e.g. integrated circuits, systems containing voltage ICs, memories, test equipment, data processing equipment, etc. suppressor should connected upstream from protected. maximum clamping voltage suppressor depends maximum transient current. clamping voltage high signal currents low, hybrid arrangement multilayer suppressor series impedance inductor resistor) effective cost solution. series impedance should large possible without distorting attenuating signal appreciably. clamping voltage suppressor should low, high enough prevent attenuation distortion signal.
CMOS Protection
SYSTEM SENSORS SENSORS SYSTEM
SYSTEM
MODEM
MODEM
SYSTEM
Latch-up phenomenon inherent basic CMOS structure. initiated external conditions, present only momentarily, once induced difficult reverse, except complete removal power chip. Latch-up results large current flow from ground. triggered increasing voltage across power terminal, such excessive voltage (normally well above maximum rating device). This prevented connecting voltage transient suppressor across Unfortunately, even systems power supply variations kept small, individual inputs still vary widely. Latchup also known occur CMOS systems when voltage supplied input exceeds supply voltage. Again, transients culprit; wrong sequence powerup power-down have same effect. suppressor connected from ground will eliminate most latch-up problems caused input over voltage. Additionally suppressor connected from input ground will help protect input from damaging transients such electrostatic discharge (Figure 13).
FIGURE SYSTEM-TO-SYSTEM SYSTEM-TO-SENSOR PROTECTION
distances become long interconnections between systems result transient pickup, then transient suppression prerequisite. Devices that more effective than resistors capacitors needed provide necessary protection. Small spark gaps silicon suppressors have been used quite effectively, spark gaps still need zener diode reduce initial voltage rise that triggers spark gaps. Silicon suppressors, with their almost ideal characteristics, used quite extensively. However, zeners have current-surge capabilities limited value transient suppressor when relatively high magnitude transient encountered. Surge capability because thermal mass silicon chip, where energy transients converted into heat, small. Peak temperatures become high that part silicon will melt, device will fail. other hand, there zener diodes specifically designed transient suppression. thermal mass these devices increased attaching more copper silicon pellet. This approach helps, does eliminate basic problem. transient energy
INPUT
CMOS
OUTPUT
V3.5MLA1206
FIGURE PROTECTION CMOS DEVICES
Here, Littelfuse V3.5MLA1206 example, represents method protecting 3.5V CMOS logic.
10-8
Application Note 9108
Discrete MOSFET Protection
There been increasing migration from bipolar technology MOSFET technology. MOSFET gate could more susceptible damage from electrostatic discharges than bipolar transistor. Also, consequence fast MOSFET switching time "ringing" from wiring inductances. This could result MOSFET adjacent components being subjected short duration transient voltages. clamp these transients safe level. important when using suppressor connect close possible drain source leads MOSFET, order minimize loop inductance. suppressor true surface mount package lead inductance, this ensures that MOSFET does suffer additional transient voltage overshoot associated with leaded suppressors. protect output MOSFET, suppressor connected between drain source (Figure 14). This must have steady state voltage capability (VM(DC)) which exceeds worst case possible maximum supply voltage. clamping voltage peak transient current must less than minimum breakdown voltage MOSFET. example, protect against transients ±10% supply, V33MLA1206 suppressor with VM(DC) used. According transient curves data sheet, this will protect MOSFET with minimum breakdown from approximate transient pulse.
LOAD SUPPLY DRAIN INPUT GATE SUPPRESSOR
more densely packed boards with devices which have performance capabilities traditional through hole components. transient conditions which occur automobile best documented, best understood transient environments. load dump transient will develop when alternator charging flat battery suddenly removed from system. Peak voltages 125V develop last 200ms-400ms. Another common transient phenomena jump start which generated when using truck battery start car. This overvoltage applied minutes. Other transients result from relays solenoids switching off, from fuses blowing. Table shows some sources, amplitudes, polarity, energy levels generated transients automotive electrical system [8].
TABLE TYPICAL AUTOMOTIVE SUPPLY TRANSIENT SUMMARY ENERGY CAPABILITY CAUSE Failed Voltage Regulator VOLTAGE AMPLITUDE +18V ±24V >10J <125V Infrequent Infrequent
LENGTH TRANSIENT Steady State
FREQUENCY OCCURRENCE Infrequent
Minutes Jump Starts with Battery 200ms 400ms Load Dump; Disconnection Battery While High Charging Inductive-Load Switching Transient Alternator Field Decay
<320ms
SOURCE
-300V +80V -100V -40V <0.5J <75V <200V <0.001J <1.5V 20mV <10mJ 15kV
Often
FIGURE DISCRETE MOSFET PROTECTION
200ms
Each Turn-Off
Additionally suppressor used protect input discrete MOSFET from threat transient. protection MOSFET driven with gate drive, V14MLA1206 V14MLA1210 suppressor should connected from gate source. These devices will protect against pulses 25kV. also used protect MOSFETs (and bipolar transistors) from transients generated when switching inductive loads. this case, selected must able dissipate energy generated repetitive nature these inductive load transient pulses (the average power these transients must exceed 0.25W).
90ms
Ignition Pulse, Battery Disconnected Mutual Coupling Harness Ignition Pulse, Normal Accessory Noise Transceiver Feedback
<500Hz Several Times Vehicle Life Often
15µs
<500Hz Continuous 50Hz 10kHz R.F. Infrequent/ Random
Automotive System Protection
increased surface mount technology automotive industry resulted need smaller, 10-9
50ns
Application Note 9108
Extension Contact Life
When relays mechanical switches used control inductive loads, often necessary derate contacts their resistive load rating wear caused arcing contents. This arcing caused stored energy inductive load. Each time current inductive coil interrupted mechanical contacts, voltage across contacts increases until contacts arc. When contacts arc, voltage across decreases current coil increase somewhat. extinguishing causes additional voltage transient which again cause contacts arc. unusual restriking occur several times with total energy several times that which originally stored inductive load. this repetitive arcing that destructive contacts. used prevent initiation arc. Knowing energy absorbed pulse, pulse repetition rate maximum operating voltage sufficient select correct size suppressor. necessary ensure that device selected capable dissipating power generated coil [9]. part number device gives following basic information: Maximum Continuous Working Voltage (VM(AC)): This maximum continuous sinusoidal voltage which applied. This voltage applied temperature 125oC. Maximum Non-Repetitive Surge Current (ITM): This maximum peak current which applied 8/20µs impulse (Figure 15), with VM(DC) VM(AC) voltage also applied, without causing device failure. This pulse applied suppressor either polarity. Maximum Non-Repetitive Surge Energy (WTM): This maximum rated transient energy which dissipated single current pulse 10/1000µs, with rated VM(DC) VM(AC) voltage applied, without causing device failure. Maximum Clamping Voltage (VC): This peak voltage appearing across suppressor when measured 8/20µs impulse specified pulse current. clamping voltage shown current range maximum transient characteristic curves. Leakage Current (IL): This amount current drawn non-operational mode, i.e., when voltage applied across does exceed rated VM(DC) VM(AC) voltage. Nominal Voltage (VN(DC)): This voltage which begins enter conduction state suppress transients. This voltage defined point minimum maximum voltage specified. Capacitance (C): This capacitance when measured frequency 1MHz with 1VP-P voltage bias applied.
Description Ratings Characteristics
Maximum Continuous Working Voltage (VM(DC)): This maximum continuous voltage which applied maximum operating temperature (125oC) This voltage also used reference test point leakage current. This voltage always less than breakdown voltage device.
PERCENT PEAK VALUE
Virtual Origin Wave Time From Peak Virtual Front time 1.25 Virtual Time Half Value (Impulse Duration) Example: 8/20µs Current Waveform: Virtual Front Time 20µs Virtual Time Half Value
TIME
FIGURE CURRENT TEST WAVEFORM
Application Note 9108 Ordering Information
VXXML SUPPRESSION TYPES
1206
ML/MLE SERIES
DEVICE FAMILY TVSS Device MAXIMUM WORKING VOLTAGE
PACKING OPTIONS <100 Bulk (178mm) Diameter Reel (Note) 13in (330mm) Diameter Reel (Note) TERMINATION OPTION Letter: Ag/Pt (Standard) Ag/Pd CAPACITANCE OPTION Letter: Standard Capacitance Version
MULTILAYER DESIGNATOR PERFORMANCE DESIGNATOR
DEVICE SIZE: i.e.,
NOTE: Quantity reel depends upon device size.
Soldering Recommendations
principal techniques used soldering components surface mount technology Infra (IR) Reflow, Vapour Phase Reflow, Wave Soldering. When wave soldering, suppressor attached circuit board means adhesive. assembly then placed conveyor through soldering process contact wave. With Vapour Phase Reflow, device placed solder paste substrate. solder paste heated, reflows solders unit board. With suppressor, recommended solder 62/36/2 (Sn/Pb/Ag), 60/40 (Sn/Pb), 63/37 (Sn/Pb). Littelfuse also recommends solder flux. Wave soldering most strenuous processes. avoid possibility generating stresses thermal shock, preheat stage soldering process recommended, peak temperature solder process should rigidly controlled. When using reflow process, care should taken ensure that chip subjected thermal gradient steeper than degrees second; ideal gradient being degrees second. During soldering process, preheating within degrees solders peak temperature essential minimize thermal shock. Examples soldering conditions series suppressors given tables below. Once soldering process been completed, still necessary ensure that further thermal shocks avoided. possible cause thermal shock printed 10-11 circuit boards being removed from solder process subjected cleaning solvents room temperature. boards must allowed gradually cool less than 50oC before cleaning.
Termination Options
Littelfuse offers types electrode termination finish Multilayer product series: Silver/Platinum (standard). Silver/Palladium (optional).
MAXIMUM WAVE 260oC TEMPERATURE (oC) SECOND PREHEAT FIRST PREHEAT
TIME (MINUTES)
FIGURE WAVE SOLDER PROFILE
Application Note 9108
MAXIMUM TEMPERATURE 222oC TEMPERATURE (oC) 40-80 SECONDS ABOVE 183oC RAMP RATE >50oC/s PREHEAT ZONE
References
Littelfuse documents available internet, site http://www.littelfuse.com/ Overview Electrical Overstress Effects Semiconductor Devices," D.G. Pierce D.L. Durgin, Booz-Allen Hamilton, Inc., Albuquerque, "The Low-Voltage Metal-Oxide Varistor Protection Voltage (5V) ICs", Application Note AN9003.
"Protection Electronic Circuits From Overvoltages", Ronald Standler, 1989. "ZnO Varistors Transient Protection," L.M. Levinson, H.R. Phillip, IEEE Trans. Parts, Hybrids Packaging, 13:338-343, 1977. "ZnO Varistors Protection Against Nuclear Electromagnetic Pulses," Phillip, L.M. Levinson, 1981. "Overshoot: Lead Effect Varistor Characteristics," Fisher, F.A., G.E. Company, Schenectady, 1978. "The Connector Varistor Transient Voltage Protection Connectors", Paul McCambridge Martin Corbett, Application Note AN9307. "Suppression Transients Automotive Environment", Martin Corbett, Application Note AN9312. "Transient Voltage Suppression Devices", Harris Suppression Products DB450.
TIME (MINUTES)
FIGURE VAPOR PHASE SOLDER PROFILE
MAXIMUM TEMPERATURE 222oC TEMPERATURE (oC) 40-80 SECONDS ABOVE 183oC RAMP RATE <2oC/s PREHEAT DWELL PREHEAT ZONE
TIME (MINUTES)
FIGURE REFLOW SOLDER PROFILE
10-12
Soldering Recommendations Surface Mount Multilayer Metal Oxide Varistors
Application Note July 1999 AN9211.2
Introduction
recent years, electronic systems have migrated towards
/Title manufacture increased density circuits, with same (AN92 capability obtainable smaller package increased capability same package. accommodation these higher density systems been achieved /Subof surface mount technology (SMT). Surface mount ject technology advantages lower costs, increased (Solreliability reduction size weight dering components used. With these advantages, surface mount technology fast becoming norm circuit design. Recommen increased circuit densities modern electronic dations systems much more vulnerable damage from transient overvoltages than were earlier circuits, which used relays vacuum tubes. Thus, progress Surdevelopment faster denser integrated circuits face been accompanied increase system vulnerability. Mount Transient protection these sensitive circuits highly desirable assure system survival. Surface mount Multi- technology demands reliable transient voltage protection technology, packaged compatibly with other forms layer components used surface mount technology. Metal Harris Suppression Products field Oxide introduction surface mount transient voltage suppressors. VarisThese devices encompass voltages from 3.5VDC 275VAC tors) have wide variety applications. Their size, weight /Autho inherent protection capability make them ideal surface mount printed circuit boards. /KeyThere technologies Littelfuse surface mount surge words suppressors. Series metal oxide varistors which (Littel- encompass voltages from 275V fuse, MLE, AUML Series Suppressors which cover voltage range from 3.5VDC 120VDC. Inc., semiMetal Oxide Varistors conductor, metal oxide varistor (MOV) nonlinear device which property maintaining relatively small voltage change Solder- across terminals while disproportionately large surge current flows through (Figure When connected Recin parallel across line nonlinear action serves divert ommen current surge hold voltage value that protects dations equipment connected line. Since voltage across held some level higher than normal line voltage while surge current flows, there energy deposited Surthe varistor during surge diversion function.
basic conduction mechanism results from semiconductor junctions (P-N junctions) boundaries zinc oxide grains. multi-junction device with millions grains acting series parallel combination 10-13
between electrical terminals. voltage drop across single grain nearly constant independent grain size.
FIGURE CHARACTERISTICS
series surface mount metal oxide varistors monolayer construction package size. They fully symmetrical passivated both bottom (Figure main advantage this technology high operating voltage capability (68VDC 275VAC). Series metal oxide varistors supplied both tape reels.
ELECTRODE PASSIVATION
ZINC OXIDE MATERIAL
TERMINATION
FIGURE CROSS-SECTION "CH" SERIES METAL OXIDE VARISTORS
Multilayer Transient Voltage Suppressors
Littelfuse multilayers constructed forming combination alternating electrode plates semiconducting ceramic layers into block. This technology, represents recent breakthrough application transient voltage suppression. Each alternate layer electrode connected opposite terminations (Figure interdigitated block formation greatly enhances available cross-sectional area active conduction transients. This paralleled arrangement inner electrode layers represents significantly more active surface area than small outline package suggest. increased active surface area results proportionally higher peak energy capability.
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Littelfuse, Inc. 1999
Application Note 9211
INNER ELECTRODES SEMICONDUCTING CERAMIC
organic materials (ceramic based substrates), like aluminum beryllia, which have coefficients thermal expansion 5-7ppmoC, good match series devices. Table outlines some other materials used, also their more important properties pertinent surface mounting. While choice substrate material should take note coefficient expansion devices. This determining factor whether device used not. Obviously environment finished circuit board will determine what level temperature cycling will occur. this which will dictate criticality match between device PCB. Currently most applications, both series boards without issue.
TERMINATION
FIGURE INTERNAL CONSTRUCTION HARRIS MULTILAYER TRANSIENT VOLTAGE SUPPRESSOR
further advantage this type construction that breakdown voltage device dependent thickness between electrode layers (dielectric thickness) overall thickness device. These suppressors often much smaller size than components they designed protect. present size offerings 0603, 0805, 1206, 1210, 1812 2220, with voltage ranges form 3.5VDC 120VDC. robust construction makes ideally suitable endure thermal stresses involved soldering, assembling manufacturing steps involved surface mount technology. device inherently passivated fired ceramic material, will support combustion thus immune risk flammability which present plastic epoxy molded parts used industry standard packages.
Fluxes
Fluxes used chemical cleaning substrate surface. They will completely remove surface oxides, will prevent re-oxidation. They contain active ingredients such solvents removing soils greases. Nonactivated fluxes ("R" type) relatively effective reducing oxides copper palladium/silver metallizations recommended with Littelfuse surface mount range. Mildly activated fluxes ("RMA" type) have natural synthetic resins, which reduce oxides metal soluble salts. These "RMA" fluxes generally conductive corrosive room temperature most commonly used mounting electronic components. "RA" type (fully activated) fluxes corrosive, difficult remove, lead circuit failures other problems. Other non-resin fluxes depend organic acids reduce oxides. They also corrosive after soldering also damage sensitive components. Water soluble types particular must thoroughly cleaned from assembly. Environmental concerns, associated legislation, growing interest fluxes with residues that removed with water water detergents (semi-aqueous cleaning). Many fluxes converted water soluble forms adding saponifiers. There detergents semi-aqueous cleaning apparatus available that effectively remove most type fluxes. Semi-aqueous cleaning also tends less expensive than solvent cleaning operations where large amounts cleaning needed.
Substrates
There wide choice substrate materials available printed circuit boards surface mount application. main factors which determine choice material are: Electrical Performance Size Weight Limitations Thermal Characteristics Mechanical Characteristics Cost When choosing substrate material, coefficient thermal expansion Littelfuse surface mountable suppressor 6ppm/oC important consideration. Non-
TABLE SUBSTRATE MATERIAL PROPERTIES MATERIAL PROPERTIES SUBSTRATE STRUCTURE Epoxy Fiberglass-FR4 Polyamide Fiberglass Epoxy Aramid Fiber Fiber/Teflon Laminates Aluminium-Beryillia (Ceramic) GLASS TRANSITION TEMPERATURE (oC) Available COEFFICIENT THERMAL EXPANSION (ppm/oC) 14-18 12-16 THERMAL CONDUCTIVITY (W/MoC) 0.16 0.35 0.12 0.26 21.0
10-14
Application Note 9211
Harris Suppression Products range surface mount varistors, nonactivated type fluxes such Alpha equivalent recommended. either platinum, palladium mixture both, which have benefit significantly reducing leaching effects during soldering. further ensure that there leeching silver electrode varistor, solders with least silver content recommended Ag). Examples silver bearing solders their associated melting temperatures follows:
TEMPERATURE (oC) TIME (SECONDS) 0.010 0.020W
Land Patterns
Land size patterns most important aspects surface mounting. They influence thermal, humidity, power vibration cycling test results. Minimal changes (even small 0.005 inches) land pattern have proven make substantial differences reliability. This design/reliability relationship been shown exist types designs such lead, quadpacks, chip resistors, capacitors small outline integrated circuit (SOIC) packages. Recommended land dimensions provided some surface mounted devices along with formulae which applied different size varistors. Figure gives recommended land patterns direct mount series devices.
FIGURE RECOMMENDED MAXIMUM TIME SOLDER TEMPERATURE RELATIONSHIP LITTELFUSE MOVs TABLE SILVER BEARING SOLDERS (ALPHA METALS) MELTING TEMPERATURE ALLOY 96.5
FIGURE FORMULA SURFACE MOUNTABLE VARISTOR FOOTPRINTS TABLE RECOMMENDED MOUNTING OUTLINE DIMENSION SUPPRESSOR FAMILY Series 0603 ML/MLE Series 0805 ML/MLE Series 1206 ML/MLE Series 1210 ML/AUML Series 1812 AUML Series 2220 AUML Series 2.21 (0.087) 1.12 (0.044) 1.48 (0.058) 1.65 (0.065) 1.85 (0.073) 1.85 (0.073) 1.84 (0.073) L-(M 5.79 (0.228) 0.56 (0.02) 0.69 (0.027) 1.85 (0.073) 1.85 (0.073) 3.20 (0.126) 4.29 (0.169) 0.020W 0.010) 5.50 (0.216) 1.62 (0.064) 2.13 (0.084) 2.62 (0.103) 3.73 (0.147) 4.36 (0.172) 6.19 (0.240)
430-473 514-576
221-245 268-302
92.5
Soldering Methods
There number different soldering techniques used surface mount process. most common soldering processes infrared reflow, vapor phase reflow wave soldering. With Littelfuse surface mount range, solder paste recommended 62/36/2 silver solder. While this configuration best, other silver solder pastes also used. soldering applications, time peak temperature should kept minimum. temperature steps employed solder process must, broad terms, exceed 70oC 80oC. preheat stage reflow process, care should taken ensure that chip subjected thermal gradient greater than degrees second; ideal gradient being degrees second. optimum soldering, preheating within degrees peak soldering temperature recommended; with short dwell preheat temperature help minimize possibility thermal shock. dwell time this preheat temperature should time greater than 10T2 seconds, where chip thickness millimeters. Once soldering process been completed, still necessary protect against further effects thermal shocks. possible cause
Solder Materials Soldering Temperatures
varistor should held longer than necessary elevated temperature. termination materials used both series devices enhanced silver based materials. These materials sensitive exposure time peak temperature conditions during soldering process (Figure enhanced silver formulation contains
10-15
Application Note 9211
thermal shock post solder stage when printed circuit boards removed from solder immediately subjected cleaning solvents room temperature. avoid this thermal shock affect, boards must first allowed cool less than 50oC prior cleaning. different resistance solder heat tests routinely performed Harris Suppression Products simulate possible effects that high temperatures solder processes have surface mount chip. These tests consist complete immersion chip solder bath 260oC seconds also solder bath 220oC seconds. These soldering conditions were chosen replicate peak temperatures expected typical wave soldering operation typical reflow operation. homogenous level, enough cause leaching solder, metallization flux charring. fast heating rate always advantageous. parts components heat sinks, decreasing rate rise. coefficients expansion substrate components diverse application heat uneven, fast breaking cooling rates result poor solder joints board strengths loss electrical conductivity. stated previously, thermal shock also damage components. Very rapid heating evaporate boiling point organic solvents flux quickly that causes solder spattering displacement devices. this occurs, removal these solvents before reflow required. slower heating rate have similar beneficial effects.
Reflow Soldering
There major reflow soldering techniques used today: InfraRed (IR) Reflow Vapor Phase Reflow only difference between these methods process applying heat melt solder. each these methods precise amounts solder paste applied circuit board points where component terminals will located. Screen stencil printing, allowing simultaneous application paste required points, most commonly used method applying solder reflow process. Components then placed solder paste. solder pastes viscous mixture spherical solder powder, thixotropic vehicle, flux some cases, flux activators. During reflow process, completed assembly heated cause flux activate, then heated further, causing solder melt bond components board. reflow occurs, components whose terminations displace more weight, solder, than components weight will float molten solder. Surface tension forces work toward establishing smallest possible surface area molten solder. Solder surface area minimized when component termination center land solder forms even fillet termination. Provided boards pads properly designed good wetting occurs, solder surface tension works center component terminations boards connection pads. This centering action directly proportional solder surface tension. Therefore, often advantageous engineer reflow processes achieve highest possible solder surface tension, direct contrast desire minimizing surface tension wave soldering. designing reflow temperature profile, important that temperature raised least 20oC above melting liquidus temperature ensure complete solder melting, flux activation, joint formation avoidance cold melts. time parts held above melting point must belong enough alloy alloy wet, become
InfraRed (IR) Reflow
InfraRed (IR) reflow method used reflowing solder paste medium focused unfocused infrared light. primary advantage ability heat very localized areas. process consists conveyor belt passing through tunnel, with substrate soldered sitting belt. tunnel consists three main zones; non-focused preheat, focused reflow area cooling area. unfocused infrared areas generally more emitter zones, thereby providing wide range heating profiles solder reflow. assembly passes through oven belt, time/temperature profile controlled speed belt, energy levels infrared sources, distance substrate from emitters absorptive qualities components assembly. peak temperature infrared soldering operation should exceed 220oC. rate temperature rise from ambient condition peak temperature must carefully controlled. recommended that individual temperature step greater than 80oC. preheat dwell approximately 150oC seconds will help alleviate potential stresses resulting from sudden temperature changes. temperature ramp rate from ambient condition peak temperature should exceed second; ideal gradient being second. dwell time that chip encounters peak temperature should exceed seconds. longer exposure peak temperature result deterioration device protection properties. Cooling substrate assembly after solder reflow complete should natural cooling forced air. advantages Reflow ease setup that double sided substrates easily assembled. biggest disadvantage that temperature control indirect dependent absorption characteristics component substrate materials. emergence from solder chamber, cooling ambient should allowed occur naturally. Natural cooling allows gradual relaxation thermal mismatch stresses
10-16
Application Note 9211
solder joints. Forced cooling should avoided induce thermal breakage. recommended temperature profile reflow soldering process Table Figure
TABLE RECOMMENDED TEMPERATURE PROFILE REFLOW SOLDER PROCESS INFRARED (IR) REFLOW TEMPERATURE (oC) TIME (SECONDS) 25-60 60-120 120-155 155-155 155-220 220-220 220-50
TEMPERATURE (oC) TIME (MINUTES) TEMPERATURE (oC)
dwell time function circuit board mass should kept minimum. emergence from solder system, cooling ambient should allowed occur naturally. Natural cooling allows gradual relaxation thermal mismatch stresses solder joints. Forced cooling should avoided induce thermal breakage. recommended temperature profile vapor phase soldering process Table Figure
TABLE RECOMMENDED TEMPERATURE PROFILE VAPOR PHASE REFLOW PROCESS VAPOR PHASE REFLOW TEMPERATURE (oC) TIME (SECONDS) 25-90 90-150 150-222 222-222 222-80 80-25
FIGURE TYPICAL TEMPERATURE PROFILE
TIME (SECONDS)
Vapor Phase Reflow
Vapor phase reflow soldering involves exposing assembly joints soldered vapor atmosphere inert heated solvent. solvent vaporized heating coils molten alloy, sump bath. Heat released transferred assembly where vapor comes contact with colder parts substrate then condenses. this process cold areas heated evenly areas heated higher than boiling point solvent, thus preventing charring flux. This method gives very rapid even heating affect. Further advantages vapor phase soldering excellent control temperature that soldering operation performed inert atmosphere. liquids used this process relatively expensive overcome this secondary less expensive solvent often used. This solvent boiling temperature below 50oC. Assemblies passed through secondary vapor into primary vapor. rate flow through vapors determined mass substrate. case soldering operations, time components peak temperature should kept minimum. 10-17
FIGURE TYPICAL TEMPERATURE PROFILE
Wave Solder
This technique, while primarily used soldering thru-hole leaded devices inserted into printed circuit boards, also been successfully adapted accommodate hybrid technology where leaded, inserted components adhesive bonded surface mount components populate same circuit board. components soldered first bonded substrate means temporary adhesive. board then fluxed, preheated dipped dragged through waves solder. preheating stage serves many functions. evaporates most flux solvent, increases activity flux accelerates solder wetting. also reduces magnitude temperature change experienced substrate components. first wave solder process high velocity turbulent wave that deposits large quantities solder
Application Note 9211
wettable surfaces contacts. This turbulent wave aimed solving problems inherent wave soldering surface mount components, defect called voiding (i.e. skipped areas). disadvantage high velocity turbulent wave that gives rise second defect known bridging, where excess solder thrown board turbulent wave spans between adjacent pads circuit elements thus creating unwanted interconnects shorts. second, smooth wave accomplishes clean operation, melting removing bridges created turbulent wave. smooth wave also subjects previous soldered wetted surfaces sufficiently high temperature ensure good solder bonding circuit component metallizations. wave soldering, important that solder have surface tension improve surface wetting characteristics. Therefore, molten solder bath maintained temperatures above liquid point. emergence from solder wave, cooling ambient should allowed occur naturally. Natural cooling allows gradual relaxation thermal mismatch stresses solder joints. Forced cooling should avoided induce thermal breakage. recommended temperature profile wave soldering process Table
TABLE RECOMMENDED TEMPERATURE PROFILE WAVE SOLDER PROCESS WAVE SOLDER TEMPERATURE (oC) 25-125 125-180 180-260 260-260 260-180 180-80 80-25 TIME (SECONDS)
remove than conventional through hole soldering. cleaning process selected must capable removing contaminants from beneath surface mount assemblies. Optimum cleaning achieved avoiding undue delays between cleaning soldering operations; minimum substrate component clearance 0.15mm avoiding high temperatures which oxidation occurs. Littelfuse recommends trichloroethane solvent ultrasonic bath, with cleaning time between five minutes. Other solvents which better suited particular application also used include more following:
TABLE CLEANING FLUIDS Water Isopropyl Alcohol Fluorocarbon Alcohol Blend Trichloroethane Alcohol Blend Toluene Acetone Fluorocarbon N-Butyl Trichloroethane Methane
Solder Defects
Non-Wetting:
This defect caused formation oxides termination components. termination been exposed molten solder material solder adhered surface; base metal remains exposed. accepted criterion that more than terminated area should remain exposed after immersion seconds static solder bath 220oC, using nonactive flux.
Leaching:
This dissolving chip termination into molten solder. commences chip corners, where metal coverage minimum. result leaching weaker solder joint. termination Littelfuse surface mount suppressors consist precious metal alloy which increases leach resistance capability component. Leach resistance defined immersion time which specified proportion termination material visibly lost, under given soldering conditions.
Termination Options
Littelfuse offers types electrode termination finish Multilayer product series: Silver/Platinum (standard) Silver/Palladium (optional)
De-Wetting:
This condition results when molten solder coated termination then receded, leaving irregularly shaped mounds solder separated areas covered with thin solder film. base metal exposed.
Cleaning Methods Cleaning Fluids
objective cleaning process remove contamination from board, which affect chemical, physical electrical performance circuit working environment. There wide variety cleaning processes which used, including aqueous based, solvent based mixture both, tailored meet specific applications. After soldering surface mount components there less residue
References
Littelfuse documents available web, http://www.littelfuse.com/ "Transient Voltage Suppression Devices", Harris Suppression Products DB450. CANE 2588, Syfer Technology Limited,
10-18
Transient Protection Using SP720
Application Note January 1998 AN9304.4
Author: Wayne Austin need transient protection integrated circuits driven quest improved reliability lower cost. primary efforts improvement generally directed toward lowest possible incidence over-voltage related stresses. While electrical overstress (EOS) always potential cause failure; discipline proper handling, grounding attention environmental causes reduce causes failure very level. However, nature hostile environments cannot always predicted. Electrostatic Discharge (ESD) some measure, always present best possible interface protection still insufficient. technology solid state progresses, occurrence related failures uncommon. There continuing tendency both failures, part, smaller geometries today's VLSI circuits. solid state industry generally acknowledged standard level capability designs ±2000V Human Body Model where defined capacitance 100pF series resistance 1500. However, this level protection adequate many applications difficult achieve some VLSI technologies. Normal precautions against environment broad based manufacturing often inadequate. need more rugged interface protection will continue established goal. Historically, should recognized that early development began address problem when standards handling precautions exist. High energy discharges were common phenomena associated with monitor picture tube (CRT) applications could damage destroy solid state device without direct contact. recognized that efforts safeguard sensitive devices were totally sufficient. Small geometry signal processing circuits continued sustain varying levels damage through induced circulating currents direct indirect exposure handling. These energy levels could substantially higher than current standard referenced MIL-STD-3015.7; also referred Human Body Model. recognized need improved protection first precipitated under harsh handling conditions; particularly applications that interfaced human contact from interaction mechanical parts motion. popular features component modular electronic equipment have continued generate susceptibility damage while continuing use. These market items include computers peripherals, telecommunication equipment consumer electronic systems. While some only need protection while manufacturing 10-19 assembly during service field, most common cause failures still related human contact. Moreover, educational efforts have improved today's manufacturing environment substantially reduce failures that relate mechanical handling. failure causes that relate mechanical handling have test standard referred Machine Model which relates source generated energy. While electrical model energy source generally accepted capacitor with stored charge series resistance represent charge flow impedance, best means handle high energy discharge clearly evident. circuit Figure illustrates basic concept that applied method testing Human Body Model. energy source shown charged capacitor series connected, source impedance, resistor point contact energy discharge shown, test purposes, switch external protection structure often included prevent damage from energy source. properly protect circuit on-chip switch, closed when discharge sensed shunts discharge energy through impedance resistor (RS) ground. imperative that resistance discharge path practical limit dissipation protection structure. essential that ground chip substrate package frame. energy shunted shortest path external chip ground.
POINT ENERGY DISCHARGE ENERGY SOURCE ACTIVE CIRCUIT
/Title (AN93 /Subject (ESD Transient Protection Using SP720) /Autho /Keywords (Harris Suppression Products, TVS, Transient Suppression, Protection, ESD,
~20M
(VERY RESISTANCE) (CHIP)
FIGURE TEST ON-CHIP PROTECTION CIRCUIT USING MIL-STD-883, METHOD 3015.7 (HUMAN BODY MODEL)
This conceptual method been used many designs employing wide variation structures, depending technology degree protection needed. switch, generally threshold sensitive turn-ON some voltage level above below normal signal range; however, must within safe operating range device being protected. resistance, shown inherent series resistance protection structure when
1-800-999-9445 1-847-824-1188 Copyright
Littelfuse, Inc. 1998
Application Note 9304
discharging (dumping) energy. simplest forms, protection structures diodes zeners, where sensing threshold forward turn-ON zener threshold device. inherent resistance becomes bulk resistance diode structure when conducting. Successful examples such protection structures that have been used protect sensitive inputs devices shown Figure back-to-back zener structure shown dual-gate MOSFET employed dual gate devices before technology firmly established. series poly stacked diode structure used shunt energy followed several variations CMOS technology employ CD74HC/HCT High Speed CMOS family logic devices. This CMOS protection structure capable meeting 2000V requirements MIL-STD-883, Method 3015.7; where Figure 1500 100pF.
INPUT POLY LOGIC
series dropping resistor sense over-voltage turn-ON condition trip (Switch into latch. ONresistance (RS) latched much lower than and, depending polarity voltage, dumps energy from input signal line through positive negative switch ground. return ground either polarity limited voltage supply definition, positive negative supply lines, this suits needs application. When energy dissipated forward current longer flows, automatically turns-OFF.
PROTECTION CIRCUIT
POSITIVE PROTECTION SIGNAL INPUT ENERGY SOURCE NEGATIVE PROTECTION ACTIVE CIRCUIT
FIGURE TRANSIENT PROTECTION CIRCUIT
FIGURE TRANSIENT PROTECTION EFFECTIVELY USED CMOS DEVICES
greater emphasis Reliability under harsh application conditions, more ruggedized protection structure have been developed. variety circuit configurations have been evaluated applied production circuits. limited introduction this work published various papers Avery (See Bibliography). provide best protection possible within economic constraints, determined that latching structures could provide very fast turn-ON, forward resistance reliable threshold switching. Both positive negative protection structures were readily adapted bipolar technology. Other defining aspects protection network included capability self-protecting much higher level than signal input line being protected. Ideally, when protection circuit otherwise needed, should have significant loading effect operating circuit. such, should have very little shunt capacitance require minimal series resistance added signal line active circuit. Also, where minimal capacitance loading essential fast turn-ON speed, need simpler structure indicated. switching arrangement basic simple protection structure shown Figure Each high side side protection structure embedded device, taking advantage substrate epitaxial material used bipolar technology. Each cell contains with 10-20
Figure shows diagram positive negative cell protection circuit applies SP720. transistor pairs used equivalent structures. Protection this structure allows forward turn-ON marginally above supply turn-ON high-side marginally below supply turn-ON low-side SCR. signal line active device protected both directions does series impedance signal input line. shunt resistance used forward bias device turn-ON directly connected signal line. on-chip protection cell, this structure next input active circuit; which best location protection device. However, many applications, technology active chip compatible structures type indicated Figure This particularly true high speed CMOS where substrates commonly type connected positive supply chip. protection cell structure shown Figure required active chip because does sense series input current active device. sense mechanism voltage threshold referenced bias voltages. cell structure pair Figure shown layout sketch profile cutouts Figure should noted that layout profiles shown here equivalent structures intended tutorial information. structures shown opposite sides "IN" chip bonding pad, case SP720. needed preferred layout, structures adjacent close positive negative supply lines possible. common best choice effective layout provide ground
Application Note 9304
ring (V-) around chip layout with minimum distance paths positive supply (V+). SP720 line common substrate frame ground equivalent circuit diagram SP720 shown Figure Each switch element equivalent structure where positive negative pairs shown Figure provided single chip. Each positive switching structure threshold reference terminal, plus (based-to-emitter voltage equal diode forward voltage drop). Similarly, each negative switching pair referenced terminal minus VBE.
METAL CONTACT EMITTER (N+) (P+) SIGNAL INPUT EQUIVALENT CIRCUIT ACTIVE CIRCUIT
FIGURE PROTECTION CELLS SP720 ARRAY
(IN)
METAL CONNECTION ON-CHIP
FIGURE HIGH CELL PAIR LAYOUT; SHOWN WITHOUT PROTECT, METAL FIELD OXIDE LEVELS (NOT SCALE)
(IN) FIELD OXIDE (B&R) (B&R)
POCKET SUBSTRATE FRAME HIGH SIDE LATCH PROTECTION STRUCTURE VISO (MOAT) POCKET (B&R) (MOAT) FIELD OXIDE
SUBSTRATE FRAME SIDE LATCH PROTECTION STRUCTURE
FIGURE PROFILES HIGH SIDE SP720 PROTECTION PAIR (NOT SCALE)
10-21
Application Note 9304
internal protection cells SP720 directly connect on-chip power supply line (+V) negative supply line (-V), which substantial surface metal content provide dropping resistance high peak currents encountered. Since both positive negative transients expected, switches direct positive voltage energy negative voltage sourced energy (substrate) potential provide fast turn-ON with resistance protect active circuit.
voltage surges within maximum ratings defined data sheet. voltage, static short duration transient capability essentially same. process capability typically better than 45V, allowing maximum continuous supply ratings conservatively rated 35V. current capability section rated peak duration limited transient heating effect chip. shown Figure resistance SCR, when latched, approximately 0.96 latch threshold 1.08V offset. EOS, peak dissipation calculated follows: For: Peak Current, 1500
Then: VIN(PK) 1.08V (Offset) (0.96 peak dissipation
25oC (SINGLE PULSED CURVE) EQUIV SERIES RESISTANCE EQUAL 0.48V /0.5A 0.96 FORWARD CURRENT
0.5A
0.48V
FIGURE EQUIVALENT CIRCUIT DIAGRAM SP720
supply lines SP720 required same those circuit protected. However, overvoltage protection referenced supply voltages signal input terminals, IN1-IN7 IN9-IN15. supply voltages SP720 changed suite needs circuit under protection. range voltage power supply levels ranging from 4.5V maximum rating SP720. Lower levels voltage possible with some degradation switching speed which nominally 2ns. Also, input capacitance which nominally expected increase. There significant quiescent current SP720 other than reverse diode junction current which nominally less than 50nA over rated -40oC 105oC operating temperature. room temperatures, this nanoamperes. Because dissipation SP720, chip temperature expected close environment physical location where applied use.
1.08V
FORWARD VOLTAGE
FIGURE FORWARD CURRENT VOLTAGE CHARACTERISTICS
Protection Levels SP720
given level voltage power, there defined degree protection compatible that need. SP720, protection circuits designed clamp over-voltage within range peak current that will substantially improve survival input expectancy average monolithic silicon circuits used small signal digital processing applications. Within itself, SP720 should expected survival peak current
While through 1500 3000V, which exceptionally high level voltage, does represent capability, provided time duration dissipation limited milliseconds. dissipation SOIC packages typically less than steady state conditions. thermal capacity chip will allow discharge levels several times higher than this because normally much shorter duration. actual results tests SP720 isolated device follows: Human Body Model using modified version MIL-STD-883, Method 3015.7; with grounded discharge applied each individual Passed test levels from ±9kV ±16kV (1kV steps). Human Body Model using MIL-STD-883, Method 3015.7 (with only grounded) discharge applied each individual Passed test levels ±6kV, failed ±7kV (1kV steps).
10-22
Application Note 9304
Machine Model using EIAJ IC121 discharge applied pins with others grounded Passed test levels ±1kV, failed ±1.2kV; (200V steps). While there many potential uses SP720, circuit Figure shows normal configuration protecting input lines sensitive digital Each line connected Input SP720 shunt connection. test model digital ASIC CMOS used evaluate level capability provided SP720. Without external protection, level capability CMOS process typically better than ±2.5kV. When SP720 applied shown Figure resistance damage better than ±10.2kV. (Higher levels were evaluated time high voltage limitations.) should noted that MIL-STD-883, Method 3015.7 test allows reference when testing. While this cannot disputed handling limitation, test aspects applied use. properly apply SP720 application specifically requires that connected negative supply ground connected positive supply. SP720 designed used with supply terminals bias and, such, better than ±16kV capability. this reason, modified test method
+VCC
described, with connected ground return, correct when circuit assembled use.
SP720 CMOS Protection Model
Where need provide protection CMOS circuits primary interest application SP720, interface characteristics device protected lead some specific problems. Application related issues precautions discussed here assist circuit designer achieving maximum success EOS/ESD protection.
CMOS Input Protection
CMOS logic limited on-chip protection contain circuit elements that difficulty task providing external protection. Consider case where input structure CMOS device on-chip protection only extent that will withstand Human Body Model minimum requirement when tested under MIL-STD-883, Method 3015.7. This normally ±2kV where charged capacitor 100pF series resistor device under test 1500 circuit Figure shows typical network logic circuit where input polysilicon resistor, typically
+VCC
INPUT DRIVERS SIGNAL SOURCES
LINEAR DIGITAL INTERFACE
9-15
+VCC
SP720
SP720 INPUT PROTECTION CIRCUIT CHIP)
FIGURE PRACTICAL APPLICATION TEST EVALUATION CIRCUIT
10-23
Application Note 9304
When there surge voltage applied input structure, diodes shunt current protect logic circuits chip. on-chip series resistors limit peak currents. there positive transient voltage, VCS(t), applied input CMOS device, diode, will conduct when forward voltage threshold exceeds power supply voltage, plus forward diode voltage drop VFWD1. voltage input further increased, CMOS current, shunted through such that transient input voltage
VCS(t) VFWD1 +VCC [for Pos. VCS(t)] (EQ.
transient voltage applied input conducts shunt transient current from (VCC).
SP720 FORWARD CELL PROTECTION CIRCUIT
VS(t) ISP(t)
ICS(t)
CMOS DEVICE
ICS(t) [VCS(t) (VFWD1 +VCC)]/RP (EQ.
REVERSE CELL PROTECTION CIRCUIT VGND
Similarly, when there negative transient, current initially conducts negative threshold diode VFWD2 shunt negative current input, i.e.,
VCS(t) +VFWD2 [for Neg. VCS(t)] (EQ.
FIGURE SP720 INTERFACE CMOS INPUT WITH ADDED ILLUSTRATE MORE EFFECTIVE PROTECTION CMOS DEVICES
ICS(t) [VCS(t) VFWD2]/RP (EQ.
While circuit Figure specifically that logic family (one cell Inverter, 74HCU04), many CMOS devices have similar equivalent internal protection circuit. When compared structure SP720, on-chip diodes protection network Figure have lower conduction thresholds.
VCS(t) ICS(t)
Voltage-Current characteristic similar diode currents changes saturated resistance high currents. shown SP720 data sheet, forward (latched voltage 60mA which ~0.2V higher than typically junction diode. fully saturated turn approaches 0.5A 1.5V. When paralleled with CMOS device input having on-chip protection circuit equivalent Figure some current necessary latch shunted into CMOS input. some devices this sufficient discharge damage CMOS input structure before SP720 latched trade-off achieving safe level protection switching speed. most effective method addition series resistor, shown Figure series input resistor, shown, practical method limit current into CMOS chip during latch turn SP720 network. value dependent safe level current that would allowed flow into CMOS input loss switching speed that tolerated. level transient current, that shunted into CMOS device determined series resistor, voltage developed across CMOS protection devices, plus some contribution from path diode, negative transients. shown Figure voltage across SP720 element determined turn threshold, saturated resistance, when latched. empirically derived equation voltage drop across SP720 voltage
VSP(t) (EQ.
INPUT PROTECTION NETWORK
CHIP LOGIC
FIGURE TYPICAL CMOS INPUT PROTECTION CIRCUIT
SP720 CMOS Interface
Figure shows cell structures protection pair SP720. this example, SP720 connected logic supply connected logic GND. terminal SP720 connected CMOS logic device input through resistor When negative transient voltage applied input circuit Figure Reverse Protection Circuit turns when voltage reaches forward threshold device current conducts through resistor forward bias transistor. device then supplies base current forward bias turn device. Together, transistors form which latched shunt transient current from Forward Protection Circuit same sequence turn when positive
ISP(t) [VSP(t) VTH]/(RS) (EQ.
where ±1.1V
10-24
Application Note 9304
25oC SINGLE PULSE
FORWARD CURRENT
LATCHED RESISTANCE, (VFWD/IFWD)
voltage will discharge power supply positive offset voltage will reduce forward current. Using negative model, peak current value determined transient conditions applied voltage, VS(t) input.
HCU04 PROTECTION CIRCUIT FORWARD REVERSE CURRENT (mA) IFWD
EFFECTIVE TURN THRESHOLD 1.1V
VFWD
FORWARD VOLTAGE DROP
FIGURE FORWARD TURN CHARACTERISTIC SP720 CELL
where current conduction SP720 positive negative, depending polarity transient. circuit Figure VS(t) also input voltage resistor, series input CMOS device. When latched impedance SP720 much less than input impedance either CMOS input protection circuit. Therefore, CMOS loop current determined voltage, VS(t) known conditions from Equation negative transient input CMOS HCU04, loop equation
VS(t) VFWD2 (EQ.
HCU04 FORWARD REVERSE VOLTAGE DROP (mV)
FIGURE FORWARD REVERSE PROTECTION CIRCUIT INPUT VOLTAGE-CURRENT CHARACTERISTIC HCU04 SHOWN (i.e., 0.7V)
PULSE VS(t)
SP720 (NEG. CELL)
HCU04 (REV)
ICS(t) [VS(t) VFWD2]/(RI (EQ.
ISP(t)
-VTH
ICS(t)
equation solution input transient more directly solved empirical methods because nonlinear characteristics. Given transient voltage, VS(t) input, value determined safe level peak current into CMOS device. input Voltage-Current characteristic CMOS device should known. first order approximation, CMOS curve tracer input characteristics 74HCU04 shown Figure indicated Figure voltage drop across series (RP~120) will significantly larger than delta changes forward voltage drop diodes over wide range current. such, effectively assume VFWD 0.75V moderate levels current.
FIGURE 13A. NEGATIVE DISCHARGE MODEL
PULSE
ISP(t) +VTH
ICS(t) HCU04 (FWD)
VS(t)
Example Transient Solution
Based circuit Figure negative positive discharge circuit models SP720 HCU04 shown Figure 13B. negative voltage taken worse case condition because positive
(POS. CELL) SP720
FIGURE 13B. POSITIVE DISCHARGE MODEL
10-25
Application Note 9304
Given MIL-STD test conditions 100pF 1500), Equation with resistors series, calculate peak current specified voltage, capacitor,
ISP(t) [VD(t) VTH]/(RD VD(t)/RD (EQ.
conditions similar MIL-STD-883, Method 3015.7 specifications discharge conditions. long periods sustained dissipation, SP720 limited rated capability package. Figure shows distribution currents circuit Figure given specific value Curves shown both (HCU04 SP720) (SP720) versus negative input voltage, resistor, value used here primarily sense current flow into HCU04. (This data taken with unused inputs HCU04 connected ground unused inputs SP720 biased VCC/2 resistive divider.) Figure curves verify model condition Figure with exception that resistive heating higher currents increases resistance latched SCR. This curve explains protection Littelfuse High Speed Logic "HC" family and, particular, demonstrates value internal resistor protection HCU04 gate input. Added series resistance external signal input always recommended maximum protection.
Here, replaces driving voltage; assumes that much less than much less than RP); much less than This general case true values indicated here. such, [ISP]t VD/1500. Given discharge -15KV, neglecting inductive effects distributed capacitance, peak current time will ~10A. And, with SP720 latched shown Equation peak current will result pulse input SP720 ~11V. HCU04 withstand this surge voltage, required that dropping resistor, attenuate peak voltage, HCU04 input within acceptable ratings. negative reverse current path through where part HCU04. negative discharge voltage, from capacitor equation peak voltage, input HCU04 derived follows: Substituting Equation into Equation have:
(EQ.
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 -0.4 -0.8 -1.2 -1.6 -2.0 REVERSE VOLTAGE (VS) SP720/HCU04 INPUT HCU04 (ICS) SP720+HCU04 (IS) 25oC
HCU04 REVERSE CURRENT (mA)
from Equation Equation general solution voltage
[(VS VFWD2)/(RI VFWD2 (EQ.
simpler approach, work backwards arrive correct solution. reverse CMOS voltage current curve Figure indicates that peak voltage, will produce negative current approximately -20mA which rated absolute maximum limit. -15kV discharge from Equation peak voltage,
(-15/1500)-1.1 -11.1V
peak current, from Equation
[(VS VFWD2)/(RI RP)] [(-11.1 -(-0.7))]/(RI 120)
Given current -20mA solving
397.5
Range Capability
While SP720 substantially greater self protection capability than small signal logics circuits such HCU04, should understood that intended interface protection beyond limits implied data sheet application note. MIL-STD-883, Method 3015.7 condition noted here defines human body model 100pF 1500 where capacitor charged specified level discharged through series resistor into circuit being tested. capability SP720 under this condition been noted ±15kV. And, machine model where resistance specified,
same result derived from Equation more susceptible rounding errors assumed voltage drop VFWD2 (VCS VFWD2) difference that appears equation. approximation solution given here based ±20mA current rating HCU04 device; although, input voltage ratings exceeded this level current. such, solution intended apply only short duration pulse
10-26
SP720 REVERSE CURRENT
FIGURE MEASURED REVERSE CURRENT VOLTAGE CHARACTERISTIC SP720/HCU04 FIGURE CIRCUIT PROTECTION MODE
Application Note 9304
200pF capacitor discharged into input under test. machine model level capability ±1kV; again demonstrating that series resistor used test part application circuit pronounced effect improving level protection. While series resistor input signal device greatly extend level protection, circuit application, speed other restrictions, tolerant added series resistance. However, even ohms resistance substantially improve protection levels. Where sensitive signal device protected internal input series resistance interfaces potentially damaging environment, added resistance between SP720 device essential added protection. Circuits often contain substrate pocket diodes input will shunt very high peak currents during discharge. example, HCU04 Figure replaced with device having protection diode ground series resistor, anticipated increase input current times. Shunt capacitance sometimes added signal input added protection but, practical values capacitance, much less effective suppressing transients. most applications, added series resistance substantially improve transient protection with less signal degradation. further concern devices protected forward reverse conduction thresholds within power supply range (not uncommon analog circuits). Depending cost considerations, power supply levels SP720 could adjusted match specific requirements. This practical unless levels also common existing power supply. solution this problem goes beyond added series resistance improved protection. Each case must treated with respect precise input characteristics device protected. level changes will continue exist collapses ground when SP720 supply switched off. transient power surge provided from source input terminal SP720, after been switched off, forward current will conducted V+/VCC power supply line. Without power supply clamp limit rising voltage, power surge input line damage other signal devices common power supply. Bypassing line adequate protect large energy surges. best choice protection against this type damage zener diode clamp line. zener voltage level should greater than within absolute maximum ratings devices powered from supply line.
Power Supply Protection, Rise/Fall Speed
illustrate active switching SP720 speed both turn turn off, oscilloscope traces were taken circuit conditions Figure pulse input signal applied with supply voltage applied SP720. Figure shows positive negative pulse conditions respectively. trace scales Figure 10ns/division horizontal 1V/division vertical. Input output pulses shown each trace with smaller pulse being output. smaller output trace offset resulting from voltage dropped across forward conduction. OUT+ OUT- pulses quickly respond rising edge input pulse, following within ~2ns delay from start pulse tracking input signal. output falls with approximately same delay.
References
L.R. Avery, "Electrostatic Discharge: Mechanisms, Protection Techniques, Effects Integrated Circuit Reliability", Review, Vol. June 1984, 302. L.R. Avery, "Using SCRs Transient Protection Structures Integrated Circuits," EOS/ESD Symp. Proc., 1983, MIL-STD-883D, Electrostatic Discharge Sensitivity Classification, Method 3015.7, Machine Model Standard EIAJ IC121. EOS/ESD-DS5.2, Proposed Standard, "EOS/ESD Association Standard Discharge (ESD) Sensitivity Testing Machine Model (MM) Component Level," Harris Suppression Products, SP720 Data Sheet, File 2791, Electronic Protection Array Overvoltage Protection. Lead Plastic available SOIC packages). Harris Suppression Products, SP721 Data Sheet, File 3590, Electronic Protection Array Overvoltage Protection Lead Plastic SP720 family available SOIC packages).
Interface Power Supply Switching
Where separate system components with different power supplies used source signal output receiving signal input, additional interface protection circuitry maybe needed. SP720 would normally have same power supply levels receiving (input) device intended protect. When SP720 with receiving interface circuit powered off, remote source signal activated from separate supply (i.e., remote connected systems). user should aware that SP720 remains active when powered down conduct current from input supply. Within structure, input SP720 will forward conduct when input voltage increases level greater than threshold above supply. Similarly, SP720 will reverse conduct when input voltage decreases level less than threshold below supply. Either condition will exist V10-27
Application Note 9304
POSITIVE/FORWARD CONDUCTION HIGH SPEED ON/OFF PULSE (OUT+)
(OUT+)
OUT+ SP720 FORWARD CELL PROTECTION CIRCUIT
±VGEN (50) (13)
REVERSE CELL PROTECTION CIRCUIT
OUT-
NEGATIVE/REVERSE CONDUCTION HIGH SPEED ON/OFF PULSE (OUT-)
(OUT-)
FIGURE SP720 CIRCUIT WITH POWER SUPPLY INPUT PULSE TEST WITH ±5V) INPUT. TRACE SCALES OUT+ OUT- 1V/DIV VERTICAL 10ns/DIV HORIZONTAL
10-28
Connector Varistor Transient Voltage Protection Connectors
Application Note July 1999 AN9307.3
Introduction
Nonlinear devices have long been used transient voltage protection have available conventional package configurations axial, radial, power packages (Figure connector varistor represents approach transient suppression forming active material into shape which requires leads package (Figure idea developed many years ago, only recently have breakthroughs manufacturing process allowed cost-effective production such devices.
/Title (AN93 /Subject (The Connector Varistor Transient Voltage Protection Connectors) /Autho /Keywords (TVS, Transient Suppression, Protection, Surface Mount, Multilayer,
FIGURE VOLTAGE IMPEDANCE CHARACTERISTICS TYPICAL VARISTOR
obtain lowest clamping voltage, impedance varistor (ZS) impedance varistor leads (ZC), should possible, impedance line (ZL) transient source (ZT) should high possible (Figure part which contributed ground return also reduces same time lifts ground above true ground therefore should small. Unfortunately, impedance transient source (ZT) cannot controlled unknown most instances [1].
LINE IMPEDANCE TRANSIENT SOURCE IMPEDANCE CROSS SECTION METALLIZED ELECTRODE COMPONENT SYSTEM PROTECTED CONNECTION IMPEDANCE SUPPRESSOR IMPEDANCE CLAMPING VOLTAGE TRANSIENT VOLTAGE
FIGURE CONVENTIONAL PACKAGE CONFIGURATIONS
METALLIZED GROUND ELECTRODE
FIGURE IMPEDANCE RELATIONSHIP TRANSIENT SUPPRESSOR CIRCUIT
FIGURE TUBULAR VARISTOR (CONNECTOR VARISTOR)
Connector varistors voltage dependent nonlinear semiconducting devices having electrical behavior similar back-to-back zener diodes. symmetrical sharp breakdown characteristic enables varistor provide excellent transient suppression. voltage transient rises, impedance varistor changes from very high value extremely value, limiting voltage rise across varistor (Figure destructive energy absorbed circuit impedance varistor impedance. Energy converted into hear and, varistor properly rated, components harmed.
Varistors contain zinc oxide, bismuth, cobalt, manganese other metal oxides. structure body consists conductive zinc oxide grains surrounded glassy layer (the grain boundary) which provides 2.5V PN-junction semiconductor characteristics. Figure shows simplified cross section varistor material.
DEPLETION REGION
THICKNESS
GRAINS
FIGURE SIMPLIFIED MICROSTRUCTURE VARISTOR MATERIAL
10-29
1-800-999-9445 1-847-824-1188 Copyright
Littelfuse, Inc. 1999
Application Note 9307
varistor multi-junction device with many junctions parallel series. Each junction heat sunk zinc oxide grains resulting junction temperatures large overload capabilities. shown Figure more junctions that connected series, higher voltage rating more junctions connected parallel, higher current rating. Energy rating, other hand, related both voltage current proportional volume varistor. summary: Thickness proportional voltage
VOLTS/DIV.
Figure shows composite photograph voltage traces with without varistor connected lowinductance high speed pulse generator having rise time 500ps. second trace synchronized with first, merely superimposed oscilloscope screen, showing instantaneous voltage clamping effect varistor. There delay indication which would justify concern about response time.
Area proportional current [(d2 )/4] length) Volume proportional energy (area thickness)
TRACE LOAD VOLTAGE WITHOUT VARISTOR
Electrical Characteristics
electrical model varistor represented equivalent circuit shown Figure
CINT
TRACE LOAD VOLTAGE CLAMPED VARISTOR
500ps/DIV. RZnO CINT LZnO ROFF RINT
FIGURE RESPONSE VARISTOR FAST RISING PULSE (dv/dt 1MV/µs)
FIGURE VARISTOR EQUIVALENT CIRCUIT
Using conventional lead-mounted varistors, inductance leads completely masks fast action varistor; therefore, test results shown Figure required insertion small piece varistor material coaxial line demonstrate intrinsic varistor response. Tests made lead-mounted devices, even with careful attention minimize lead length, show that voltage induced through lead inductance contributes substantially voltage appearing across varistor terminals (Figure These undesirable induced voltage proportional lead inductance di/dt positive negative.
Pulse Response
pulse response varistor best understood using equivalent circuit representation consisting pure capacitor (CP), batteries, grain resistance (RZnO) intergrain capacitance (CINT). off-resistance (ROFF) applicable this discussion. varistor capacitance (CP), varistor initially short circuit applied pulse. Varistor breakdown conduction through (VB1) (VB2), illustrated Figure does occur until this capacitor charged varistor breakdown voltage (VB). time calculated (VB1/I) Where average pulse current (capacitor charging current) value peak current controlled (di/dt) source impedance voltage transient, varistor's dimensions (area proportional longer duration pulses will participate current conduction process, voltage rises above breakover voltage (VB).
CLAMPING VOLTAGE
FIGURE ELECTRICAL EQUIVALENT LEAD-MOUNTED VARISTOR
Speed Response
conduction mechanism that polycrystalline semiconductor. Conduction occurs rapidly, with apparent time even picosecond range.
Figure shows positive negative part induced voltage, resulting from pulse with rise time peak current 2.5A. When measurement repeated with leadless varistor, such connector varistor, unique coaxial mounting allows become part transmission line. This completely eliminates inductive lead effect (Figure 10). Calculations induced voltage (VL) direct result lead effect different current rise times provides better understanding di/dt value which lead effect become significant. Table based assumption
10-30
Application Note 9307
current pulse 10A, inch lead wire (which translates into approximately 15nH) rise times ranging from seconds femtoseconds.
MODEL 10,000,000 1,000,000 100,000 INDUCED VOLTAGE V12ZA1 10,000 1,000 10-15 FEMTO 10-13 10-11 15,000V 1,500V 150V 1.5V 10-9 NANO TIME SECONDS 10-7 0.05 10-5 10-3 MILLI 150,000V 15,000,000V 7.5nH
tPEAK 2.5A, 300V CURRENT WAVEFROM
PICO
MICRO
FIGURE EXPONENTIAL PULSE APPLIED RADIAL DEVICE (5V/DIV., 50s/DIV.)
FIGURE LEAD EFFECT INCH CONNECTION 15nH)
LEAKAGE REGION NORMAL OPERATION
TEMPERATURE COEFFICIENT (%/oC)
-0.1 -0.2 -0.3 -0.4 -0.5 10-5
IPEAK 2.5A, 300V
SAMPLE TYPE V130LA10A
10-4
10-3
10-2
10-1
CURRENT
FIGURE EXPONENTIAL PULSE APPLIED PINVARISTOR (5V/DIV., 50nS/DIV.) TABLE INDUCED VOLTAGE (VL) 1IN. LEADS. PEAK CURRENT 10A, DIFFERENT CURRENT RISE TIMES TIME 10-3 10-5 10-9 10-12 10-18 15nH 15nH 15nH 15nH 15nH 15nH 10-9 10-5 10-3 10-3 10-6
FIGURE TYPICAL TEMPERATURE COEFFICIENT VOLTAGE CURRENT (-55oC 125oC)
Connector Pins Circuit Board Suppressors
Circuit designers ask, "Why connector varistors when suppressors could located printed circuit board electronic control module (ECM)?" Reasons include saving space avoiding side effects circuit board suppressor action. simplified schematic illustrated Figure Suppressors usually would installed across power analog digital signal lines entering ECM. These would divert surges ground avoid upset damage those lines. However, side effects could occur suppressors located internally. paths circulating current diverting surges ground could significant length impedance. suppressor current paths share some impedance, then surge current suppressor could cause surge voltage ground line another circuit. Also, surges coupled from line another within radiation capacitive means. These problems
Temperature Coefficient (Electrical)
temperature coefficient usually little importance. most pronounced voltage current levels decreases practically zero upper characteristics (Figure 12). Figure illustrates lead effect even more dramatically fast rising pulses ranging rise time from milliseconds femtoseconds. 10-31
Application Note 9307
even more likely with surges that have fast fronts causing high Ldi/dt voltages, such when tubes activated. voltage than varistors (Figure 15). Because protective devices connected parallel with device system protected, lower clamping voltage will apply less stress device protected.
VOLTAGE VARISTOR
DIGITAL
ZENER
ANALOG CURRENT
FIGURE CHARACTERISTICS ZENER VARISTOR
POWER
Speeds Compared
COMMON
FIGURE CIRCUIT BOARD SUPPRESSOR INSTALLATION
Response times less than claimed zener diodes. varistors, measurements were made down 500ps with voltage rise time (dv/dt) million volts microsecond. Another consideration lead effect, previously discussed. Both devices fast enough respond practical requirements, including NEMP type transients.
above concerns avoided when connector varistors used shown Figure Currents then diverted directly grounding plate within connector which, turn, terminates exterior shielded housing. Surge currents stay outside "black box," sensitive circuits exposed side effects suppressor operation. Even have on-chip suppressors protection, board local suppressors, connector varistors desirable because they divert some surge. This permits local devices, combination with line impedances filter chokes, present, become secondary protectors. local surge currents will less, surge coupling side effects will reduced, lower clamping voltages attained.
Leakage Currents
Leakage current sharpness knee areas misconception about varistor zener diode devices. Figure shows zener diode varistor, both recommended their manufacturers protection integrated circuits having supply voltages. zener diode leakage about times higher than varistor, 200µA versus less than 2µA. leakage current comparison, zener diode devices were measured 25oC. Only device measured 30mA. rest were 150mA more. elevated temperatures, comparison even more favorable varistor. zener diode specified 1000mA 5.5V. leakage current zener reduced specifying higher voltage device which would have lower leakage current, price higher clamping voltage advantage zener disappears.
DIGITAL
ANALOG
POWER
COMMON
FIGURE CONNECTOR VARISTOR INSTALLATION
Connector Pins Zener Diodes
Clamping Voltage
Clamping voltage important feature transient suppressor. Zener diode type devices have lower clamping 10-32
FIGURE CHARACTERISTICS ZENER DIODE LEFT) VARISTOR RIGHT)
Application Note 9307
Peak Pulse Power
Transient suppressors have optimized absorb large amounts power energy short time duration: nanoseconds, microseconds some rare instances, milliseconds. Electrical energy transformed into heat distributed instantaneously throughout device. Transient thermal impedance much more important than steadystate thermal impedance, keeps peak junction temperature minimum. other words, heat should instantly evenly distributed throughout device. varistor meets these requirements: extremely reliable device with large overload capability. Zener diodes other hand, transform electrical energy into heat depletion region, extremely small area, resulting high peak temperature. From there heat will flow through silicon solder joint copper. Thermal coefficient mismatch large temperature differentials result unreliable device transient suppression. Figure shows peak pulse power versus pulse width varistor zener diode, same devices compared leakage current. 1ms, devices almost same. varistor almost times better, zener versus 60kW varistor. point. Zener diodes, other hand, fail suddenly predictable power energy levels.
20µs WAVE V31CP20
VOLTS
NUMBER PULSES
FIGURE 250A PULSE-WITHSTAND CAPABILITIES
Failure Mode
Varistors fail short, also explode when energy excessive, resulting open circuit. Because large peak pulse capabilities varistors, these types failure quite rare properly selected devices. Zeners, other hand, fail either short open. pellet connected wire, fuse, disconnecting device resulting open circuit. Designers must analyze which failure mode, open short, preferred their circuits. Should suppression device fail during transient, shortcircuit mode usually preferred, since will provide current path bypass continue protect sensitive components. other hand, device fails open during transient, remaining energy ends sensitive components that were supposed protected. energy already dissipated, circuit will operate without suppressor next transient, next transients, could damage equipment. Another consideration hybrid approach, making best features, described above, both types transient suppressors (Figure 19).
INPUT VARISTOR ZENER VARISTOR ZENER
Aging
common misconception that varistor's characteristics changes every time energy absorbed. illustrated Figure characteristic changed some devices, returned original value after applying second third pulse.
POWER 10µs PULSE TIME 100µs 1000µs 3.5kW 600W ZENER DIODE 10kW VARISTOR 10mm DEVICE 60kW
FIGURE PEAK PULSE POWER PULSE TIME
FIGURE HYBRID PROTECTION USING VARISTORS, ZENERS,
conservative, peak pulse limits have been established which, many cases, have been exceeded manyfold without harm device. This does mean that established limits should ignored, rather, viewed perspective definition failed device. failed device shows percent change characteristic 10-33
Capacitance
Depending application, transient suppressor capacitance very desirable undesirable feature compared zener diodes. Varistors have higher capacitance. circuits, capacitance desirable: larger better.
Application Note 9307
Decoupling capacitors used supply voltage pins cases replaced varistors, providing both decoupling transient voltage clamping functions. same true filter connectors where varistor perform dual functions providing both filtering transient suppression. There circuits, however, where capacitance less desirable, such high frequency digital some analog circuits. rule, source impedance signal frequency well capacitance transient suppressor should considered (Figure 20). current through function dv/dt distortion function signal's source impedance. Each case must evaluated individually determine maximum allowable capacitance.
OUTPUT SIGNAL AMPERES INPUT SIGNAL
Neutron Effects
second MOV-zener comparison made with respect neutron fluence. selected devices were equal area. Figure shows clamping voltage response zener neutron irradiation high 1015N/cm2. contrast large change zener, unaltered. higher currents where MOV's clamping voltage again unchanged, zener device clamping voltage increases much percent.
VARISTOR INITIAL 1015 VOLTS 1.5K 1013 1.5K 1012 1.5K 1014 1.5K 1015 INITIAL 1.5K
SIGNAL SOURCE
FIGURE SOURCE IMPEDANCE (RS) PARASITIC CAPACITANCE (CP)
Response Radiation
space applications, extremely important property protection device response imposed radiation effects.
FIGURE VOLTAGE CURRENTS CHARACTERISTIC RESPONSE NEUTRON IRRADIATION ZENER DIODE DEVICES
Electron Irradiation
Figure represents zener devices exposed electron irradiation. curves, before after test, shown. virtually unaffected, even extremely high dose rads, while zener shows dramatic increase leakage current.
Counterclockwise rotation characteristics observed silicon devices high neutron irradiation levels. other words, leakage increases current levels clamping voltage increases higher current levels. solid open circles given fluence represent high breakdown currents sample devices tested. marked decrease current energy) handling capability with increased neutron fluence should noted. failure threshold level silicon semiconductor junctions further reduced when high rapidly increasing currents applied. Junctions develop spots, which enlarge until short occurs current limited quickly removed. characteristic voltage current relationship PN-Junction shown Figure reverse voltage, device will conduct very little current (the saturation current). higher reverse voltage (breakdown voltage), current increases rapidly electrons either pulled electric field (zener effect) knocked other electrons (avalanching). further increase voltage causes device exhibit negative resistance characteristic leading secondary breakdown. This manifests itself through formation spots, irreversible damage decreases under neutron irradiation zeners, zinc oxide varistors.
HARRIS ZENER
TEST RADS, 18MeV ELECTRONS CURRENT
FIGURE RADIATION SENSITIVITY ZENER DEVICES
10-34
Application Note 9307
SATURATION CURRENT BREAKDOWN VOLTAGE REDUCTION FAILURE STRESSHOLD RADIAL SECONDARY BREAKDOWN REVERSE BIAS FORWARD BIAS
Conclusions
Connector varistors provide unique install surge protection electronic systems without bulkiness some approaches. tubular form this varistor gives relatively large area conducting surge current, with inherent mass dissipating electrical heat energy. rugged body physically resembles passive components; but, because semiconductor device, response time very fast. leadless form reduces voltage overshoot that caused lead inductance. Also, device high degree inherent radiation hardness. Connector varistors divert surge currents outside surface "black box" housing, printed board runs feeding sensitive circuits, thereby helping avoid reduce surge coupling side effects.
FIGURE VOLTAGE CURRENTS CHARACTERISTIC PN-JUNCTION
Gamma Radiation
Radiation damage studies were performed specified varistors. Emission spectra characteristics were collected before after irradiation with rads Co60 gamma radiation. Both show change, within experimental error, after irradiation.
References
Littelfuse documents available internet, site http://www.littelfuse.com/ Overview Electromagnetic Lightning Induced Voltage Transients", Application Note AN9769. Sebald Korn, Voltage GE-MOV Varistor (For Protection 5VDC Below). Application Note 200.91 General Electric Application Engineering. Tasca Peden, Technical Information Series 73SD252 EMT/Power Transient Suppression, General Electric Reentry Environmental Systems Division. Tasca Peden, Technical Information Series No.73SD23G Subnanosecond Rise Time Pulse Response Clamping Voltage Characteristics GE-MOV Transzorb, General Electric Space Division. Lionel Levinson Philipp, "AC-Properties Metal Oxide Varistors," Journal Applied Physics, Vol. March, 1976. Lionel Levinson Philipp, "High-Frequency High-Current Studies Metal Oxide Varistors," Journal Applied Physics, Vol. March, 1976. Temperature Admittance Spectroscopy Zinc Oxide Varistors (internal report). Engineering Design Principles, Sixth Printing October, 1984, Bell Telephone Laboratories, Inc.
Mechanical Strength
After sintering, varistor becomes strong, rugged ceramic material. with ceramic materials, high compressive strength lower tensile shear strength. experiment performed demonstrate strength varistor material when used tubular form. Results shown Table represent maximum pressures applied before fracture. Directions applied stresses shown Figure
TABLE VARISTOR MATERIAL STRENGTH PART SIZE
100lbs 100lbs 100lbs
30lbs 14lbs 14lbs
Data Book 1980 1981. General Semiconductor Industries, Inc.
FIGURE APPLIED STRESSES
10-35
Line Voltage Transients Their Suppression
Application Note January 1998 AN9308.2
/Title (AN93 /Subject Line Voltage Transients Their Suppression) /Autho /Keywords (TVS, Transient Suppression, Protection, ESD, IEC, EMC, Electro-
increasing usage sensitive solid state devices modem electrical systems, particularly computers, communications systems military equipment, given rise concerns about system reliability. These concerns stem from fact that solid state devices very susceptible stray electrical transients which present distribution system. initial semiconductor devices resulted number unexplained failures. Investigation into these failures revealed that they were caused transients, which were present many different forms system. Transients electrical circuit result from tile sudden release previously stored energy. severity hence damage caused transients depends their frequency occurrence, peak transient currents voltages present their waveshapes. order adequately protect sensitive electrical systems, thereby assuring reliable operation, transient voltage suppression must part initial design process simply included afterthought. ensure effective transient suppression, device chosen must have capability dissipate impulse energy transient sufficiently voltage that capabilities circuit being protected affected. most successful type suppression device used metal oxide varistor. Other devices which also used zener diode gas-tube arrestor.
NUMBER SURGES YEAR EXCEEDING SURGE CREST ABSCISSA
Introduction
HIGH EXPOSURE MEDIUM EXPOSURE
(SEE NOTE) SPARKOVER CLEARANCES 10-1 EXPOSURE 10-2 SURGE CREST (kV)
NOTE: some locations, sparkover clearances limit overvoltages. FIGURE RATE SURGE OCCURRENCES VOLTAGE LEVEL UNPROTECTED LOCATIONS
exposure portion graph derived from data collected geographical areas known lightning activity, with little load switching activity. Medium exposure systems geographical areas known high lightning activity, with frequent severe switching transients. High exposure areas rare, real systems, supplied long overhead lines subject reflections line ends, where characteristics installation produce high sparkover levels clearances. Investigations into most common exposure levels, medium, have shown that majority surges occurring here represented typical waveform shapes (per ANSI/IEEE C62.41-1980). majority surges which occur indoor voltage power systems modeled oscillatory waveform (see Figure surge impinging system excites natural resonant frequencies conductor system. result, only surges oscillatory surges have different amplitudes waveshapes different locations system. These oscillatory frequencies range from 5kHz 500kHz with 100kHz being realistic choice.
Transient Environment
occurrence rate surges varies over wide limits, depending particular power system. These transients difficult deal with, their random occurrences problems defining their amplitude, duration energy content. Data collected from many independent sources have data shown Figure This prediction shows with certainty only relative frequency occurrence, while absolute number occurrences described only terms low, medium high exposure. This data taken from unprotected circuits with surge suppression devices.
10-36
1-800-4-HARRIS 407-727-9207 Copyright
Harris Corporation 1998
Application Note 9308
VPEAK VPEAK
Transient Energy Source Impedance
Some transients intentionally created circuit inductive load switching, commutation voltage spikes, etc. These transients easy suppress since their energy content known. transients which generated external circuit coupled into which cause problems. These caused discharge electromagnetic energy, e.g., lightning electrostatic discharge. These transients more difficult identify, measure suppress. Regardless their source, transients have thing common they destructive. destruction potential transients defined their peak voltage, follow-on current time duration current flow, that
10µs 100kHz)
VPEAK 0.5µs
VPEAK
FIGURE 0.5µs 100kHz RING WAVE (OPEN CIRCUIT VOLTAGE)
Vc(t) I(t)
outdoor situations surge waveforms recorded have been categorized virtue energy content associated with them. These waveshapes involve greater energy than those associated with indoor environment. These waveforms were found unidirectional nature (see Figure
where: Transient energy Peak transient current
Resulting clamping voltage Time Impulse duration transient
VPEAK VPEAK
VPEAK VPEAK
should noted that considering very small possibilities direct lightning deemed economically unfeasible protect against such transients. However, protect against transients generated line switching, ESD, other such causes essential, ignored will lead expensive component and/or system losses. energy contained transient will divided between transient suppressor line upon which travelling which determined their impedances. essential make realistic assumption transient's source impedance order ensure that device selected protection adequate surge handling capability. gas-tube arrestor, impedance after sparkover forces most energy dissipated elsewhere instance power-follow current-limiting resistor that added series with gap. This tile disadvantages gas-tube arrestor. voltage clamping suppressor (e.g., metal oxide varistor) must capable absorbing large amount transient surge energy. clamping action does involve power-follow energy resulting from short-circuit action gap. degree which source impedance important depends largely type suppressor used. surge suppressor must able handle current passed through them surge source. assumption high impedance (when testing suppressor)
50µs 1.67 1.2µs
FIGURE OPEN-CIRCUIT WAVEFORM
IPEAK IPEAK
IPEAK
IPEAK
20µs 1.25
FIGURE DISCHARGE CURRENT WAVEFORM FIGURE UNIDIRECTIONAL WAVESHAPES (OUTDOOR LOCATIONS)
10-37
Application Note 9308
subject sufficient stresses, while assumption impedance subject unrealistically large stress; there trade between size/cost suppressor amount protection required. building, source impedance load impedance increases from outside locations well within inside building, i.e., gets further from service entrance, impedance increases. Since wire structure does provide much attention, open circuit voltages show little variat
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