October 1987 Revised January 1999 CD4069UBC Inverter Circuits
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CD4069UBC Inverter Circuits
October 1987 Revised January 1999
CD4069UBC Inverter Circuits
CD4069UB consists inverter circuits manufactured using complementary (CMOS) achieve wide power supply operating range, power consumption, high noise immunity, symmetric controlled rise fall times. This device intended general purpose inverter applications where special characteristics MM74C901, MM74C907, CD4049A Inverter/Buffers required. those applications requiring larger noise immunity MM74C14 MM74C914 Schmitt Trigger suggested. inputs protected from damage static discharge diode clamps VSS.
Features
Wide supply voltage range: High noise immunity: 3.0V 0.45 typ. power compatibility: driving driving 74LS Equivalent MM74C04
Ordering Code:
Order Number CD4069UBCM CD4069UBCSJ CD4069UBCN Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Body 14-Lead Small Outline Package (SOP), EIAJ TYPE 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available Tape Reel. Specify appending suffix ordering code.
Connection Diagram
Assignments SOIC
Schematic Diagram
1999 Fairchild Semiconductor Corporation
DS005975.prf
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CD4069UBC
Absolute Maximum Ratings(Note
(Note Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, seconds) 260°C -0.5V -0.5V +0.5 -65°C +150°C
Recommended Operating Conditions (Note
Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) 15VDC -40°C +85°C
Note "Absolute Maximum Ratings" those values beyond which safety device cannot guaranteed. They meant imply that devices should operated these limits. table "Recommended Operating Conditions" Electrical Characteristics table provide conditions actual device operation. Note unless otherwise specified.
Electrical Characteristics (Note
Symbol Parameter Quiescent Device Current 10V, 15V, Level Output Voltage |IO| HIGH Level Output Voltage |IO| Level Input Voltage |IO| 4.5V 10V, 15V, 13.5V HIGH Level Input Voltage |IO| 0.5V 10V, 15V, 1.5V Level Output Current (Note HIGH Level Output Current (Note Input Current 0.4V 10V, 0.5V 15V, 1.5V 4.6V 10V, 9.5V 15V, 13.5V 15V, 15V,
Note unless otherwise specified. Note tested output time.
Conditions
-40°C
+25°C
+85°C
Units
0.05 0.05 0.05 4.95 9.95 14.95 12.0 0.52 -0.52 -1.3 -3.6 -0.30 0.30 12.0 0.44 -0.44 -1.1 -3.0 4.95 9.95 14.95
0.05 0.05 0.05 4.95 9.95 14.95 12.0
0.05 0.05 0.05
0.88 2.25 -0.88 -2.25 -8.8 -10-5 10-5 -0.30 0.30
0.36 -0.36 -0.9 -2.4 -1.0
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CD4069UBC
Electrical Characteristics
Symbol tPHLor tPLH Parameter Propagation Delay Time from Input Output tTHL tTLH Transition Time
(Note
Conditions Units
25°C, unless otherwise specified
Average Input Capacitance Power Dissipation Capacitance Gate Gate (Note
Note Parameters guaranteed correlated testing. Note determines load power consumption CMOS device. complete explanation, Family Characteristics application note- AN-90.
Test Circuits Switching Time Waveforms
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CD4069UBC
Typical Performance Characteristics
Gate Transfer Characteristics Ambient Temperature
Power Dissipation Frequency
Propagation Delay Ambient Temperature
Propagation Delay Propagation Delay Time Load Capacitance
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CD4069UBC
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Body Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE 5.3mm wide Package Number M14D
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CD4069UBC Inverter Circuits
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT FAIRCHILD SEMICONDUCTOR CORPORATION. used herein: critical component component life support Life support devices systems devices systems device system whose failure perform reawhich, intended surgical implant into sonably expected cause failure life support body, support sustain life, whose failure device system, affect safety effectiveness. perform when properly used accordance with instructions provided labeling, reasonably expected result significant injury www.fairchildsemi.com user.
Fairchild does assume responsibility circuitry described, circuit patent licenses implied Fairchild reserves right time without notice change said circuitry specifications.
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