AT90SP0801 used perform cryptographic operations, using asymmetric pri

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

AT90SP0801 used perform cryptographic operations, using asymmetric pri

Datasheet Thumbnail

Top Searches for this datasheet

Secure Computation Public Signatures Secure Storage Decryption Symmetric Keys On-chip Cache Frequently Used Keys SMBus Communications Port On-board Public Computation Engine Microprocessor Physical Logical Security Measures Inhibit Attacks 20-lead SOIC Package, +70°C Operating Range 3.3V ±10% Supply Voltage
AT90SP0801 used perform cryptographic operations, using asymmetric private keys stored internal EEPROM. arbitrary number private keys stored externally decrypted chip when required. Communication system processor SMBus. Figure Configuration
Secure Signature Generation Chip AT90SP0801 Summary
Name RESET CLKIN TEST
Description Reset Input, Active-low SMBus Clock SMBus Data Ground Input Clock Operating Voltage Connect
28-lead TSSOP
RESET CLKIN TEST TEST
28-lead SOIC
RESET CLKIN TEST TEST
Rev. 1495AS-01/02
Note: This summary document. complete document available under NDA. more information, please contact your local Atmel sales office.
Figure Block Diagram
EEPROM Registers
Hardware Private Password User Buffer Private Password, Mode User Buffer Private Password, Mode
Data
Buffer
SMBus 8/16-bit Crypto Data Buffer
Commands
CLKIN RESET Program Memory
Public Crypto Engine
Key:
Control: Data:
Other Configuration Registers: LOCK, STATUS ERROR, VERS FAILCNT, CONFIG
AT90SP0801
1495AS-01/02
AT90SP0801
Serial Interface
Data transferred from buffer chip using SMBus interface, manner similar identical that standard two-wire serial EEPROMs. bits sent read from chip most significant first, manner consistent with standard serial EEPROMs. fields listed this document correspondingly listed with left right. numbers specified with "0x" prefix. Multi-byte information sent chip sent most significant byte first, following typical conventions. Within chip, first byte sent chip stored memory lowest address, address incremented subsequent bytes. When message digest (hash) sent chip, first byte hash value first byte sent chip. both text graphics, chip slave system master. following abbreviations apply:
Acknowledge (bus pulled low, master slave) Acknowledge (bus left high, master slave) Start (High-to-low with high, master) Stop (Low-to-high with high, master)
graphical representations, direction data flow indicated below:
Slave Master (Chip System) Master Slave (System Chip)
SMBus Standard Usage
Data transfer from chip follows SMBus V1.1 standard, using only some command protocols. "write" command this chip uses "Block Write" protocol SMBus spec. Note that this chip count value exceed This chip does support "Write Byte" "Write Word" protocols SMBus spec. "Read" command this chip uses "Block Read" protocol SMBus spec. Note that this chip "Read" command optionally executed without preceding partial block write command. This chip does support "Receive Byte", "Read Byte" "Read Word" protocols SMBus spec. other commands this chip "Send Byte" protocol SMBus spec. Note that "Quick Command" "Process Call" protocols SMBus spec supported this chip.
Two-wire Serial EEPROM Comparison
Some differences between this chip standard two-wire serial EEPROM are: slave address this chip different from A0-AF (hex) standard EEPROMs. maximum clock rate These specs part SMbus. supply voltage 3.0V 3.7V. read address specified aborted read command. Multi-byte reads writes preceded number bytes that will transferred.
1495AS-01/02
Multi-byte writes longer than maximum size register (i.e., containing more bytes) cause error. Commands Without Data Transfer There number commands (described within following Commands sections) that perform various internal operations chip, using data already stored either buffer internal memories chip. such commands composed bytes sent chip according following flow:
Number bits
Slave Address
Command Code
Start Condition
Acknowledge
Stop Condition
Write Commands
write commands permit data transferred buffer located within SRAM chip. Only block writes supported, transfers bytes require same basic sequence bytes. commands encoded follows:
Slave Address
Command Code
Description Write buffer, (+data) Write command, ignored Write command, ignored
following figure shows structure block write operations:
Slave Address Command Code
Byte Count
Data byte
Data byte
Data byte
write buffer command followed bytes data. bytes sourced host formatted follows:
01010000 s1s0000000 count data0 data1 dataN crc0 crc1
Count denotes total number bytes that follows command, including bytes. value illegal. max. number bytes that written command.
AT90SP0801
1495AS-01/02
AT90SP0801
Data sent least significant byte first. some circumstances, there data, only crc. Depending value bytes included. sequence bits s1-0 within command code tell chip relate this transfer previous subsequent transfers. indicates that this first transfer buffer that data0 should into buffer address this then data0 will stored next location within buffer after that from previous transfer. When set, this also resets generator. indicates that this last transfer buffer. chip must have previously executed command where When last bytes information transferred this block value. chip will NACK crc1 byte, value sent does match that computed incoming data. bytes split across blocks. instance, write password information bytes) chip, following sequence three write commands would used (assuming byte loads). ACKs, NACKs STOP conditions have been ignored clarity.
01010000 01010000 01010000 01000000 00000000 10000000 00100000 00100000 00000010 data0 data32 crc0 data1 data33 crc1 data2 data34 data31 data63
shorter data transfer values, perfectly legal both set. This indicates that entire transfer taking place single block access. example this, following command would write single byte buffer:
01010000 11000000 00000011 data0 crc0 crc1
chip will NACK writes that attempt write into chip beyond internal buffer, which short bytes.
1495AS-01/02
Read Commands
Slave Address
Block read commands slightly different than writes encoded follows:
Command Code Description Read buffer, first block Read, subsequent
read command only byte long, chip (not host) sends back count information. count value will always smaller MAXBLK_R (remaining) number bytes register that have been read yet. When there large number bytes buffer, multiple read commands must executed read bytes chip. Using slave address 0x53 will cause chip start reading beginning buffer. Using slave address 0x51 will cause chip continue reading information that subsequent information last read chip from buffer. After load crypto operation, first command also 0x51, which will have same effect 0x53. Block Reads formatted follows:
Slave Address Byte Count
Data Byte
Data Byte
Data Byte
After last byte been read from register, read pointer reset back beginning register, system continue read from beginning buffer again, desired. There indication from chip when read pointer been reset (other than inferred from values count field). compatible with SMBus specification, read command optionally preceded first bytes either "ignored write" commands, which then aborted with start read. bytes write command completely ignored chip this case, different encoding second byte (01111111, 0x7F) must used. Execution block read sequence using legal write command code second byte (00, 0x40, 0x80 0xC) undefined. protocol this shown below:
Slave Address 0111 1111 Slave Address
Byte Count
Data byte
Data byte
Data byte
AT90SP0801
1495AS-01/02
AT90SP0801
example read block command, following would take place read four bytes data from buffer (assuming that load VERS_R command previously been executed).
01010011 00000100 data0 data1 data2 data3
01010010 01111111 01010011 00000100 data0 data1 data2 data3
example multiple read block command, following would take place read 1040 bits (130 bytes) signature data from buffer (assuming that "sign" command previously been executed). earlier, two-byte aborted write option each command. Note that first byte read (data0) most significant byte signature, while data128 most significant byte CRC.
01010010 01010000 01010000 01010000 01010000 01111111 01111111 01111111 01111111 01111111 01010011 01010001 01010001 01010001 01010001 00100000 00100000 00100000 00100000 00000010 data0 data32 data64 data96 data128 data1 data33 data65 data97 data129 data31 data63 data95 data127
1495AS-01/02
Absolute Maximum Ratings
Operating Temperature.0°C +70°C Storage Temperature (without bias).0°C +70°C Votage Pins.-0.1 +0.3V Voltage with Respect Ground.6.0V *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions beyond those indicated operational sections this specification cause temporary permanent failure. Exposure absolute maximum rating conditions extended periods affect device reliability.
Maximum Voltage.2000V
Serial Interface Specifications
Gate except noted. 3.0V 3.7V.
Name tSCL tLOW tHIGH tBUF tHD.STA tSU.STA tHD.DAT tSU.DAT tSU.STO tCLKIN tCLKO, tCKH1 Units Notes Clock (SCL) Frequency Clock (SCL) Pulse Low-width Clock (SCL) Pulse High-width Noise Suppression, Tested Clock Data valid free before Transmission, Tested Start Hold Time Start Set-up Time Data Hold Time Data Set-up Time Inputs Rise Time, Tested Inputs Fall time, Tested Stop Set-up Time Data Hold Time Write Cycle Time, EEPROM Write CLKIN Period CLKIN CLKIN High
Figure Timing Diagram Serial Interface Specification
AT90SP0801
1495AS-01/02
AT90SP0801
Serial Interface Specifications
Operating Temperature Range 70°C.
Name ICC(1)
Units
Notes Operating Voltage, 3.7V, fSDA 3.3V, CLKIN SDA, SCL.
-0.1
ILIO fCLKIN Notes:
SCL, SDA, Tested Duty cycle >48% <52%
14.318
specifications noted "not tested" denote parameters that characterized 100% tested. Preliminary data, subject change.
1495AS-01/02
Ordering Information
Ordering Code AT90SP0801-01SC Package 20S, 20-lead SOIC Operation Range Commercial (0°C 70°C)
Package Type 20-lead, 0.300 Wide, Plastic Gull Wing Small Outline (SOIC)
AT90SP0801
1495AS-01/02
Packaging Information
20S, Lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC) Dimensions Inches (Millimeters) 28A, 28-lead, 6.1mm Wide, Thin Shrink Small Outline Package (TSSOP) Dimensions Inches (Millimeters)
0.020 (0.508) 0.013 (0.330)
.0075" (0.19) .0118" (0.30)
0.299 (7.60) 0.420 (10.7) 0.291 (7.39) 0.393 (9.98)
.236" (6.0) .224" (6.2) .319" (8.1)
.050 (1.27)
0.513 (13.0) 0.497 (12.6)
0.105 (2.67) 0.092 (2.34)
.026" (0.65)
.378"(9.6) .386"(9.8)
0.012 (0.305) 0.003 (0.076)
.002" (0.05) .006" (0.15)
.043" (1.10)
0.013 (0.330) 0.009 (0.229)
.0035" (0.09) .0079" (0.20) .020" (0.50) .030" (0.75)
0.035 (0.889) 0.015 (0.381)
AT90SP0801
1495AS-01/02
Atmel Headquarters
Corporate Headquarters
2325 Orchard Parkway Jose, 95131 1(408) 441-0311 1(408) 487-2600
Atmel Operations
Memory
Atmel Corporate 2325 Orchard Parkway Jose, 95131 1(408) 436-4270 1(408) 436-4314
RF/Automotive
Atmel Heilbronn Theresienstrasse Postfach 3535 74025 Heilbronn, Germany (49) 71-31-67-0 (49) 71-31-67-2340 Atmel Colorado Springs 1150 East Cheyenne Mtn. Blvd. Colorado Springs, 80906 1(719) 576-3300 1(719) 540-1759
Europe
Atmel SarL Route Arsenaux Casa Postale CH-1705 Fribourg Switzerland (41) 26-426-5555 (41) 26-426-5500
Microcontrollers
Atmel Corporate 2325 Orchard Parkway Jose, 95131 1(408) 436-4270 1(408) 436-4314 Atmel Nantes Chantrerie 70602 44306 Nantes Cedex France (33) 2-40-18-18-18 (33) 2-40-18-19-60
Asia
Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza Mody Road Tsimhatsui East Kowloon Hong Kong (852) 2721-9778 (852) 2722-1369
Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom
Atmel Grenoble Avenue Rochepleine 38521 Saint-Egreve Cedex, France (33) 4-76-58-30-00 (33) 4-76-58-34-80
ASIC/ASSP/Smart Cards
Atmel Rousset Zone Industrielle 13106 Rousset Cedex, France (33) 4-42-53-60-00 (33) 4-42-53-60-01 Atmel Colorado Springs 1150 East Cheyenne Mtn. Blvd. Colorado Springs, 80906 1(719) 576-3300 1(719) 540-1759 Atmel Smart Card Scottish Enterprise Technology Park Maxwell Building East Kilbride 0QR, Scotland (44) 1355-803-000 (44) 1355-242-743
Japan
Atmel Japan K.K. Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan (81) 3-3523-3551 (81) 3-3523-7581
e-mail
literature@atmel.com
Site
http://www.atmel.com
Atmel Corporation 2002. Atmel Corporation makes warranty products, other than those expressly contained Company's standard warranty which detailed Atmel's Terms Conditions located Company's site. Company assumes responsibility errors which appear this document, reserves right change devices specifications detailed herein time without notice, does make commitment update information contained herein. licenses patents other intellectual property Atmel granted Company connection with sale Atmel products, expressly implication. Atmel's products authorized critical components life support devices systems. ATMEL isthe registered trademarks Atmel.
Printed recycled paper.
1495AS-01/02/xM

AT90SP0801 used perform cryptographic operations, using asymmetric pri

Top Searches for this datasheet

Other recent searches