SST39VF1681 SST39VF1682 SST39VF1681 16822.7V 16Mb (x8) MPF+ memor
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Mbit (x8) Multi-Purpose Flash Plus
SST39VF1681 SST39VF1682
SST39VF1681 16822.7V 16Mb (x8) MPF+ memories
FEATURES:
Organized Single Voltage Read Write Operations 2.7-3.6V Superior Reliability Endurance: 100,000 Cycles (Typical) Greater than years Data Retention Power Consumption (typical values MHz) Active Current: (typical) Standby Current: (typical) Auto Power Mode: (typical) Hardware Block-Protection/WP# Input Block-Protection (top KByte) SST39VF1682 Bottom Block-Protection (bottom KByte) SST39VF1681 Sector-Erase Capability Uniform KByte sectors Block-Erase Capability Uniform KByte blocks Chip-Erase Capability Erase-Suspend/Erase-Resume Capabilities Hardware Reset (RST#) Security-ID Feature SST: bits; User: bits Fast Read Access Time: Latched Address Data Fast Erase Byte-Program: Sector-Erase Time: (typical) Block-Erase Time: (typical) Chip-Erase Time: (typical) Byte-Program Time: (typical) Automatic Write Timing Internal Generation End-of-Write Detection Toggle Bits Data# Polling CMOS Compatibility JEDEC Standard Flash EEPROM Pinouts Command sets Packages Available 48-ball TFBGA (6mm 8mm) 48-lead TSOP (12mm 20mm)
PRODUCT DESCRIPTION
SST39VF168x devices CMOS Multi-Purpose Flash Plus (MPF+) manufactured with SST's proprietary, high performance CMOS SuperFlash technology. split-gate cell design thick-oxide tunneling injector attain better reliability manufacturability compared with alternate approaches. SST39VF168x write (Program Erase) with 2.7-3.6V power supply. These devices conform JEDEC standard pinouts memories. Featuring high performance Byte-Program, SST39VF168x devices provide typical Byte-Program time µsec. These devices Toggle Data# Polling indicate completion Program operation. protect against inadvertent write, they have on-chip hardware Software Data Protection schemes. Designed, manufactured, tested wide spectrum applications, these devices offered with guaranteed typical endurance 100,000 cycles. Data retention rated greater than years. SST39VF168x devices suited applications that require convenient economical updating program, configuration, data memory. system applications,
©2003 Silicon Storage Technology, Inc. S71243-03-000 11/03
they significantly improve performance reliability, while lowering power consumption. They inherently less energy during Erase Program than alternative flash technologies. total energy consumed function applied voltage, current, time application. Since given voltage range, SuperFlash technology uses less current program shorter erase time, total energy consumed during Erase Program operation less than alternative flash technologies. These devices also improve flexibility while lowering cost program, data, configuration storage applications. SuperFlash technology provides fixed Erase Program times, independent number Erase/Program cycles that have occurred. Therefore system software hardware does have modified de-rated necessary with alternative flash technologies, whose Erase Program times increase with accumulated Erase/Program cycles. meet high density, surface mount requirements, SST39VF168x offered both 48-ball TFBGA 48-lead TSOP packages. Figures assignments.
logo SuperFlash registered trademarks Silicon Storage Technology, Inc. trademark Silicon Storage Technology, Inc. These specifications subject change without notice.
Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Device Operation
Commands used initiate memory operation functions device. Commands written device using standard microprocessor write sequences. command written asserting while keeping low. address latched falling edge CE#, whichever occurs last. data latched rising edge CE#, whichever occurs first. SST39VF168x also have Auto Power mode which puts device near standby mode after data been accessed with valid Read operation. This reduces active read current from typically typically Auto Power mode reduces typical active read current range mA/MHz Read cycle time. device exits Auto Power mode with address transition control signal transition used initiate another Read cycle, with access time penalty. Note that device does enter Auto-Low Power mode after power-up with held steadily low, until first address transition driven high.
commands issued during internal Program operation ignored. During command sequence, should statically held high low.
Sector/Block-Erase Operation
Sector- Block-) Erase operation allows system erase device sector-by-sector block-byblock) basis. SST39VF168x offer both Sector-Erase Block-Erase mode. sector architecture based uniform sector size KByte. Block-Erase mode based uniform block size KByte. SectorErase operation initiated executing six-byte command sequence with Sector-Erase command (50H) sector address (SA) last cycle. Block-Erase operation initiated executing six-byte command sequence with Block-Erase command (30H) block address (BA) last cycle. sector block address latched falling edge sixth pulse, while command (30H 50H) latched rising edge sixth pulse. internal Erase operation begins after sixth pulse. End-ofErase operation determined using either Data# Polling Toggle methods. Figures timing waveforms Figure flowchart. commands issued during Sector- Block-Erase operation ignored. When low, attempt Sector(Block-) Erase protected block will ignored. During command sequence, should statically held high low.
Read
Read operation SST39VF168x controlled OE#, both have system obtain data from outputs. used device selection. When high, chip deselected only standby power consumed. output control used gate data from output pins. data high impedance state when either high. Refer Read cycle timing diagram further details (Figure
Erase-Suspend/Erase-Resume Commands
Erase-Suspend operation temporarily suspends Sector- Block-Erase operation thus allowing data read from memory location, program data into sector/block that suspended Erase operation. operation executed issuing byte command sequence with Erase-Suspend command (B0H). device automatically enters read mode typically within after Erase-Suspend command been issued. Valid data read from sector block that suspended from Erase operation. Reading address location within erase-suspended sectors/blocks will output toggling "1". While Erase-Suspend mode, Byte-Program operation allowed except sector block selected Erase-Suspend. resume Sector-Erase Block-Erase operation which been suspended system must issue Erase Resume command. operation executed issuing byte command sequence with Erase Resume command (30H) address last Byte sequence.
Byte-Program Operation
SST39VF168x programmed byte-by-byte basis. Before programming, sector where byte exists must fully erased. Program operation accomplished three steps. first step three-byte load sequence Software Data Protection. second step load byte address byte data. During ByteProgram operation, addresses latched falling edge either WE#, whichever occurs last. data latched rising edge either WE#, whichever occurs first. third step internal Program operation which initiated after rising edge fourth CE#, whichever occurs first. Program operation, once initiated, will completed within Figures controlled Program operation timing diagrams Figure flowcharts. During Program operation, only valid reads Data# Polling Toggle Bit. During internal Program operation, host free perform additional tasks.
©2003 Silicon Storage Technology, Inc.
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Chip-Erase Operation
SST39VF168x provide Chip-Erase operation, which allows user erase entire memory array state. This useful when entire device must quickly erased. Chip-Erase operation initiated executing sixbyte command sequence with Chip-Erase command (10H) address AAAH last byte sequence. Erase operation begins with rising edge sixth CE#, whichever occurs first. During Erase operation, only valid read Toggle Data# Polling. Table command sequence, Figure timing diagram, Figure flowchart. commands issued during Chip-Erase operation ignored. When low, attempt Chip-Erase will ignored. During command sequence, should statically held high low.
`1'. Data# Polling valid after rising edge fourth CE#) pulse Program operation. Sector-, Block- Chip-Erase, Data# Polling valid after rising edge sixth CE#) pulse. Figure Data# Polling timing diagram Figure flowchart.
Toggle Bits (DQ6 DQ2)
During internal Program Erase operation, consecutive attempts read will produce alternating "1"s "0"s, i.e., toggling between When internal Program Erase operation completed, will stop toggling. device then ready next operation. Sector-, Block-, Chip-Erase, toggle (DQ6) valid after rising edge sixth CE#) pulse. will Read operation attempted Erase-Suspended Sector/Block. Program operation initiated sector/block selected Erase-Suspend mode, will toggle. additional Toggle available DQ2, which used conjunction with check whether particular sector being actively erased erase-suspended. Table shows detailed status bits information. Toggle (DQ2) valid after rising edge last CE#) pulse Write operation. Figure Toggle timing diagram Figure flowchart. TABLE WRITE OPERATION STATUS
Status
Normal Standard Operation Program Standard Erase EraseSuspend Mode Read from Erase Suspended Sector/Block Read from Non- Erase Suspended Sector/Block Program
Write Operation Status Detection
SST39VF168x provide software means detect completion Write (Program Erase) cycle, order optimize system write cycle time. software detection includes status bits: Data# Polling (DQ7) Toggle (DQ6). End-of-Write detection mode enabled after rising edge WE#, which initiates internal Program Erase operation. actual completion nonvolatile write asynchronous with system; therefore, either Data# Polling Toggle read simultaneous with completion write cycle. this occurs, system possibly erroneous result, i.e., valid data appear conflict with either DQ6. order prevent spurious rejection, erroneous result occurs, software routine should include loop read accessed location additional times. both reads valid, then device completed Write cycle, otherwise rejection valid.
DQ7#
Toggle Toggle
Toggle Toggle Toggle
Data
Data
Data
DQ7#
Toggle
T1.0 1243
Data# Polling (DQ7)
When SST39VF168x internal Program operation, attempt read will produce complement true data. Once Program operation completed, will produce true data. Note that even though have valid data immediately following completion internal Write operation, remaining data outputs still invalid: valid data entire data will appear subsequent successive Read cycles after interval During internal Erase operation, attempt read will produce `0'. Once internal Erase operation completed, will produce
©2003 Silicon Storage Technology, Inc.
Note: require valid address when reading status information.
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Data Protection
SST39VF168x provide both hardware software features protect nonvolatile data from inadvertent writes.
Hardware Reset (RST#)
RST# provides hardware method resetting device read array data. When RST# held least TRP, in-progress operation will terminate return Read mode. When internal Program/Erase operation progress, minimum period TRHR required after RST# driven high before valid Read take place (see Figure 15). Erase Program operation that been interrupted needs reinitiated after device resumes normal operation mode ensure data integrity.
Hardware Data Protection
Noise/Glitch Protection: pulse less than will initiate write cycle. Power Up/Down Detection: Write operation inhibited when less than 1.5V. Write Inhibit Mode: Forcing low, high, high will inhibit Write operation. This prevents inadvertent writes during power-up power-down.
Software Data Protection (SDP)
SST39VF168x provide JEDEC approved Software Data Protection scheme data alteration operations, i.e., Program Erase. Program operation requires inclusion three-byte sequence. three-byte load sequence used initiate Program operation, providing optimal protection from inadvertent Write operations, e.g., during system power-up power-down. Erase operation requires inclusion six-byte sequence. These devices shipped with Software Data Protection permanently enabled. Table specific software command codes. During command sequence, invalid commands will abort device Read mode within TRC.
Hardware Block Protection
SST39VF1682 supports hardware block protection, which protects KByte block device. SST39VF1681 supports bottom hardware block protection, which protects bottom KByte block device. Boot Block address ranges described Table Program Erase operations prevented KByte when low. left floating, internally held high pull-up resistor, Boot Block unprotected, enabling Program Erase operations that block. TABLE BOOT BLOCK ADDRESS RANGES
Product Bottom Boot Block SST39VF1681 Boot Block SST39VF1682 1F0000H-1FFFFFH
T2.1 1243
Address Range 000000H-00FFFFH
Common Flash Memory Interface (CFI)
SST39VF168x also contain information describe characteristics device. order enter Query mode, system must write three-byte sequence, same product entry command with (CFI Query command) address AAAH last byte sequence. Once device enters Query mode, system read data addresses given Tables through system must write Exit command return Read mode from Query mode.
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Product Identification
Product Identification mode identifies devices SST39VF1681 SST39VF1682, manufacturer SST. Users software Product Identification operation identify part (i.e., using device when using multiple manufacturers same socket. details, Table software operation, Figure software Entry Read timing diagram, Figure software Entry command sequence flowchart. TABLE PRODUCT IDENTIFICATION
Address Manufacturer's Device SST39VF1681 SST39VF1682 0001H 0001H
T3.1 1243
apparently causes device behave abnormally, e.g., read correctly. Please note that software Exit/CFI Exit command ignored during internal Program Erase operation. Table software command codes, Figure timing waveform, Figures flowcharts.
Security
SST39VF168x devices offer 256-bit Security space which divided into 128-bit segments. first segment programmed locked with random 128-bit number. user segment left un-programmed customer program desired. program user segment Security user must Security Byte-Program command. detect end-of-write read toggle bits. Data# Polling. Once this complete, should locked using User Program Lock-Out. This disables future corruption this space. Note that regardless whether locked, neither segment erased. Security space queried executing three-byte command sequence with Enter-Sec-ID command (88H) address AAAH last byte sequence. Execute Exit-Sec-ID command exit this mode. Refer Table more details.
Data
0000H
Product Identification Mode Exit/ Mode Exit
order return standard Read mode, Software Product Identification mode must exited. Exit accomplished issuing software Exit command sequence, which returns device Read mode. This command also used reset device Read mode after inadvertent transient condition that
FUNCTIONAL BLOCK DIAGRAM
X-Decoder
SuperFlash Memory
Memory Address
Address Buffer Latches Y-Decoder
RESET#
Buffers Data Latches Control Logic
1243 B1.0
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
VIEW (balls facing down)
1243 48-tfbga P1.0
RST#
FIGURE ASSIGNMENTS 48-LEAD TFBGA
RST#
Standard Pinout View
1243 48-tsop P2.0
FIGURE ASSIGNMENTS 48-LEAD TSOP
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Preliminary Specifications TABLE DESCRIPTION
Symbol AMS1-A0 Name Address Inputs Functions provide memory addresses. During Sector-Erase AMS-A12 address lines will select sector. During Block-Erase AMS-A16 address lines will select block. output data during Read cycles receive input data during Write cycles. Data internally latched during Write cycle. outputs tri-state when high. protect top/bottom boot block from Erase/Program operation when grounded. reset return device Read mode. activate device when low. gate data output buffers. control Write operations. provide power supply voltage: 2.7-3.6V Unconnected pins.
T4.1 1243
DQ7-DQ0
Data Input/output
RST#
Write Protect Reset Chip Enable Output Enable Write Enable Power Supply Ground Connection
Most significant address SST39VF1681/1682
TABLE OPERATION MODES SELECTION
Mode Read Program Erase Standby Write Inhibit Product Identification Software Mode Table
T5.0 1243
DOUT High High DOUT High DOUT
Address Sector block address, Chip-Erase
VIH, other value.
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Preliminary Specifications TABLE SOFTWARE COMMAND SEQUENCE
Command Sequence
Byte-Program Sector-Erase Block-Erase Chip-Erase Erase-Suspend Erase-Resume Query
Write Cycle Addr1 AAAH AAAH AAAH AAAH XXXXH XXXXH AAAH AAAH AAAH AAAH AAAH AAAH Data
Write Cycle Addr1 555H 555H 555H 555H Data
Write Cycle Addr1 AAAH AAAH AAAH AAAH Data
Write Cycle Addr1 AAAH AAAH AAAH Data Data
Write Cycle Addr1 555H 555H 555H Data
Write Cycle Addr1 SAX3 BAX3 AAAH Data
555H 555H 555H 555H 555H 555H
AAAH AAAH AAAH AAAH AAAH AAAH
XXH5 Data
User Security Byte-Program User Security Program Lock-Out Software Entry6,7 Query Entry Software Exit8,9 /CFI Exit/Sec Exit Software Exit8,9 /CFI Exit/Sec Exit
T6.1 1243
Address format A11-A0 (Hex). Addresses A20-A12 VIH, other value, Command sequence SST39VF1681/1682. Program Byte Address Sector-Erase; uses AMS-A12 address lines BAX, Block-Erase; uses AMS-A16 address lines Most significant address SST39VF1681/1682 With AMS-A5 read with A4-A0, read with (Address range 00000H 0000FH), User read with (Address range 00010H 0001FH). Lock Status read with A7-A0 0000FFH. Unlocked: Locked: Valid Byte Addresses from 000000H-00000FH 000020H-00002FH. device does remain Software Product Mode powered down. With AMS-A1 Manufacturer 00BFH, read with SST39VF1681 Device C8H, read with SST39VF1682 Device C9H, read with Most significant address SST39VF1681/1682 Both Software Exit operations equivalent users never lock after programming, programmed over previously unprogrammed bits (data=1) using mode again (the programmed bits cannot reversed "1").
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Preliminary Specifications TABLE QUERY IDENTIFICATION STRING1
Address Data Data Query Unique ASCII string "QRY"
Primary command Address Primary Extended Table Alternate command (00H none exists) Address Alternate extended Table (00H none exits)
T7.1 1243
Refer publication more details.
TABLE SYSTEM INTERFACE INFORMATION
Address Data Data (Program/Erase) DQ7-DQ4: Volts, DQ3-DQ0: millivolts (Program/Erase) DQ7-DQ4: Volts, DQ3-DQ0: millivolts min. (00H pin) max. (00H pin) Typical time Byte-Program Typical time min. size buffer program (00H supported) Typical time individual Sector/Block-Erase Typical time Chip-Erase Maximum time Byte-Program times typical Maximum time buffer program times typical Maximum time individual Sector/Block-Erase times typical Maximum time Chip-Erase times typical
T8.1 1243
TABLE DEVICE GEOMETRY INFORMATION
Address Data Data Device size Bytes (15H MByte) Flash Device Interface description; x8-only asynchronous interface Maximum number byte multi-byte write (00H supported) Number Erase Sector/Block sizes supported device Sector Information Number sectors; 256B sector size) sectors (01FF Bytes KByte/sector (0010H Block Information Number blocks; 256B block size) blocks Bytes KByte/block (0100H 256)
T9.1 1243
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Preliminary Specifications Absolute Maximum Stress Ratings (Applied conditions greater than those listed under "Absolute Maximum Stress Ratings" cause permanent damage device. This stress rating only functional operation device these conditions conditions greater than those defined operational sections this data sheet implied. Exposure absolute maximum stress rating conditions affect device reliability.) Temperature Under Bias -55°C +125°C Storage Temperature -65°C +150°C Voltage Ground Potential -0.5V VDD+0.5V Transient Voltage (<20 Ground Potential -2.0V VDD+2.0V Voltage Ground Potential -0.5V 13.2V Package Power Dissipation Capability 25°C) 1.0W Surface Mount Lead Soldering Temperature Seconds) 240°C Output Short Circuit Current1
Outputs shorted more than second. more than output shorted time.
OPERATING RANGE
Range Commercial Industrial Ambient Temp +70°C -40°C +85°C
2.7-3.6V 2.7-3.6V
CONDITIONS
TEST
Input Rise/Fall Time Output Load Figures
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Preliminary Specifications TABLE OPERATING CHARACTERISTICS 2.7-3.6V1
Limits Symbol Parameter Power Supply Current Read3 Program Erase IALP ILIW VILC VIHC Standby Current Auto Power Input Leakage Current Input Leakage Current RST# Output Leakage Current Input Voltage Input Voltage (CMOS) Input High Voltage Input High Voltage (CMOS) Output Voltage Output High Voltage VDD-0.2 0.7VDD VDD-0.3 Units Test Conditions Address input=VILT/VIHT2, MHz, VDD=VDD CE#=VIL, OE#=WE#=VIH, I/Os open CE#=WE#=VIL, OE#=VIH CE#=VIHC, VDD=VDD CE#=VILC, VDD=VDD inputs=VSS VDD, WE#=VIHC VIN=GND VDD, VDD=VDD WP#=GND RST#=GND VOUT=GND VDD, VDD=VDD VDD=VDD VDD=VDD VDD=VDD VDD=VDD IOL=100 VDD=VDD IOH=-100 VDD=VDD
T10.8 1243
Typical conditions Active Current shown front page data sheet average values 25°C (room temperature), 100% tested. Figure current listed typically less than 2mA/MHz, with VIH. Typical
TABLE RECOMMENDED SYSTEM POWER-UP TIMINGS
Symbol TPU-READ1 TPU-WRITE
Parameter Power-up Read Operation Power-up Program/Erase Operation
Minimum
Units
T11.0 1243
This parameter measured only initial qualification after design process change that could affect this parameter.
TABLE CAPACITANCE
Parameter CI/O1
25°C, Mhz, other pins open)
Description Capacitance Input Capacitance
Test Condition VI/O
Maximum
T12.0 1243
This parameter measured only initial qualification after design process change that could affect this parameter.
TABLE RELIABILITY CHARACTERISTICS
Symbol NEND TDR1 ILTH
Parameter Endurance Data Retention Latch
Minimum Specification 10,000
Units Cycles Years
Test Method JEDEC Standard A117 JEDEC Standard A103 JEDEC Standard
T13.2 1243
This parameter measured only initial qualification after design process change that could affect this parameter. NEND endurance rating qualified 10,000 cycle minimum whole device. sector- block-level rating would result higher minimum specification.
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
CHARACTERISTICS
TABLE READ CYCLE TIMING PARAMETERS 2.7-3.6V
SST39VF168x-70 Symbol TCLZ1 TOLZ1 TCHZ1 TOHZ1 TOH1 TRP1 TRHR
SST39VF168x-90 Units
T14.1 1243
Parameter Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time Active Output Active Output High High-Z Output High High-Z Output Output Hold from Address Change RST# Pulse Width RST# High before Read RST# Read Mode
TRY1,2
This parameter measured only initial qualification after design process change that could affect this parameter. This parameter applies Sector-Erase, Block-Erase, Program operations. This parameter does apply Chip-Erase operations.
TABLE PROGRAM/ERASE CYCLE TIMING PARAMETERS
Symbol TOES TOEH TWPH1 TCPH1 TDH1 TIDA1 TSCE Parameter Byte-Program Time Address Setup Time Address Hold Time Setup Time Hold Time High Setup Time High Hold Time Pulse Width Pulse Width Pulse Width High Pulse Width High Data Setup Time Data Hold Time Software Access Exit Time Sector-Erase Block-Erase Chip-Erase Units
T15.0 1243
This parameter measured only initial qualification after design process change that could affect this parameter.
©2003 Silicon Storage Technology, Inc.
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
ADDRESS AMS-0
TOLZ
TOHZ TCHZ HIGH-Z DATA VALID
1243 F02.0
DQ15-0
HIGH-Z
TCLZ
DATA VALID
Note: Most Significant Address SST39VF168x
FIGURE READ CYCLE TIMING DIAGRAM
INTERNAL PROGRAM OPERATION STARTS ADDRESS AMS-0 DQ7-0 DATA BYTE (ADDR/DATA)
1243 F03.0
ADDR
TWPH
Note: Most Significant Address SST39VF168x must held proper logic state (VIL VIH) prior after command sequence. VIH, other value.
FIGURE CONTROLLED PROGRAM CYCLE TIMING DIAGRAM
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
INTERNAL PROGRAM OPERATION STARTS ADDRESS AMS-0 DQ7-0 DATA BYTE (ADDR/DATA)
1243 F04.0
ADDR
TCPH
Note: Most Significant Address SST39VF168x must held proper logic state (VIL VIH) prior after command sequence. VIH, other value.
FIGURE CONTROLLED PROGRAM CYCLE TIMING DIAGRAM
ADDRESS AMS-0 TOEH TOES
DATA
DATA#
DATA#
DATA
1243 F05.0
Note: Most Significant Address SST39VF168x
FIGURE DATA# POLLING TIMING DIAGRAM
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
ADDRESS AMS-0 TOEH TOES
READ CYCLES WITH SAME OUTPUTS 1243 F06.0
Note: Most Significant Address SST39VF168x
FIGURE TOGGLE BITS TIMING DIAGRAM
SIX-BYTE CODE CHIP-ERASE ADDRESS AMS-0
TSCE
DQ7-0
1243 F07.0
Note: This device also supports controlled Chip-Erase operation. signals interchangeable long minimum timings meet. (See Table 15.) Most Significant Address SST39VF168x must held proper logic state (VIL VIH) prior after command sequence. VIH, other value.
FIGURE CONTROLLED CHIP-ERASE TIMING DIAGRAM
©2003 Silicon Storage Technology, Inc. S71243-03-000 11/03
Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
SIX-BYTE CODE BLOCK-ERASE ADDRESS AMS-0
DQ7-0
1243 F08.0
Note: This device also supports controlled Chip-Erase operation. signals interchangeable long minimum timings meet. (See Table 15.) Block Address Most Significant Address SST39VF168x must held proper logic state (VIL VIH) prior after command sequence. VIH, other value.
FIGURE CONTROLLED BLOCK-ERASE TIMING DIAGRAM
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
SIX-BYTE CODE SECTOR-ERASE ADDRESS AMS-0
DQ7-0
1243 F9.0
Note: This device also supports controlled Chip-Erase operation. signals interchangeable long minimum timings meet. (See Table 15.) Sector Address Most Significant Address SST39VF168x must held proper logic state (VIL VIH) prior after command sequence. VIH, other value.
FIGURE CONTROLLED SECTOR-ERASE TIMING DIAGRAM
©2003 Silicon Storage Technology, Inc.
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
THREE-BYTE SEQUENCE SOFTWARE ENTRY ADDRESS AMS-0 0000 0001
TWPH DQ7-0 Device
1243 F10.1
TIDA
Note: Device Table page Most Significant Address SST39VF168x must held proper logic state (VIL VIH) prior after command sequence. VIH, other value.
FIGURE SOFTWARE ENTRY
READ
THREE-BYTE SEQUENCE QUERY ENTRY ADDRESS AMS-0
TWPH DQ7-0
1243 F11.1
TIDA
Note: Most Significant Address SST39VF168x must held proper logic state (VIL VIH) prior after command sequence. VIH, other value.
FIGURE QUERY ENTRY
READ
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
THREE-BYTE SEQUENCE SOFTWARE EXIT RESET
ADDRESS AMS-0
DQ7-0
TIDA
TWHP Note: Most Significant Address SST39VF168x must held proper logic state (VIL VIH) prior after command sequence. VIH, other value.
1243 F12.1
FIGURE SOFTWARE EXIT/CFI EXIT
THREE-BYTE SEQUENCE QUERY ENTRY ADDRESS AMS-0
TWPH DQ7-0
1243 F13.0
TIDA
Note: Most Significant Address SST39VF168x must held proper logic state (VIL VIH) prior after command sequence. VIH, other value.
FIGURE ENTRY
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
RST#
CE#/OE#
TRHR
1243 F14.0
FIGURE RST# TIMING DIAGRAM (WHEN
INTERNAL OPERATION PROGRESS)
RST# CE#/OE# End-of-Write Detection (Toggle-Bit)
1243 F15.0
FIGURE RST# TIMING DIAGRAM (DURING PROGRAM
ERASE
OPERATION)
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
VIHT
INPUT
REFERENCE POINTS
OUTPUT
VILT
1243 F16.0
test inputs driven VIHT (0.9 VDD) logic VILT (0.1 VDD) logic "0". Measurement reference points inputs outputs (0.5 VDD) (0.5 VDD). Input rise fall times (10% 90%)
Note: VINPUT Test VOUTPUT Test VIHT VINPUT HIGH Test VILT VINPUT Test
FIGURE INPUT/OUTPUT REFERENCE WAVEFORMS
TESTER
1243 F17.0
FIGURE TEST LOAD EXAMPLE
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Start
Load data: Address: AAAH
Load data: Address: 555H
Load data: Address: AAAH
Load Word Address/Word Data
Wait Program (TBP, Data# Polling bit, Toggle operation) Program Completed
1243 F18.0
VIH, other value
FIGURE BYTE-PROGRAM ALGORITHM
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Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Internal Timer Program/Erase Initiated
Toggle Program/Erase Initiated
Data# Polling Program/Erase Initiated
Wait TBP, TSCE,
Read word
Read
Program/Erase Completed
Read same word
true data?
Does match? Program/Erase Completed
Program/Erase Completed
1243 F19.0
FIGURE WAIT OPTIONS
©2003 Silicon Storage Technology, Inc.
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11/03
Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Query Entry Command Sequence Load data: Address: AAAH
Query Entry Command Sequence Load data: Address: AAAH
Software Product Entry Command Sequence Load data: Address: AAAH
Load data: Address: 555H
Load data: Address: 555H
Load data: Address: 555H
Load data: Address: AAAH
Load data: Address: AAAH
Load data: Address: 5555H
Wait TIDA
Wait TIDA
Wait TIDA
Read data
Read
Read Software
VIH, other value
1243 F20.0
FIGURE SOFTWARE ID/CFI ENTRY COMMAND FLOWCHARTS
©2003 Silicon Storage Technology, Inc.
S71243-03-000
11/03
Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Software Exit/CFI Exit/Sec Exit Command Sequence Load data: Address: AAAH Load data: Address:
Load data: Address: 555H
Wait TIDA
Load data: Address: AAAH
Return normal operation
Wait TIDA
Return normal operation
VIH, other value
1243 F21.0
FIGURE SOFTWARE ID/CFI EXIT COMMAND FLOWCHARTS
©2003 Silicon Storage Technology, Inc.
S71243-03-000
11/03
Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
Chip-Erase Command Sequence Load data: Address: AAAH
Sector-Erase Command Sequence Load data: Address: AAAH
Block-Erase Command Sequence Load data: Address: AAAH
Load data: Address: 555H
Load data: Address: 555H
Load data: Address: 555H
Load data: Address: AAAH
Load data: Address: AAAH
Load data: Address: AAAH
Load data: Address: AAAH
Load data: Address: AAAH
Load data: Address: AAAH
Load data: Address: 555H
Load data: Address: 555H
Load data: Address: 555H
Load data: Address: AAAH
Load data: Address:
Load data: Address:
Wait TSCE
Wait
Wait
Chip erased FFFFH
Sector erased FFFFH
Block erased FFFFH
1243 F22.0
VIH, other value
FIGURE ERASE COMMAND SEQUENCE
©2003 Silicon Storage Technology, Inc.
S71243-03-000
11/03
Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
PRODUCT ORDERING INFORMATION
1681 XXXX Environmental Attribute non-Pb Package Modifier leads Package Type TFBGA (6mm 8mm, 0.8mm pitch) TSOP (type1, 12mm 20mm) Temperature Range Commercial +70°C Industrial -40°C +85°C Minimum Endurance 10,000 cycles Read Access Speed Hardware Block Protection Bottom Boot-Block Boot-Block Device Density Mbit Voltage 2.7-3.6V Product Series Multi-Purpose Flash Valid Combinations SST39VF1681 SST39VF1681-70-4C-EK SST39VF1681-70-4C-EKE SST39VF1681-70-4I-EK SST39VF1681-70-4I-EKE SST39VF1681-90-4I-EK SST39VF1681-90-4I-EKE SST39VF1681-70-4C-B3K SST39VF1681-70-4C-B3KE SST39VF1681-70-4I-B3K SST39VF1681-70-4I-B3KE
Valid Combinations SST39VF1682 SST39VF1682-70-4C-EK SST39VF1682-70-4C-EKE SST39VF1682-70-4I-EK SST39VF1682-70-4I-EKE SST39VF1682-90-4I-EK SST39VF1682-90-4I-EKE SST39VF1682-70-4C-B3K SST39VF1682-70-4C-B3KE SST39VF1682-70-4I-B3K SST39VF1682-70-4I-B3KE
Note: Valid combinations those products mass production will mass production. Consult your sales representative confirm availability valid combinations determine availability combinations.
©2003 Silicon Storage Technology, Inc.
S71243-03-000
11/03
Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
PACKAGING DIAGRAMS
1.05 0.95 Identifier 0.50
12.20 11.80
0.27 0.17
18.50 18.30
0.15 0.05
DETAIL 1.20 max. 0.70 0.50 20.20 19.80 Note: Complies with JEDEC publication MO-142 dimensions, although some dimensions more stringent. linear dimensions millimeters (max/min). Coplanarity: Maximum allowable mold flash 0.15 package ends, 0.25 between leads. 0.70 0.50
48-tsop-EK-8
48-LEAD THIN SMALL OUTLINE PACKAGE (TSOP) 12MM PACKAGE CODE:
20MM
©2003 Silicon Storage Technology, Inc.
S71243-03-000
11/03
Mbit Multi-Purpose Flash Plus SST39VF1681 SST39VF1682
VIEW
8.00 0.20
BOTTOM VIEW
5.60 0.80 0.45 0.05 (48X)
0.80 CORNER 4.00 6.00 0.20
SIDE VIEW
1.10 0.10
CORNER
SEATING PLANE 0.35 0.05
0.12
Note:
Complies with JEDEC Publication MO-210, variant 'AB-1', although some dimensions more stringent. linear dimensions millimeters. Coplanarity: 0.12 Ball opening size 0.38 0.05 48-tfbga-B3K-6x8-450mic-4
48-BALL THIN-PROFILE, FINE-PITCH BALL GRID ARRAY (TFBGA) PACKAGE CODE:
TABLE REVISION HISTORY
Number Description Date 2003 2003 2003 2003
Initial release Change product number from 166x 168x Added package associated MPNs (See page Removed Commercial temperature packages 2004 Data Book Updated package diagram
Silicon Storage Technology, Inc. 1171 Sonora Court Sunnyvale, 94086 Telephone 408-735-9110 408-735-9036 www.SuperFlash.com www.sst.com
©2003 Silicon Storage Technology, Inc. S71243-03-000 11/03
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