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Cautions Keep safety first your circuit designs! Renesas Technolo


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Cautions
Keep safety first your circuit designs! Renesas Technology Corporation puts maximum effort into making semiconductor products better more reliable, there always possibility that trouble occur with them. Trouble with semiconductors lead personal injury, fire property damage. Remember give consideration safety when making your circuit designs, with appropriate measures such placement substitutive, auxiliary circuits, (ii) nonflammable material (iii) prevention against malfunction mishap. Notes regarding these materials These materials intended reference assist customers selection Renesas Technology Corporation product best suited customer's application; they convey license under intellectual property rights, other rights, belonging Renesas Technology Corporation third party. Renesas Technology Corporation assumes responsibility damage, infringement third-party's rights, originating product data, diagrams, charts, programs, algorithms, circuit application examples contained these materials. information contained these materials, including product data, diagrams, charts, programs algorithms represents information products time publication these materials, subject change Renesas Technology Corporation without notice product improvements other reasons. therefore recommended that customers contact Renesas Technology Corporation authorized Renesas Technology Corporation product distributor latest product information before purchasing product listed herein. information described here contain technical inaccuracies typographical errors. Renesas Technology Corporation assumes responsibility damage, liability, other loss rising from these inaccuracies errors. Please also attention information published Renesas Technology Corporation various means, including Renesas Technology Corporation Semiconductor home page (http://www.renesas.com). When using information contained these materials, including product data, diagrams, charts, programs, algorithms, please sure evaluate information total system before making final decision applicability information products. Renesas Technology Corporation assumes responsibility damage, liability other loss resulting from information contained herein. Renesas Technology Corporation semiconductors designed manufactured device system that used under circumstances which human life potentially stake. Please contact Renesas Technology Corporation authorized Renesas Technology Corporation product distributor when considering product contained herein specific purposes, such apparatus systems transportation, vehicular, medical, aerospace, nuclear, undersea repeater use. prior written approval Renesas Technology Corporation necessary reprint reproduce whole part these materials. these products technologies subject Japanese export control restrictions, they must exported under license from Japanese government cannot imported into country other than approved destination. diversion reexport contrary export control laws regulations Japan and/or country destination prohibited. Please contact Renesas Technology Corporation further details these materials products contained therein.
HD151BF853
Clock Buffer Application
ADE-205-692C Preliminary Rev.3 Dec. 2002 Description
HD151BF853 high-performance, low-skew, low-jitter, clock buffer. specifically designed with (Double Data Rate) mother board application.
Features
Designed DDR200/266/333/400 mother board clock buffering Supports operation range Distributes differential clock outputs pairs Spread spectrum clock compatible External feedback (FBIN) used synchronize outputs clock input Supports analog supply voltage (AVDD), Ordering Information
Package Type SSOP-48 Package Code Package Abbreviation Taping Abbreviation (Quantity) (1,000 Reel)
Part Name HD151BF853SSEL
Note: Please consult sales office above package availability.
HD151BF853
Specifications
Supply voltages: AVDD V±0.2 Output clock cycle cycle jitter Output clock skew
Function Table
Inputs AVDD (typ.) (typ.) High level level Outputs FBOUT Bypass Bypass Running Running
Rev.3, Dec. 2002, page
HD151BF853
Arrangement
CLKIN AVDD AGND
FBIN FBOUT
(Top view)
Rev.3, Dec. 2002, page
HD151BF853
Logic Diagram
FBOUT
AVCC
Test Logic
CLKIN
FBIN
Note: inputs outputs associated with VDDQ
Rev.3, Dec. 2002, page
HD151BF853
Absolute Maximum Ratings
Item Supply voltage Input voltage Symbol Output voltage Input clamp current Output clamp current Continuous output current Maximum power dissipation 55°C still air) Storage temperature Notes: Tstg Ratings -0.5 -0.5 -0.5 VDD+0.5 -0.5 VDD+0.5 +150 Unit CLKIN Conditions
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute maximum rated conditions extended periods affect device reliability. input output negative voltage ratings exceeded input output clamp current ratings observed.
Recommended Operating Conditions
Item Supply voltage Output supply voltage input signal voltage High level input voltage High level input voltage level input voltage Output differential cross point voltage Output current Input clock slew rate Operating temperature Symbol AVDD -0.3 -0.3 -0.2 VDD+0.3 VDD+0.3 +0.2 V/ns Unit Conditions pins CLKIN FBIN CLKIN, FBIN
Note: Unused inputs must held high prevent them from floating.
Rev.3, Dec. 2002, page
HD151BF853
Electrical Characteristics
Item Input clamp voltage (All inputs) Output voltage Symbol -1.2 Unit Test Conditions -100 CLKIN, FBIN AVDD AVDD open CLKIN FBIN
VDD-0.2
Input current Analog supply current Dynamic supply current AICC DICC
Input capacitance*2 Delta input capacitance*2
-0.25
0.25
Notes: conditions shown Max, appropriate value specified under recommended operating conditions. Target design, 100% tested production.
Rev.3, Dec. 2002, page
HD151BF853
Switching Characteristics
25°C, AVDD 2.5V
Item Period jitter Half period jitter Cycle cycle jitter Static phase offset Output clock skew Application clock frequency Slew rate Stabilization time Symbol tPER tHPER tsPE fCLK(A) |75| |120| |75| |150| Unit Test Conditions Notes V/ns
Operating clock frequency fCLK(O)
Notes: Target design, 100% tested production. must able handle spread spectrum induced skew. (the specification this frequency modulation found latest Intel PC100 Registered DIMM specification) Operating clock frequency indicates range over which must able lock, which required meet other timing parameters. (Used speed system debug.) Application clock frequency indicates range over which must meet timing parameters. Assumes equal wire length loading clock output feedback path. Static phase offset does include jitter. Stabilization time time required integrated circuit obtain phase lock it's feedback signal it's reference signal after power Period jitter defines largest variation clock period, around nominal clock period. Period jitter half period jitter separate specifications that must independently each other.
Rev.3, Dec. 2002, page
HD151BF853
Note: SDRAM
Figure Clock outputs test circuit
tcycle tcycle
(tcycle (tcycle n+1)
Figure Cycle cycle jitter
Figure Output clock skew (Differential clock output)
Rev.3, Dec. 2002, page
HD151BF853
Package Dimensions
15.85
2.65
0.78
7.50
0.15 0.05
10.40 1.45
0.10
0.635 0.25
0.15 0.13
0.60
Rev.3, Dec. 2002, page
HD151BF853
Disclaimer
Hitachi neither warrants grants licenses rights Hitachi's third party's patent, copyright, trademark, other intellectual property rights information contained this document. Hitachi bears responsibility problems that arise with third party's rights, including intellectual property rights, connection with information contained this document. Products product specifications subject change without notice. Confirm that have received latest product standards specifications before final design, purchase use. Hitachi makes every attempt ensure that products high quality reliability. However, contact Hitachi's sales office before using product application that demands especially high quality reliability where failure malfunction directly threaten human life cause risk bodily injury, such aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment medical equipment life support. Design your application that product used within ranges guaranteed Hitachi particularly maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions other characteristics. Hitachi bears responsibility failure damage when used beyond guaranteed ranges. Even within guaranteed ranges, consider normally foreseeable failure rates failure modes semiconductor devices employ systemic measures such failsafes, that equipment incorporating Hitachi product does cause bodily injury, fire other consequential damage operation Hitachi product. This product designed radiation resistant. permitted reproduce duplicate, form, whole part this document without written approval from Hitachi. Contact Hitachi's sales office questions regarding this document Hitachi semiconductor products.
Sales Offices
Hitachi, Ltd.
Semiconductor Integrated Circuits Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: (03) 3270-2111 Fax: (03) 3270-5109
further information write
Hitachi Semiconductor (America) Inc. East Tasman Drive Jose,CA 95134 Tel: (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe Ltd. Electronic Components Group Whitebrook Park Lower Cookham Road Maidenhead Berkshire 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Europe GmbH Electronic Components Group Dornacher D-85622 Feldkirchen Postfach 201, D-85619 Feldkirchen Germany Tel: <49> (89) 9180-0 Fax: <49> (89) Hitachi Asia Ltd. Hitachi Tower Collyer Quay #20-00 Singapore 049318 <65>-6538-6533/6538-8577 <65>-6538-6933/6538-3877 Hitachi Asia Ltd. (Taipei Branch Office) 4/F, 167, North Road Hung-Kuo Building Taipei (105), Taiwan <886>-(2)-2718-3666 <886>-(2)-2718-8180 Telex 23222 HAS-TP Hitachi Asia (Hong Kong) Ltd. Group (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Tsui, Kowloon Hong Kong <852>-2735-9218 <852>-2730-0281
Copyright Hitachi, Ltd., 2002. rights reserved. Printed Japan.
Colophon
Rev.3, Dec. 2002, page

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