Cautions Keep safety first your circuit designs! Renesas Technolo

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Cautions
Keep safety first your circuit designs! Renesas Technology Corporation puts maximum effort into making semiconductor products better more reliable, there always possibility that trouble occur with them. Trouble with semiconductors lead personal injury, fire property damage. Remember give consideration safety when making your circuit designs, with appropriate measures such placement substitutive, auxiliary circuits, (ii) nonflammable material (iii) prevention against malfunction mishap. Notes regarding these materials These materials intended reference assist customers selection Renesas Technology Corporation product best suited customer's application; they convey license under intellectual property rights, other rights, belonging Renesas Technology Corporation third party. Renesas Technology Corporation assumes responsibility damage, infringement third-party's rights, originating product data, diagrams, charts, programs, algorithms, circuit application examples contained these materials. information contained these materials, including product data, diagrams, charts, programs algorithms represents information products time publication these materials, subject change Renesas Technology Corporation without notice product improvements other reasons. therefore recommended that customers contact Renesas Technology Corporation authorized Renesas Technology Corporation product distributor latest product information before purchasing product listed herein. information described here contain technical inaccuracies typographical errors. Renesas Technology Corporation assumes responsibility damage, liability, other loss rising from these inaccuracies errors. Please also attention information published Renesas Technology Corporation various means, including Renesas Technology Corporation Semiconductor home page (http://www.renesas.com). When using information contained these materials, including product data, diagrams, charts, programs, algorithms, please sure evaluate information total system before making final decision applicability information products. Renesas Technology Corporation assumes responsibility damage, liability other loss resulting from information contained herein. Renesas Technology Corporation semiconductors designed manufactured device system that used under circumstances which human life potentially stake. Please contact Renesas Technology Corporation authorized Renesas Technology Corporation product distributor when considering product contained herein specific purposes, such apparatus systems transportation, vehicular, medical, aerospace, nuclear, undersea repeater use. prior written approval Renesas Technology Corporation necessary reprint reproduce whole part these materials. these products technologies subject Japanese export control restrictions, they must exported under license from Japanese government cannot imported into country other than approved destination. diversion reexport contrary export control laws regulations Japan and/or country destination prohibited. Please contact Renesas Technology Corporation further details these materials products contained therein.
HB28H016C8C
CompactFlash16 MByte
ADE-203-1362B Rev. Jan. 2003 Description
HB28H016C8C CompactFlashTM. This card complies with CompactFlashspecification, suitable usage data storage memory medium other electric equipment digital still camera. This card equipped with 0.18 CMOS Mega Flash memory. This card suitable (Industry Standard Architecture) interface standard, read/write unit sector (512 bytes) sequential access. using this card possible operate good performance system which have CompactFlashslots. Note: CompactFlashis trademark SanDisk Corporation licensed royalty-free which turn will license royalty-free members. *CFA: CompactFlashAssociation.
Features
CompactFlashspecification standard pieces connector Type (3.3 3.3V single power supply operation Card density Mega bytes maximum This card equipped with 0.18 CMOS Mega Flash memory
HB28H016C8C
variations mode access Memory card mode card mode True mode Internal self-diagnostic program operates power High reliability based internal (Error Correcting Code) function Auto sleep mode Data write 100,000 cycles/block.* Note: block consists four sectors (512 byte
Card Line Up*1
Type Card density Capacity* 16,121,856 byte Total sectors/ Sectors/ card* track* 31,448 Number head Number cylinder
HB28H016C8C Notes:
These data written Total tracks number head number cylinder. Total sectors/card sectors/track number head number cylinder. logical address capacity including area which used file system.
HB28H016C8C
Card Assignment
Memory card mode Signal name -CE1 -CD2 -CD1 card mode Signal name -CE1 -IOIS16 -CD2 -CD1 True mode Signal name -CE1 -ATASEL -IOIS16 -CD2 -CD1
HB28H016C8C
Memory card mode Signal name -CE2 -VS1 -IORD -IOWR RDY/-BSY -CSEL -VS2 RESET -WAIT -INPACK -REG BVD2 BVD1 card mode Signal name -CE2 -VS1 -IORD -IOWR -IREQ -CSEL -VS2 RESET -WAIT -INPACK -REG -SPKR -STSCHG True mode Signal name -CE2 -VS1 -IORD -IOWR INTRQ -CSEL -VS2 -RESET IORDY -INPACK -REG -DASP -PDIAG
HB28H016C8C
Card Explanation
Signal name Direction Description Card Memory mode) Card mode) (True mode) BVD1 Card Memory mode) -STSCHG Card mode) -PDIAG (True mode) BVD2 Card Memory mode) -SPKR Card mode) -DASP (True mode) -CD1, -CD2 Card Memory mode) -CD1, -CD2 Card mode) -CD1, -CD2 (True mode) -CE1, -CE2 Card Memory mode) Card Enable -CE1, -CE2 Card mode) Card Enable -CE1, -CE2 (True mode) -CE2 used select Alternate Status Register Device Control Register while -CE1 chip select other task file registers. -CE1 -CE2 active card select signals. Byte/Word/Odd byte mode defined combination -CE1, -CE2 Address Only used, should grounded host. BVD1 outputs battery voltage status card. This output line constantly driven high state since battery required this product. -STSCHG used changing status Configuration status register attribute area. -PDIAG Pass Diagnostic signal Master/Slave handshake protocol. BVD2 outputs battery voltage status card. This output line constantly driven high state since battery required this product. -SPKR outputs speaker signals. This output line constantly driven high state since this product does support audio function. -DASP Disk Active/Slave Present signal Master/Slave handshake protocol. -CD1 -CD2 card detection signals. -CD1 -CD2 connected ground this card, host detect that card inserted not. Address LSB.
HB28H016C8C
Signal name Direction Description This signal used. -CSEL Card Memory mode) -CSEL Card mode) -CSEL (True mode) This signal used configure this device Master Slave when configured True mode. When this grounded, this device configured Master. When open, this device configured Slave. Data even byte word. byte word.
Card Memory mode)
Card mode) (True mode) Card Memory mode) Card mode) (True mode) -INPACK Card Memory mode) -INPACK Card mode) Input Acknowledge This signal used should connected host. This signal asserted this card when card selected responding read cycle address that address during -IORD low. This signal used input data buffer control. This signal used should connected host. This signal used. -IORD used control read data task file area. This card does respond -IORD until card interface setting -IORD used control read data task file area. This card does respond -IORD until True interface setting Ground
-INPACK (True mode) -IORD Card Memory mode) -IORD Card mode) -IORD (True mode)
HB28H016C8C
Signal name Direction Description This signal used. -IOWR used control data write task file area. This card does respond -IOWR until card interface setting -IOWR used control data write task file area. This card does respond -IOWR until True interface setting used control reading register's data attribute area task file area. used control reading register's data attribute area. enable True mode this input should grounded host. signal RDY/-BSY pin. RDY/-BSY turns level during card internal initialization operation applied reset applied, next access card should after signal turned high level. This signal active -IREQ pin. signal level indicates that card requesting software service host, high level indicates that card requesting. This signal active high Interrupt Request host. -REG used during memory cycles distinguish between task file attribute memory accesses. High task file, attribute memory accessed. -REG constantly when task file attribute memory accessed. This input signal used should connected VCC. -IOWR Card Memory mode) -IOWR Card mode) -IOWR (True mode) Card Memory mode) Card mode) -ATASEL (True mode) RDY/-BSY Card Memory mode)
-IREQ Card mode)
INTRQ (True mode) -REG Card Memory mode) Attribute memory select -REG Card mode) -REG (True mode)
HB28H016C8C
Signal name Direction Description This signal active high RESET pin. this signal asserted high, card internal initialization begins operate. During card internal initialization RDY/-BSY low. After card internal initialization RDY/-BSY high. This signal active high RESET pin. this signal asserted high, card internal initialization begins operate. this mode, RDY/-BSY signal used, using Status Register Ready/Busy status confirmed. This signal active -RESET pin. this signal asserted low, register's this card reset. this mode, RDY/-BSY signal used, using status register Ready/Busy status confirmed. +3.3 power. RESET Card Memory mode)
RESET Card mode)
-RESET (True mode)
Card Memory mode) Card mode) (True mode) -VS1, -VS2 Card Memory mode) -VS1, -VS2 Card mode) -VS1, -VS2 (True mode) -WAIT Card Memory mode) -WAIT Card mode) IORDY (True mode) Card Memory mode) Card mode) (True mode)
These signals intended notify requirement host. -VS1 held grounded -VS2 nonconnected this card.
This signal active -WAIT pin. this card this signal constantly high level.
This output signal used IORDY. this card this signal constantly high impedance. used control writing register's data attribute memory area task file area. used control writing register's data attribute memory area. This input signal used should connected host.
HB28H016C8C
Signal name Direction Description held because this card does have write protect switch. -IOIS16 asserted when task file registers accessed 16-bit mode. This output signal asserted when this device expecting word data transfer cycle. Initial mode 16-bit. user issues Feature Command device Byte access mode, card permits 8-bit accesses. Card Memory mode) Write Protect -IOIS16 Card mode) -IOIS16 (True mode)
HB28H016C8C
Card Block Diagram
internal
-CE1,-CE2 -OE/-ATASEL -IORD -IOWR -REG RESET/-RESET -CSEL BVD1/-STSCHG/-PDIAG BVD2/-SPKR/-DASP Control signal RDY/-BSY/-IREQ/INTRQ WP/-IOIS16 -INPACK -WAIT/IORDY -VS1 -VS2 -CD1 -CD2 Note: -CE1, -CE2, -OE, -WE, -IORD, -IOWR, -REG, RESET, -CSEL, -PDIAG, -DASP pins pulled card. -CE1, -CE2, -OE, -WE, -IORD, -IOWR, -REG pins schmitt trigger type input buffer. OPEN Controller Flash memory Flash memory Reset
X'tal
HB28H016C8C
Card Function Explanation
Register construction Attribute region Configuration register Configuration Option register Configuration Status register Replacement register Socket Copy register Information tructure) Task File region Data register Error register Feature register Sector Count register Sector Number register Cylinder register Cylinder High register Drive Head register Status register Alternate Status register Command register Device Control register Drive Address register
HB28H016C8C
Host access specifications Attribute access specifications
When CIS-ROM region Configuration register region accessed, read write operations executed under condition -REG follows. That region accessed Byte/Word/Odd-byte modes which defined card standard specifications. Attribute Read Access Mode
Mode Standby mode Byte access (8-bit) -REG Word access (16-bit) byte access (8-bit) Note: -CE2 -CE1 High-Z High-Z High-Z invalid invalid High-Z even byte invalid even byte High-Z
Attribute Write Access Mode
Mode Standby mode Byte access (8-bit) -REG Word access (16-bit) byte access (8-bit) Note: -CE2 -CE1 Don't care Don't care Don't care Don't care Don't care Don't care even byte Don't care even byte Don't care
Attribute Access Timing Example
-REG -CE2/-CE1 read cycle Dout write cycle
HB28H016C8C
Task File register access specifications
There cases Task File register mapping, mapped address area, other mapped Memory address area. Each case Task File register read write operations executed under condition follows. That area accessed Byte/Word/Odd Byte mode which defined card standard specifications.
address
Task File Register Read Access Mode
Mode Standby mode Byte access (8-bit)
-REG -CE2
-CE1
-IORD -IOWR
High-Z High-Z High-Z byte byte High-Z even byte byte even byte High-Z
Word access (16-bit) Note:
byte access (8-bit)
Task File Register Write Access Mode
Mode Standby mode Byte access (8-bit) -REG -CE2 Word access (16-bit) Note: -CE1 -IORD -IOWR Don't care Don't care Don't care even byte Don't care byte byte byte even byte Don't care
byte access (8-bit)
Task File Register Access Timing Example
-REG -CE2/-CE1 -IORD IOWR read cycle Dout write cycle
HB28H016C8C
Memory address
Task File Register Read Access Mode
Mode Standby mode Byte access (8-bit) -REG -CE2 Word access (16-bit) Note: -CE1 -IORD -IOWR High-Z High-Z High-Z byte byte High-Z even byte byte even byte High-Z
byte access (8-bit)
Task File Register Write Access Mode
Mode Standby mode Byte access (8-bit) -REG -CE2 Word access (16-bit) Note: -CE1 -IORD -IOWR Don't care Don't care Don't care even byte Don't care byte byte byte even byte Don't care
byte access (8-bit)
Task File Register Access Timing Example
-REG -CE2/-CE1 read cycle Dout write cycle
HB28H016C8C
True Mode
card configured True mode operation. This card configured this mode only when input signal asserted host. this True mode Attribute Registers accessible from host. Only operation task file data register allowed. this card configured during power sequence, data register accessed word (16-bit). card permits 8-bit accesses user issues Feature Command device 8-bit mode. True Mode Read Function
Mode Invalid mode Standby mode Data register access Alternate status access Other task file access Note: -CE2 -CE1 -IORD 1-7H -IOWR High-Z High-Z byte High-Z High-Z High-Z High-Z even byte status data
True Mode Write Function
Mode Invalid mode Standby mode Data register access Control register access Other task file access Note: -CE2 -CE1 -IORD 1-7H -IOWR don't care don't care byte don't care don't care don't care don't care even byte control data
True Mode Access Timing Example
-IORD -IOWR -IOIS16 read cycle Dout write cycle
HB28H016C8C
Configuration register specifications This card supports four Configuration registers purpose configuration observation this card. These registers used memory card mode card mode. True mode, these registers used. Configuration Option register (Address 200H)
This register used configuration card configuration status issuing soft reset card.
bit7 SRESET bit6 LevlREQ bit5 INDEX bit4 bit3 bit2 bit1 bit0
Note: initial value:
Name SRESET (HOST->)
Function Setting this "1", places card reset state (Card Hard Reset). This operation equal Hard Reset, except this cleared. Then this "0", places card reset state Hard Reset (This Hard Reset) Card configuration status reset card internal initialized operation starts when Card Hard Reset executed, next access card should same sequence power sequence. This sets when pulse mode interrupt selected, when level mode interrupt selected. This bits used select operation mode card follows. When Power Card Hard Reset Soft Reset, this data "000000" purpose Memory card interface recognition.
LevlREQ (HOST->) INDEX (HOST->)
INDEX assignment
INDEX Card mode Memory card card card card Task File register address 400H 7FFH xx0H xxFH 1F0H 1F7H, 3F6H 3F7H 170H 177H, 376H 377H Mapping mode memory mapped contiguous mapped primary mapped secondary mapped
HB28H016C8C
Configuration Status register (Address 202H)
This register used observing card state.
bit7 CHGED bit6 SIGCHG bit5 IOIS8 bit4 bit3 bit2 bit1 INTR bit0
Note: initial value:
Name CHGED (CARD->) SIGCHG (HOST->)
Function This indicates that CRDY/-BSY Replacement register "1". When CHGED "1", -STSCHG held condition SIGCHG card configured interface. This reset host enabling disabling status-change signal (STSCHG pin). When card configured card interface this "1", STSCHG controlled CHGED bit. this "0", -STSCHG kept "H". host sets this field when provide cycles only with 8-bit data D0). When this "1", card enters sleep state (Power Down mode). When this reset "0", card transfers idle state (active mode). RRDY/-BSY Replacement Register becomes BUSY when this changed. RRDY/-BSY will become Ready until power state requested been entered. This card automatically powers down when idle, powers back when receives command. This indicates internal state interrupt request. This state available whether card interface been configured not. This signal remains true until condition which caused interrupt request been serviced. interrupts disabled -IEN Device Control Register, this zero.
IOIS8 (HOST->) (HOST->)
INTR (CARD->)
HB28H016C8C
Replacement register (Address 204H)
This register used providing signal state -IREQ signal when card configured card interface.
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
CRDY/-BSY
RRDY/-BSY
Note: initial value:
Name
Function This when RRDY/-BSY changes state. This also written host. When read, this indicates +READY states. When written, this used CRDY/-BSY masking.
CRDY/-BSY (HOST->) RRDY/-BSY (HOST->)
Socket Copy register (Address 206H)
This register used identification card from other cards. Host read write this register. This register should host before this card's Configuration Option register set.
bit7 bit6 bit5 bit4 DRV# bit3 bit2 bit1 bit0
Note: initial value:
Name DRV# (HOST->)
Function This fields used configuration plural cards. When host configures plural cards, written card's copy number this field. this way, host perform card's master/slave organization.
HB28H016C8C
informations informations defined follows. reading attribute address from "0000 card informations confirmed.
Address Data 000H 002H 004H Description contents Device info tuple Link length byte function Tuple code Link next tuple
CISTPL_DEVICE TPL_LINK
Device type
Device speed Device type device Device type, WPS, speed Device speed speed Speed exponent units wait byte address space device Other conditions device info tuple Link length bytes MWAIT wait used Extended speed Device size marker Tuple code Link next tuple Other conditions info field
006H 008H 00AH 00CH 00EH 010H 012H
Speed mantissa
List marker CISTPL_DEVICE_OC TPL_LINK Reserved
Device type
Device speed Device type device Device type, WPS, speed Device speed units byte address space device Device size marker
014H 016H 018H 01AH 01CH 01EH 020H 022H 024H 026H
List marker CISTPL_JEDEC_C TPL_LINK
JEDEC common memory Tuple code Link length bytes Link next tuple JEDEC Card
PCMCIA's manufacturer's JEDEC Manufacturer's code code PCMCIA JEDEC device code CISTPL_MANFID TPL_LINK byte PCMCIA manufacturer's code High byte PCMCIA manufacturer's code byte product code High byte product code byte JEDEC Manufacturer's code Link length bytes HITACHI JEDEC manufacturer's
Tuple code Link next tuple byte manufacturer's code
Code because other byte High byte manufacturer's JEDEC byte code manufacture's HITACHI code CARD byte product code High byte product code
028H 02AH
HB28H016C8C
Address Data 02CH 02EH 030H 032H 034H 036H 038H 03AH 03CH 03EH 040H 042H 044H 046H 048H 04AH 04CH 04EH 050H 052H 054H 056H 058H 05AH 05CH 05EH 060H List marker CISTPL_FUNCID TPL_LINK TPLFID_FUNCTION Reserved Description contents Level version/product info Link length bytes PCMCIA2.0/JEIDA4.1 PCMCIA2.0/JEIDA4.1 Null terminator Null terminator Null terminator device Function tuple Link length bytes marker Tuple code Link next tuple Vender specific strings Info string function Tuple code Link next tuple Major version Minor version Info string CISTPL_VERS_1 TPL_LINK TPPLV1_MAJOR TPPLV1_MINOR
Disk function, silicon, card function code removable BIOS Configure card power System initialization byte
HB28H016C8C
Address Data 062H 064H 066H 068H 06AH 06CH 06EH 070H Description contents Function extension tuple Link length bytes function Tuple code Link next tuple Extension tuple type disk Interface type Tuple code Link next tuple Extension tuple type disk Basic option parameters byte CISTPL_FUNCE TPL_LINK
Disk function extension tuple type Disk interface type Disk interface type CISTPL_FUNCE TPL_LINK card interface Function extension tuple Link length bytes
Disk function extension tuple type Single drive silicon, single drive required Silicon Unique serial Single drive card
Reserved
072H
Sleep mode supported Basic option parameters byte Standby mode supported Idle mode suppported Drive auto power control Some config excludes Index emulated Twin IOIS16# data only Reserved Configuration tuple Link length bytes Tuple code Link next tuple
074H 076H 078H
CISTPL_CONFIG TPL_LINK
Size fields byte TPCC_SZ RFS: Reserved RMS: TPCC_RMSK size RAS: TPCC_RADR size byte register mask byte config base address Entry with config index final entry table Configuration registers located 200H space Last entry config registers Location config registers
07AH 07CH
TPCC_LAST TPCC_RADR (LSB)
07EH 080H
TPCC_RADR (MSB) Reserved Configuration index Configuration status replacement Socket copy Configuration registers present mask TPCC_RMSK
HB28H016C8C
Address Data 082H 084H 086H Description contents Configuration table entry tuple Link length bytes Memory mapped configuration Interface byte follows Default entry Configuration index Wait used Ready active used BVD1 BVD2 used type Memory interface function Tuple code Link next tuple Configuration table index byte TPCE_INDX CISTPL_CFTABLE_ENTRY TPL_LINK Configuration index
088H
Interface type
Interface description field TPCE_IF
08AH
Feature selection byte Misc info present Memory space info TPCE_FS single 2-byte length interrupt info present port info present timing info present only info Nominal voltage only follows Power parameters Reserved Power down current info Peak current info Average current info Static current info voltage info voltage info Nominal voltage info Nominal voltage nominal value
08CH
08EH 090H 092H 094H
Mantissa
Exponent
Length bytes pages (LSB) Length bytes pages (MSB)
Length memory space Memory space description structures (TPCE_MS)
Miscellaneous features field more misc fields TPCE_MI Reserved Power down supported read only mode Audio supported Single drive
HB28H016C8C
Address Data 096H 098H 09AH Description contents Configuration table entry tuple Link length bytes Memory mapped configuration Interface byte Default entry Configuration index function Tuple code Link next tuple Configuration table index byte TPCE_INDX CISTPL_CFTABLE_ENTRY TPL_LINK Configuration index
09CH
Feature selection byte Misc info Memory space TPCE_FS info interrupt info present port info present timing info present only info Nominal voltage only follows Power parameters Reserved Power down current info Peak current info Average current info Static current info voltage info voltage info Nominal voltage info Nominal voltage +0.3 nominal value Extension byte
09EH
0A0H 0A2H 0A4H
Mantissa Extension Mantissa
Exponent
Exponent
average current over Max. average current msec
HB28H016C8C
Address Data 0A6H 0A8H 0AAH Description contents Configuration table entry tuple Link length bytes function Tuple code Link next tuple CISTPL_CFTABLE_ENTRY TPL_LINK Configuration INDEX
Contiguous mapped Configuration table index byte TPCE_INDX registers configuration Interface byte follows Default entry Configuration index Wait used Ready active used BVS1 BVD2 used type interface Interface description field TPCE_IF
0ACH
Interface type
0AEH
Misc info present Feature selection byte memory space TPCE_FS info Interrupt info present port info present timing info present only info Nominal voltage only follows Power parameters Reserved Power down Current info Peak current info Average current info Static current info voltage info voltage info Nominal voltage info Nominal voltage nominal value
0B0H
0B2H 0B4H
Mantissa
Exponent
AddrLine
16-bit hosts supported space description field 8-bit hosts supported TPCE_IO AddrLine: lines decoded Interrupt request description Share logic active structure Pulse mode TPCE_IR supported Level mode supported mask IRQs present vender unique error check
0B6H
HB28H016C8C
Address Data 0B8H Description contents function IRQ0 IRQ8 level routed Mask extension byte recommended TPCE_IR Recommended routing Maskextension byte "normal, maskable" IRQ. TPCE_IR Miscellaneous features field Nomore misc fields TPCE_MI reserved Power down supported read only mode Audio supported Single drive
0BAH
0BCH
HB28H016C8C
Address Data 0BEH 0C0H 0C2H Description contents Configuration table entry tuple Link length bytes function Tuple code Link next tuple CISTPL_CFTABLE_ENTRY TPL_LINK Configuration index
Contiguous mapped Configuration table index byte registers configuration TPCE_INDX Interface byte Default entry Configuration index Feature selection byte Misc info Memory space TPCE_FS info interrupt info present port info present timing info present only info Nominal voltage only follows Power parameters Reserved Power down current info Peak current info Average current info Static current info voltage info voltage info Nominal voltage info Nominal voltage +0.3 nominal value Extension byte
0C4H
0C6H
0C8H 0CAH 0CCH
Mantissa Extension Mantissa
Exponent
Exponent
average current over Max. average current msec
HB28H016C8C
Address Data 0CEH 0D0H 0D2H Description contents Configuration table entry tuple Link length bytes primary mapped configuration Interface byte follows default entry follows Configuration index Wait used Ready active used BVS1 BVD2 used type interface function Tuple code Link next tuple Configuration table index byte TPCE_INDX CISTPL_CFTABLE_ENTRY TPL_LINK Configuration INDEX
0D4H
Interface type
Interface description field TPCE_IF
0D6H
misc info present Feature selection byte memory space TPCE_FS info Interrupt info present port info present timing info present only info Nominal voltage only follows Power parameters Reserved Power down Current info Peak current info Average current info Static current info voltage info voltage info Nominal voltage info Nominal voltage nominal value
0D8H
0DAH 0DCH
Mantissa
Exponent
AddrLine
space description field Range follows 16-bit hosts supported TPCE_IO 8-bit hosts supported AddrLines: lines decoded Size lengths range format description byte Size address bytes Range Address range
0DEH
range
HB28H016C8C
Address Data 0E0H 0E2H 0E4H 0E6H 0E8H 0EAH 0ECH level Description contents base address (LSB) base address (MSB) length base address (LSB) base address (MSB) length Share logic active Pulse mode supported Level mode supported mask IRQs present level IRQ14 range length Interrupt request description structure TPCE_IR range length range address
function range address
0EEH
Miscellaneous features field Nomore misc fields TPCE_MI reserved Power down supported read only mode Audio supported Single drive
HB28H016C8C
Address Data 0F0H 0F2H 0F4H Description contents Configuration table entry tuple Link length bytes primary mapped configuration Interface byte Default entry Configuration index function Tuple code Link next tuple Configuration table index byte TPCE_INDX CISTPL_CFTABLE_ENTRY TPL_LINK Configuration index
0F6H
Feature selection byte Misc info Memory space TPCE_FS info interrupt info present port info present timing info present only info Nominal voltage only follows Power parameters Reserved Power down current info Peak current info Average current info Static current info voltage info voltage info Nominal voltage info Nominal voltage +0.3 nominal value Extension byte
0F8H
0FAH 0FCH 0FEH
Mantissa Extension Mantissa
Exponent
Exponent
average current over Max. average current msec
HB28H016C8C
Address Data 100H 102H 104H Description contents Configuration table entry tuple Link length bytes secondary mapped configuration Interface byte follows default entry Configuration index Wait used Ready active used BVS1 BVD2 used type interface function Tuple code Link next tuple Configuration table index byte TPCE_INDX CISTPL_CFTABLE_ENTRY TPL_LINK Configuration INDEX
106H
Interface type
Interface description field TPCE_IF
108H
misc info present Feature selection byte memory space TPCE_FS info Interrupt info present port info present timing info present only info Nominal voltage only follows Power parameters Reserved Power down Current info Peak current info Average current info Static current info voltage info voltage info Nominal voltage info Nominal voltage nominal value
10AH
10CH 10EH
Mantissa
Exponent
AddrLine
space description field Range follows 16-bit hosts supported TPCE_IO 8-bit hosts supported AddrLines: lines decoded Size lengths range format description byte Size address bytes Range Address range
110H
range
HB28H016C8C
Address Data 112H 114H 116H 118H 11AH 11CH 11EH level Description contents base address (LSB) base address (MSB) length base address (LSB) base address (MSB) length Share logic active Pulse mode supported Level mode supported mask IRQs present level IRQ14 range length Interrupt request description structure TPCE_IR range length range address
function range address
120H
Miscellaneous features field Nomore misc fields TPCE_MI reserved Power down supported read only mode Audio supported Single drive
HB28H016C8C
Address Data 122H 124H 126H Description contents Configuration table entry tuple Link length bytes secondary mapped configuration Interface byte Default entry Configuration index function Tuple code Link next tuple Configuration table index byte TPCE_INDX CISTPL_CFTABLE_ENTRY TPL_LINK Configuration index
128H
Feature selection byte Misc info Memory space TPCE_FS info interrupt info present port info present timing info present only info Nominal voltage only follows Power parameters Reserved Power down current info Peak current info Average current info Static current info voltage info voltage info Nominal voltage info Nominal voltage +0.3 nominal value Extension byte
12AH
12CH 12EH 130H 132H 134H 136H
Mantissa Extension Mantissa
Exponent
Exponent
average current over Max. average current msec link control tuple Link bytes list tuple Tuple code Link next tuple Tuple code
CISTPL_NO_LINK
CISTPL_END
HB28H016C8C
Task File register specification These registers used reading writing storage data this card. These registers mapped five types configuration INDEX Configuration Option register. decoded addresses shown follows. Memory (INDEX
-REG Offset Data register Error register Sector count register Data register Feature register Sector count register
Sector number register Sector number register Cylinder register Cylinder high register Drive head register Status register Cylinder register Cylinder high register Drive head register Command register
Dup. even data register Dup. even data register Dup. data register Dup. error register Alt. status register Drive address register Even data register data register Dup. data register Dup. feature register Device control register Reserved Even data register data register
HB28H016C8C
Contiguous (INDEX
-REG Offset -IORD Data register Error register Sector count register Sector number register Cylinder register Cylinder high register Drive head register Status register -IOWR Data register Feature register Sector count register Sector number register Cylinder register Cylinder high register Drive head register Command register
Dup. even data register Dup. even data register Dup. data register Dup. error register Alt. status register Drive address register Dup. data register Dup. feature register Device control register Reserved
Primary (INDEX
-REG -IORD Data register Error register Sector count register Sector number register Cylinder register Cylinder high register Drive head register Status register Alt. status register Drive address register -IOWR Data register Feature register Sector count register Sector number register Cylinder register Cylinder high register Drive head register Command register Device control register Reserved
HB28H016C8C
Secondary (INDEX
-REG -IORD Data register Error register Sector count register Sector number register Cylinder register Cylinder high register Drive head register Status register Alt. status register Drive address register -IOWR Data register Feature register Sector count register Sector number register Cylinder register Cylinder high register Drive head register Command register Device control register Reserved
True Mode
-CE2 -CE1 -IORD Data register Error register Sector count register Sector number register Cylinder register Cylinder high register Drive head register Status register Alt. status register Drive address register -IOWR Data register Feature register Sector count register Sector number register Cylinder register Cylinder high register Drive head register Command register Device control register Reserved
HB28H016C8C
Data register: This register 16-bit register that read/write ability, used transferring sector data between card host. This register accessed word mode byte mode. This register overlaps Error Feature register.
bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Error register: This register read only register, used analyzing error content card accessing. This register valid when Status register Alternate Status register (Ready).
bit7 bit6 bit5 bit4 IDNF bit3 bit2 ABRT bit1 bit0 AMNF
Name (Bad BlocK detected) (Data error) IDNF Found) ABRT (ABoRTed command)
Function This when Block detected requested field. This when Uncorrectable error occurred reading card. requested sector error cannot found. This command been aborted because card status condition. (Not ready, Write fault, Invalid command, etc.)
AMNF (Address Mark Found) This case general error.
Feature register: This register write only register, provides information regarding features drive which host wishes utilize.
bit7 bit6 bit5 bit4 bit3 Feature byte bit2 bit1 bit0
Sector count register: This register contains numbers sectors data requested transferred read write operation between host card. value this register zero, count sectors specified. plural sector transfer, successfully completed, register contains number sectors which need transferred order complete request. This register's initial value "01H".
bit7 bit6 bit5 bit4 bit3 Sector count byte bit2 bit1 bit0
HB28H016C8C
Sector number register: This register contains starting sector number which started following sector transfer command.
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Sector number byte
Cylinder register: This register contains 8-bit starting cylinder address which started following sector transfer command.
bit7 bit6 bit5 bit4 bit3 Cylinder byte bit2 bit1 bit0
Cylinder high register: This register contains high 8-bit starting cylinder address which started following sector transfer command.
bit7 bit6 bit5 bit4 bit3 Cylinder high byte bit2 bit1 bit0
Drive head register: This register used selecting Drive number head number following command.
bit7 bit6 bit5 bit4 bit3 Head number bit2 bit1 bit0
Note: DRV: Drive number Head number: Head number Name Function This "1". flag select either Cylinder Head Sector (CHS) Logical Block Address (LBA) mode. When mode selected. When mode selected. mode, Logical Block Address interrupted follows: LBA07 LBA00: Sector Number Register LBA15 LBA08: Cylinder Register LBA23 LBA16: Cylinder High Register LBA27 LBA24: Drive Head Register bits HS0. This "1". This used selecting Master (Card Slave (Card Master/Slave organization. card Card using DRV# Socket Copy register. This used selecting Head number following command. MSB.
(DRiVe select)
Head number
HB28H016C8C
Status register: This register read only register, indicates card status command execution. When this register read configured card mode (INDEX level interrupt mode, -IREQ negated. This register should accessed byte mode. word mode, recommended that Alternate status register used this register.
bit7 bit6 DRDY bit5 bit4 bit3 bit2 CORR bit1 bit0
Name (BuSY) DRDY (Drive ReaDY)
Function This when card internal operation executing. When this "1", other bits this register invalid. this "1", card capable receiving read write seek requests. this "0", card prohibits these requests. This this card indicates write fault status. This when drive seek complete. This when information transferred between host Data register. This cleared when card receives other command. This when correctable data error been occurred data been corrected. This always "0". This when previous command ended some type error. error information other Status register Error register. This cleared next command.
(Drive Write Fault) (Drive Seek Complete) (Data ReQuest)
CORR (CORRected data) (InDeX) (ERRor)
Alternate status register: This register same Status register physically, assignment refers previous item Status register. this register different from Status register that -IREQ negated when data read. Command register: This register write only register, used writing command executing drive operation. command code written command register, after parameter written Task File during card Ready state.
HB28H016C8C
Used parameter Command Check power mode Execute drive diagnostic Erase sector Format track Identify Drive Idle Idle immediate Initialize drive parameters Read buffer Read multiple Read long sector Read sector Read verify sector Recalibrate Request sense Seek features multiple mode sleep mode Stand Stand immediate Translate sector Wear level Write buffer Write long sector Write multiple Write multiple erase Write sector Write sector erase Write verify Command code
HB28H016C8C
Note: Feature register Sector Count register Sector Number register Cylinder register Drive Head register Head Number Drive Head register LBA: Logical Block Address Mode Supported register contains valid parameter this command. register does contain valid parameter this command.
HB28H016C8C
Device control register: This register write only register, used controlling card interrupt request issuing soft reset card.
bit7 bit6 bit5 bit4 bit3 bit2 SRST bit1 nIEN bit0
Name
Function don't care This "1". This order force card perform Task File Reset operation. This does change Card Configuration registers Hardware Reset does. card remains Reset until this reset "0". This used enabling -IREQ. When this "0", -IREQ enabled. When this "1", -IREQ disabled. This "0".
SRST (Software ReSeT)
nIEN (Interrupt ENable)
Drive Address register: This register read only register, used confirming drive status. This register provides compatibility with disk drive interface. recommended that this register mapped into host's space because potential conflicts bit7.
bit7 bit6 nWTG bit5 nHS3 bit4 nHS2 bit3 nHS1 bit2 nHS0 bit1 nDS1 bit0 nDS0
Name nWTG (WriTing Gate)
Function This unknown. This unknown. These bits negative value Head Select bits (bit Drive/Head register. This unknown. This unknown.
nHS3-0 (Head Select3-0) nDS1 (Idrive Select1) nDS0 (Idrive Select0)
HB28H016C8C
Command specifications This table summarizes command with paragraphs. Following shows support commands command codes which written command registers. Command
Command Check power mode Execute drive diagnostic Erase sector(s) Format track Identify Drive Idle Idle immediate Initialize drive parameters Read buffer Read multiple Read long sector Read sector Read verify sector Recalibrate Request sense Seek features multiple mode sleep mode Stand Stand immediate Translate sector Wear level Write buffer Write long sector Write multiple Write multiple erase Write sector Write sector(s) erase Write verify Code 22H, 20H, 40H,
HB28H016C8C
Note: Feature Register Sector Count register (00H FFH) Sector Number register (01H 20H) Cylinder Low/High register (to) Drive Drive/Head register Head No.(0 Drive/Head register Heads
Check Power Mode (code: 98H): This command checks power mode. Execute Drive Diagnostic (code: implemented Card. 90H): This command performs internal diagnostic tests
Erase Sector(s) (code: C0H): This command used erase data sectors. Format Track (code: 50H): This command writes desired head cylinder selected drive. selected sector data exchange. This card excepts sector buffer data from host follow command with same protocol Write Sector command. Identify Drive (code: ECH): This command enables host receive parameter information from Card.
HB28H016C8C
Identify Drive Information
Word address Default value Total bytes 848AH XXXX 0000H 00XXH 0000H XXXX XXXX XXXX 0000H XXXX 0002H 0002H 0004H XXXX 0001H 0000H 0200H 0000H 0100H 0000H XXXX 010XH XXXX 0000H Data field type information General configuration bit-significant information Default number cylinders Reserved Default number heads Number unformatted bytes track Number unformatted bytes sector Default number sectors track Number sectors card (Word7 MSW, Word8 Reserved Reserved Buffer type (dual ported) Buffer size byte increments bytes passed Read/Write Long Commands Firmware revision ASCII etc. Maximum sector Read/Write Multiple command Double Word supported Capabilities: Supported (bit8), supported (bit9) Reserved data transfer cycle timing mode data transfer cycle timing mode Supported Reserved Multiple sector setting valid Total number sectors addressable Mode Reserved
Idle (code: 97H): This command causes Card BSY, enter Idle mode, clear generate interrupt. sector count non-zero, automatic power down mode enabled. sector count zero, automatic power down mode disabled. Idle Immediate (code: 95H): This command causes Card BSY, enter Idle (Read) mode, clear generate interrupt. Initialize Drive Parameters (code: 91H): This command enables host number sectors track number heads cylinder. Read Buffer (code: E4H): This command enables host read current contents card's sector buffer.
HB28H016C8C
Read Multiple (code: C4H): This command performs similarly Read Sectors command. Interrupts generated each sector, transfer block which contains number sectors defined Multiple command. Read Long Sector (code: 23H): This command performs similarly Read Sector(s) command except that returns bytes data instead bytes. Read Sector(s) (code: 20H, 21H): This command reads from sectors specified Sector Count register. sector count requests sectors. transfer begins sector specified Sector Number register. Read Verify Sector(s) (code: 41H): This command identical Read Sectors command, except that never data transferred host Recalibrate (code: 1XH): This command effectively command Card provided compatibility purposes. Request Sense (code: 03H): This command requests extended error code after command ends with error. Seek (code: 7XH): This command effectively command Card although does perform range check. Features (code: EFH): This command used host establish select certain features.
Feature Operation Enable 8-bit data transfers. Disable Read Look Ahead. Disable Power Reset(POR) establishment defaults Soft Reset. Disable 8-bit data transfer. 4bytes data apply Read/Write Long commands. Enable Power Reset(POR) establishment default Soft Reset.
Multiple Mode (code: C6H): This command enables Card perform Read Write Multiple operations establishes block count these commands. Sleep Mode (code: 99H): This command causes Card BSY, enter Sleep mode, clear generate interrupt. Stand (code: 96H): This command causes Card BSY, enter Sleep mode (which corresponds "Standby" Mode), clear return interrupt immediately. Stand Immediate (code: 94H): This command causes Card BSY, enter Sleep mode(which corresponds "Standby" Mode), clear return interrupt immediately.
HB28H016C8C
Translate Sector (code: 87H): This card does support this command function determining exact number times user sector been erased programmed because this card always responds with "00H", though this command could provide information containing desired cylinder, head sector, including Logical Address, etc. Wear level (code: F5H): This command effectively command only implemented backward compatibility. Sector Count Register will always returned with indicating Wear Level needed. Write Buffer (code: E8H): This command enables host overwrite contents Card's sector buffer with data pattern desired. Write Long Sector (code: 33H): This command provided compatibility purposes similar Write Sector(s) command except that writes bytes instead bytes. Write Multiple (code: C5H): This command similar Write Sectors command. Interrupts presented each sector, transfer block which contains number sectors defined Multiple command. Write Multiple without Erase (code: CDH): This command similar Write Multiple command with exception that implied erase before write operation performed. Write Sector(s) (code: 31H): This command writes from sectors specified Sector Count register. sector count zero requests sectors. transfer begins sector specified Sector Number register. Write Sector(s) without Erase (code: 38H): This command similar Write Sector(s) command with exception that implied erase before write operation performed. Write Verify (code: This command similar Write Sector(s) command, except each sector verified immediately after being written.
HB28H016C8C
Sector Transfer Protocol Sector read: sector read procedure after card configured interface shown follows.
Start cylinder high register
Access, INDEX=1
head drive head register (1)Set logical sector number sector number register "01H" sector count register
"20H" Command register
Read status register "58H"? Read times data register (512 bytes) (4)Burst data transfer
Read status register "50H"? Wait command input
HB28H016C8C
-CE1 -CE2 -IOWR -IORD -IREQ 01H20H Data transfer
HB28H016C8C
Sector write: sector write procedure after card configured interface shown follows.
Start cylinder high register
Access, INDEX=1
head drive head register logical sector number sector number register "01H" sector count register
"30H" command register
Read status register "58H"? Write times data register (512 bytes) Burst data transfer
Read status register "50H"? Wait command input
HB28H016C8C
-CE1 -CE2 -IOWR -IORD -IREQ 01H30H Data transfer
HB28H016C8C
Absolute Maximum Ratings
Parameter input/output voltages voltage Operating temperature range Storage temperature range Note: Symbol Vin, Vout Topr Tstg Value -0.3 -0.3 +6.5 Unit Note
Vin, Vout -2.0 pulse width
Recommended Operating Conditions
Parameter Operating temperature voltage Symbol Unit
Capacitance 25°C, 1MHz)
Parameter Input capacitance Output capacitance Symbol Cout Unit Test conditions Vout
System Performance
Item times (Reset ready) times (Sleep idle) Data transfer rate to/from host Controller overhead (Command DRQ) Data transfer cycle ready (Sector write) Performance (max) (max) MB/s burst (max) (typ)
HB28H016C8C
Characteristics-1 +60°C, 10%,
Parameter Input leakage current Output voltage Symbol Note: Unit Test conditions Note
Except pulled input pin. Unit Test conditions
Parameter Input voltage (CMOS)
Symbol
Input voltage (Schmitt trigger)
Characteristics-2 +60°C, 10%)
16MB Parameter Sleep/ standby current Symbol Unit Test conditions CMOS level (control signal Memory card mode card mode) CMOS level (control signal during sector read transfer CMOS level (control signal during sector write transfer CMOS level (control signal
Sector read current
(RMS)*1 (RMS)*1 (Peak)
Sector write current
Read/Write current peak Note:
mA/50 µs*2
Average value operation current time sector transfer. Reference value.
HB28H016C8C
Characteristics-3 +60°C,
16MB Parameter Sleep/ standby current Sector read current Symbol Unit Test conditions CMOS level (control signal Memory card mode card mode) CMOS level (control signal during sector read transfer CMOS level (control signal during sector write transfer CMOS level (control signal
(RMS)*1 (RMS)*1 (Peak)
Sector write current
Read/Write current peak Note:
mA/50 µs*2
Average value operation current time sector transfer. Reference value.
HB28H016C8C
Characteristics +60°C, 10%,
Attribute Memory Read Characteristics
Parameter Read cycle time Address access time access time access time Output disable time (-CE) Output disable time (-OE) Output enable time (-CE) Output enable time (-OE) Data valid time Address setup time Address hold time setup time hold time Symbol ta(A) ta(CE) ta(OE) tdis(CE) tdis(OE) ten(CE) ten(OE) tv(A) tsu(A) th(A) Unit
tsu(CE) th(CE)
Attribute Memory Read Timing
-REG ta(A) ta(CE) -CE2/-CE1 tsu(A) ten(OE) ten(CE) Valid Output -WE, -IOWR, -IORD High tdis(OE) tsu(CE) ta(OE) th(CE) tdis(CE) th(A) tv(A)
HB28H016C8C
Attribute Memory Write Characteristics
Parameter Write cycle time Write pulse time Address setup time Address setup time (-WE) setup time (-WE) Data setup time (-WE) Data hold time Write recover time Output disable time (-WE) Output disable time (-OE) Output enable time (-WE) Output enable time (-OE) Output enable setup time (-WE) Output enable hold time (-WE) setup time hold time Symbol tw(WE) tsu(A) tsu(A-WEH) tsu(CE-WEH) tsu(D-WEH) th(D) trec(WE) tdis(WE) tdis(OE) ten(WE) ten(OE) tsu(OE-WE) th(OE-WE) Unit
tsu(CE) th(CE)
Attribute Memory Write Timing
-REG tsu(CE-WEH) -CE2/-CE1 tsu(A) D15(Din) tdis(OE) D15(Dout) ten(WE) -IOWR, -IORD High tdis(WE) tsu(OE-WE) tw(WE) tsu(D-WEH) Input Data ten(OE) trec(WE) th(OE-WE) th(D) tsu(A-WEH) tsu(CE) th(CE)
HB28H016C8C
Access Read Characteristics
Parameter Data delay after -IORD Data hold following -IORD -IORD pulse width Address setup before -IORD Address hold following -IORD setup before -IORD hold following -IORD -REG setup before -IORD -REG hold following -IORD -INPACK delay falling from -IORD -INPACK delay rising from -IORD -IOIS16 delay falling from address -IOIS16 delay rising from address Symbol td(IORD) th(IORD) tw(IORD) tsuA(IORD) thA(IORD) tsuCE(IORD) thCE(IORD) tsuREG(IORD) thREG(IORD) Unit
tdfINPACK(IORD) tdrINPACK(IORD) tdfIOIS16(ADR) tdrIOIS16(ADR)
Access Read Timing
thA(IORD) tsuREG(IORD) thREG(IORD) -REG tsuCE(IORD) -CE2/-CE1 tw(IORD) -IORD tsuA(IORD) -INPACK tdfIOIS16(ADR) tdfINPACK(IORD) -IOIS16 th(IORD) td(IORD) -WE, -OE, -IOWR High
Valid Output
thCE(IORD)
tdrINPACK(IORD)
tdrIOIS16(ADR)
HB28H016C8C
Access Write Characteristics
Parameter Data setup before -IOWR Data hold following -IOWR -IOWR pulse width Address setup before -IOWR Address hold following -IOWR setup before -IOWR hold following -IOWR -REG setup before -IOWR -REG hold following -IOWR -IOIS16 delay falling from address -IOIS16 delay rising from address Symbol tsu(IOWR) th(IOWR) tw(IOWR) tsuA(IOWR) thA(IOWR) tsuCE(IOWR) thCE(IOWR) tsuREG(IOWR) thREG(IOWR) tdfIOIS16(ADR) tdrIOIS16(ADR) Unit
Access Write Timing
thA(IOWR) tsuREG(IOWR) thREG(IOWR) -REG tsuCE(IOWR) -CE2/-CE1 tsuA(IOWR) tw(IOWR) -IOWR tdfIOIS16(ADR) -IOIS16 tsu(IOWR) Data -WE, -OE, -IORD High th(IOWR) tdrIOIS16(ADR) thCE(IOWR)
HB28H016C8C
Common Memory Access Read Characteristics
Parameter access time Output disable time (-OE) Address setup time Address hold time setup time hold time Symbol ta(OE) tdis(OE) tsu(A) th(A) tsu(CE) th(CE) Unit
Common Access Read Timing
tsu(A) -REG -CE2/-CE1 tsu(CE) ta(OE) tdis(OE)
Valid Output
th(A)
th(CE)
-WE, -IORD, -IOWR High
HB28H016C8C
Common Memory Access Write Characteristics
Parameter Data setup time (-WE) Data hold time Write pulse time Address setup time setup time Write recover time hold following Symbol tsu(D-WEH) th(D) tw(WE) tsu(A) tsu(CE) trec(WE) th(CE) Unit
Common Access Write Timing
-REG tsu(CE) -CE2/-CE1 tsu(A) tw(WE) tsu(D-WEH) th(D) th(CE)
trec(WE)
Data
-IOWR, -IORD, High
HB28H016C8C
True Mode Access Read Characteristics
Parameter data delay after IORD data hold following IORD IORD width time address setup before IORD address hold following IORD setup before IORD hold following IORD IOIS16 delay falling from address IOIS16 delay rising from address Symbol td(IORD) th(IORD) tw(IORD) tsuA(IORD) thA(IORD) tsuCE(IORD) thCE(IORD) tdfIOIS16(ADR) tdrIOIS16(ADR) Unit
True Mode Access Read Timing
tsuA(IORD) -CE2/-CE1 -IORD td(IORD) -IOIS16 tdflOIS16(ADR) th(IORD)
Valid Output
tsuCE(IORD)
thA(IORD) thCE(IORD) tw(IORD)
tdrlOIS16(ADR)
-IOWR: High Fix, -OE: Fix, -WE: High Fix, A10:
HB28H016C8C
True Mode Access Write Characteristics
Parameter Data setup before IOWR data hold following IOWR IORD width time address setup before IOWR address hold following IOWR setup before IOWR hold following IOWR IOIS16 delay falling from address IOIS16 delay rising from address Symbol tsu(IOWR) th(IOWR) tw(IOWR) tsuA(IOWR) thA(IOWR) tsuCE(IOWR) thCE(IOWR) tdfIOIS16(ADR) tdrIOIS16(ADR) Unit
True Mode Access Write Timing
tsuA(IOWR) -CE2/-CE1 -IOWR tdrlOIS16(ADR) -IOIS16 tdflOIS16(ADR) tsu(IOWR) th(IOWR)
Valid Output
tsuCE(IOWR)
thA(IOWR) thCE(IOWR) tw(IOWR)
-IORD: High Fix, -OE: Fix, -WE: High Fix, A10:
HB28H016C8C
Reset Characteristics (only Memory Card Mode Card Mode) Hard Reset Characteristics
Parameter Reset setup time recover time rising time falling down time Reset pulse width Symbol tsu(RESET) trec(VCC) tw(RESET) Unit Test conditions Note
th(Hi-ZRESET) ts(Hi-ZRESET) Note:
this specification, fitted activity state when change. When reset signal non-activity state card ready state, shift power supply cutoff sequence instantly.
Hard Reset Timing
trec(Vcc)
-CE1, -CE2 th(Hi-ZRESET) High-Z tsu(RESET) tw(RESET) RESET ts(Hi-ZRESET) High-Z
HB28H016C8C
Power Reset Characteristics card status reset automatically without Hard reset when voltage goes over about
Parameter setup time rising time Symbol tsu(VCC) Unit Test conditions
Power Reset Timing
tsu(vcc)
-CE1, -CE2
Attention Card
reset power off, register informations cleared. card status cleared automatically when voltage turns below about 2.5V. Notice that card insertion/removal should executed while host active, card used True mode. After card hard reset, soft reset, power reset, reset, command applied card cannot access during +RDY/-BSY "low" level. Flash card can't operated this case. Card removal power should done during internal operations. When removal power occurrs during internal operation, there possibility that data lost. Before card insertion supplied card. After confirmation that -CD1, -CD2 pins inserted, supply card. must kept level during power reset memory card mode card mode. must kept constantly level True mode. recommend that circuit detect level power supply voltage added host. When read error occurs, rewriting sector recommended. This avoid error.
HB28H016C8C
Physical Outline January, 2002
1.60 0.05 1.00 0.08 3.30 0.10 12.00 0.10 (Top) 1.27 1.27 1.00 0.08 3.30 0.10 1.00 0.05
Unit:
42.80 0.10
25.78 0.08
36.40 0.15
(Top) 41.66 0.13
0.60 0.08
0.80 0.08
(Top)
(Top)
3.00 0.08
HB28H016C8C
Caution Handling Cards
Confirm direction insertion before inserting card. careful damage connector. avoid damaging card, never insert wrong direction. bend card; drop card expose card mechanical shock other kind. Never modify disassemble card. expose card static electricity electrical noise. Make regular backups data card.
HB28H016C8C
Cautions
Hitachi neither warrants grants licenses rights Hitachi's third party's patent, copyright, trademark, other intellectual property rights information contained this document. Hitachi bears responsibility problems that arise with third party's rights, including intellectual property rights, connection with information contained this document. Products product specifications subject change without notice. Confirm that have received latest product standards specifications before final design, purchase use. Hitachi makes every attempt ensure that products high quality reliability. However, contact Hitachi's sales office before using product application that demands especially high quality reliability where failure malfunction directly threaten human life cause risk bodily injury, such aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment medical equipment life support. Design your application that product used within ranges guaranteed Hitachi particularly maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions other characteristics. Hitachi bears responsibility failure damage when used beyond guaranteed ranges. Even within guaranteed ranges, consider normally foreseeable failure rates failure modes semiconductor devices employ systemic measures such fail-safes, that equipment incorporating Hitachi product does cause bodily injury, fire other consequential damage operation Hitachi product. This product designed radiation resistant. permitted reproduce duplicate, form, whole part this document without written approval from Hitachi. Contact Hitachi's sales office questions regarding this document Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor Integrated Circuits Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: (03) 3270-2111 Fax: (03) 3270-5109
further information write
Hitachi Semiconductor (America) Inc. East Tasman Drive Jose,CA 95134 Tel: (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe Ltd. Electronic Components Group Whitebrook Park Lower Cookham Road Maidenhead Berkshire 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Europe GmbH Electronic Components Group Dornacher D-85622 Feldkirchen Postfach 201,D-85619 Feldkirchen Germany Tel: <49> (89) 9180-0 Fax: <49> (89) Hitachi Asia Ltd. Hitachi Tower Collyer Quay #20-00 Singapore 049318 <65>-6538-6533/6538-8577 <65>-6538-6933/6538-3877 Hitachi Asia Ltd. (Taipei Branch Office) 4/F, 167, North Road Hung-Kuo Building Taipei (105), Taiwan <886>-(2)-2718-3666 <886>-(2)-2718-8180 Telex 23222 HAS-TP Hitachi Asia (Hong Kong) Ltd. Group (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Tsui, Kowloon Hong Kong <852>-2735-9218 <852>-2730-0281
Copyright Hitachi, Ltd., 2002. rights reserved. Printed Japan.
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