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HN29V51211T-50H
512M type Flash Memory More than 32,113-sector (542,581,248-bit)
ADE-203-1333A Rev. Apr. 2002 Description
Hitachi HN29V51211T-50H CMOS Flash Memory with type multi-level memory cells. fully automatic programming erase capabilities with single power supply. functions controlled simple external commands. card applications, unit programming erase small (2048 bytes. Initial available sectors HN29V51211T-50H more than 32,113 (98% sector address) less than 32,768 sectors.
Features
On-board single power supply (VCC): Organization Flash Memory: (2048 bytes (More than 32,113 sectors) Data register: (2048 bytes Multi-level memory cell bit/per memory cell Automatic programming Sector program time: (typ) System free Address, data latch function Internal automatic program verify function Status data polling function
HN29V51211T-50H
Automatic erase Single sector erase time: (typ) System free Internal automatic erase verify function Status data polling function Erase mode Single sector erase ((2048 byte unit) Fast serial read access time: First access time: (max) Serial access time: (max) power dissipation: ICC1 (typ) (Read) ICC2 (max) (Read) ISB2 (max) (Standby) ICC3/ICC4 (max) (Erase/Program) ISB3 (max) (Deep standby) following architecture required data reliability. Error correction: more than 3-bit error correction each sector read Spare sectors: 1.8% (579 sectors) (min) within usable sectors
Ordering Information
Type HN29V51211T-50H Available sector More than 32,113 sectors Package 12.0 20.00 pitch 48-pin plastic TSOP (TFP-48DA)
HN29V51211T-50H
Arrangement
48-pin TSOP NC*1 NC*1 NC*1 RDY/Busy I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 NC*1 (Top view)
Note: This used pin.
HN29V51211T-50H
Description
name I/O0 I/O7 VCC*
Function Input/output Chip enable Output enable Write enable Command data enable Power supply Ground Ready/Busy Reset Serial clock connection
RDY/Busy Note:
pins should connected common power supply ground, respectively.
HN29V51211T-50H
Block Diagram
2048
X-decoder
32768 (2048 memory matrix
I/O0 I/O7 Data input buffer Input data control
Data register (2048
Multiplexer
Y-gating Y-decoder
Data output buffer
RDY/Busy
Y-address counter
Control signal buffer Read/Program/Erase control
32113 32768
Sector address buffer
HN29V51211T-50H
Memory Address
Sector address 2048 bytes 7FFFH 7FFEH 7FFDH 2048 bytes 2048 bytes bytes bytes bytes
2048 bytes 0002H 0001H 0000H 000H 2048 bytes 2048 bytes 2048 bytes
bytes bytes bytes 800H 83FH Column address
Control bytes Cycles (1): (2): Column address (1): (2): Address Sector address I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7
First cycle Second cycle First cycle Second cycle
Notes: Some failed sectors exist device. failed sectors recognized reading sector valid data written part column address (The specific address TBD.). sector valid data must read kept outside sector before sector erase. When sector programmed, sector valid data should written back sector. means "Don't care". level either VIH, referred characteristics.
32113 32768 sectors
HN29V51211T-50H
Function
used select device. status returns standby rising edge reading operation. However, status does return standby rising edge busy state programming erase operation. Memory data status register data read, when Commands address latched rising edge Programming reading data latched rising edge RES: must kept VILR level when turned off. this way, data memory protected against unintentional erase programming. must kept VIHR (VCC level during operations such programming, erase read. CDE: Commands data latched when address latched when VIH. RDY/Busy: RDY/Busy indicates program/erase status flash memory. RDY/Busy signal initially high impedance state. turns level after (40H) command programming operation (B0H) command erase operation. After erase programming operation finishes, RDY/Busy signal turns back high impedance state. I/O0 I/O7: pins used input data, address command, used output memory data status register data.
Mode Selection
Mode Deep standby Standby Output disable Status register read* Command write*
VILR VIHR VIHR VIHR VIHR
RDY/Busy* I/O0 I/O7 High-Z High-Z High-Z Status register outputs
Notes: Default mode after power status register read mode (refer status transition). From I/O0 I/O7 pins output status, when (conventional read operation condition). Refer command definition. Data read, programmed erased after commands written this mode. RDY/Busy should pulled maintain level while RDY/Busy outputs high impedance. means "Don't care". level either referred characteristics.
HN29V51211T-50H
Command Definition*1,
First cycle Command Read cycles Serial read (Without (With Serial read Read identifier codes Data recovery read Auto erase Single sector (Without CA*7) (With CA*7) Program (2)*10 Operation Data mode*3 Write Write (1)*4 Second cycle Operation Data mode Write Write Write Read Read Write Write Write Write Write Write Write (1)*4 (1)*4 (1)*4 (1)*4 (1)*4 (1)*4 (1)*4 (1)*4 (1)*4 (1)*4 ID*8, Recovery data Data
2h*6 Write Write Write Write Write Write
Auto program Program
2h*6 Write Write Write Write
Program (Control bytes)*7 Program (WithoutCA*7) (With CA*7) Reset Clear status register Data recovery write
2h*6 Write Write Write Write
HN29V51211T-50H
Third cycle Command Read cycles Serial read (Without (With Serial read Read identifier codes Data recovery read Auto erase Single sector (Without CA*7) (With CA*7) Program (2)*
Fourth cycle Operation mode Data
Operation mode Write
Data (2)*4 (2)*4 (2)*4
2h*6 Write Write Write Write
Write
(1)*5
(2)*4 (2)*4 (2)*4 (2)*
Write Write Write Write Write Write Write
B0H*11 *11, *11, *11, *11,
Auto program Program
2h*6 Write Write Write Write
Program (Control bytes)*7 Program (WithoutCA*7) (With CA*7) Reset Clear status register Data recovery write
(2)*4 (2)*4 (2)*4
2h*6 Write Write
(2)*4
Write
*11,
HN29V51211T-50H
Fifth cycle Command Read cycles Serial read (Without (With Serial read Read identifier codes Data recovery read Auto erase Single sector (Without CA*7) (With CA*7) Program (2)*10
Sixth cycle Operation mode Data
Operation mode
Data
2h*6 Write 2h*6 Write
(2)*5
Auto program Program
(2)*5
Write
*11,
Program (Control bytes)* Program (WithoutCA*7) (With CA*7) Reset Clear status register Data recovery write 2h*6 Write Write *11,
Notes: Commands sector address latched rising edge pulses. Program data latched rising edge pulses. chip read status register mode when VIHR first time after power Refer command read write mode mode selection. Sector address A7), Sector address A14). Column address A7), Column address A11). 83FH) variable input number times 2048 64). input without limitation. using program (3), data additionally programmed maximum times each sector before erase. Identifier code; Manufacturer code (07H), Device code (9DH). manufacturer identifier code output when device identifier code output when high. Before program operations, data programmed sector must erased. commands written during auto program erase (when RDY/Busy outputs fourth sixth cycle auto program comes after program data input complete.
HN29V51211T-50H
Mode Description
Read Serial Read (1): Memory data D2111 sector address sequentially read. Output data valid after number pulse exceeds 2112. When input, memory data sector address sequentially read. Then output data valid after number pulse exceeds (2112 mode turns back standby mode time when VIH. Serial Read (2): Memory data D2048 D2111 sector address sequentially read. Output data valid after number pulse exceeds mode turns back standby mode time when VIH. Automatic Erase Single Sector Erase: Memory data D2111 sector address erased automatically internal control circuits. After sector erase starts, erasure completion checked through RDY/Busy signal status data polling. bits sector after erase. sector valid data stored part memory data D2048 D2111 must read kept outside sector before sector erase. Automatic Program Program (1): Program data PD2111 programmed into sector address automatically internal control circuits. When input, program data programmed from into sector address automatically internal control circuits. using program (1), data additionally programed times each sector before following erase. When column programmed, data column must [FF]. After programming starts, program completion checked through RDY/Busy signal status data polling. Programmed bits sector turn from when they programmed. sector valid data should included program data PD2048 PD2111. Program (2): Program data PD2111 programmed into sector address automatically internal control circuits. After programming starts, program completion checked through RDY/Busy signal status data polling. Programmed bits sector turn from when they programmed. sector must erased before programming. sector valid data should included program data PD2048 PD2111. Program (3): Program data PD2048 PD2111 programmed into sector address automatically internal control circuits. using program (3), data additionally programed times each sector befor following erase. When column programmed, data column must [FF]. After programming starts, program completion checked through RDY/Busy signal status data polling. Programmed bits sector turn from when they programmed.
HN29V51211T-50H
Program (4): Program data PD2111 programmed into sector address automatically internal control circuits. When input, program data programmed from into sector address automatically internal control circuits. using program (4), data rewritten each sector before following erase. column data before programming operation either "0". this mode, number times must counted whenever program execute. After programming starts, program completion checked through RDY/Busy signal status data polling. sector valid data should included program data PD2048 PD2111.
32767 Sector address Memory array 32767 Sector address Memory array 32767 Sector address Memory array
Register
2111
Column address Register
2111
2048 Register Serial read Program
2111
Serial read (Without Program (Without Program
Serial read (With Program (With
Status Register Read status returns status register read mode from standby mode, when VIL. status register read mode, pins output same operation status status data polling defined function description. Identifier Read manufacturer device identifier code read identifier read mode. manufacturer device identifier code selected with respectively.
HN29V51211T-50H
Data Recovery Read When programming error, program data read using data recovery read. When additional programming error, data compounded program data origin data sector address read. Output data valid after number pulse exeeds 2112. mode turns back standby mode time when VIH. read data invalid when addresses latched rising edge pulse after data recovery read command written. Data Recovery Write When programming into sector address error, program data rewritten automatically internal control circuit into other selected sector address SA'. Since data recovery write mode internally Program mode, rewritten sector address needs sector erase before rewrite. After data recovery write mode starts, program completion checked through RDY/Busy signal status data polling.
HN29V51211T-50H
Command/Address/Data Input Sequence
Serial Read (With before
Command /Address Data output Data output
(1)'
(2)'
Serial Read (With after
Command /Address Data output Data output Data output
(1)'
(2)'
Serial Read (Without CA),
Command/Address Data output
00H/F0H
Single Sector Erase
Command/Address Erase start
HN29V51211T-50H
Program (1), (With before
Command /Address Data input Data input Program start
10H/11H
(1)'
(2)'
Program (1), (With after
Command /Address Data input Data input Data input Program start
10H/11H
(1)'
(2)'
Program (1), (Without
Command/Address Data input Program start
10H/11H
Program
Command/Address Data input Program start
HN29V51211T-50H
Program
Command/Address Data input Program start
Read Mode
Command/Address Manufacture Device code Manufacture code output output code output
Data Recovery Read Mode
Command/Address Data output
Data Recovery Write Mode
Command/Address Program start
HN29V51211T-50H
Status Transition
Deep standby 00H/F0H Sector Erase setup (1), Sector address input Erase start Read (1), setup Column address input CA(1) CA(2) Sector address input
Power
CA(1)' CA(2)'
Read
read setup
CDE,
read
BUSY Status register read
Erase finish Column address PD(m) input CA(1) CA(2)
CA(1)' CA(2)' PD(m+j)
Standby
(1), PD2111 Output /11H Sector address Program Program Program disable (1)/(4) setup input data input start Program finish
Status register read
(1), PD2111*3 /0FH Program (2)/(3) Sector address Status register Program Program read input data input setup start Program finish Program error Status register clear Erase error
CE*2 FFH*2 ERROR Data recovery Data recovery read setup read SA(1) Error Output 12H* Data recovery SA(2) Sector address standby disable write setup input Status register read Status register read 01H*1
Notes: (01H)/(12H) Data recovery read/write used only Program (1), (2), (3), errors. When reset done FFH, error status flag cleared. When Program mode, input data PD2048 PD2111.
HN29V51211T-50H
Absolute Maximum Ratings
Parameter voltage voltage input output voltages Operating temperature range Storage temperature range Storage temperature under bias Symbol Vin, Vout Topr Tstg Tbias Value -0.6 +4.6 -0.6 +4.6 +125 Unit Notes
Notes: Relative Vin, Vout -2.0 pulse width Device storage temperature range before programming.
Capacitance 25°C, MHz)
Parameter Input capacitance Output capacitance Symbol Cout Unit Test conditions Vout
HN29V51211T-50H
Characteristics (VCC +70°C)
Parameter Input leakage current Output leakage current Standby current Symbol Deep standby current Operating current Operating current (Program) Operating current (Erase) Input voltage Input voltage (RES pin) VILR VIHR Output voltage -0.3* -0.2
0.3*
Unit
Test conditions Vout Iout Iout programming erase
Notes: -1.0 pulse width read operation. -2.0 pulse width read operation. -0.6 pulse width erase/data programming operation. pulse width over specified maximum value, operations guaranteed.
Characteristics (VCC +70°C)
Test Conditions Input pulse levels: V/2.4 Input pulse levels RES: V/VCC Input rise fall time: Output load: gate (Including scope jig.) Reference levels measuring timing:
HN29V51211T-50H
Power off, Serial Read Mode
Parameter Write cycle time Serial clock cycle time setup time hold time Write pulse time Write pulse high time Address setup time Address hold time Data setup time Data hold time output delay setup time output low-Z setup time before read setup time before command write output hold high output float delay time setup time hold time pulse width pulse time setup time setup time hold time setup time hold time setup time RDY/Busy undefined high device ready pulse high time setup time hold time Symbol OEWS CESR CWRS CWRH Unit VIL, VIL, VIL, VIL, Test conditions Notes
HN29V51211T-50H
Parameter setup hold time delay time RDY/Busy setup Time device busy Busy time read mode Symbol RBSY Unit Test conditions Notes
Notes: time after which pins become open. (min) specified reference point only greater than specified tWSD (min) limit, then access time controlled exclusively tSAC.
HN29V51211T-50H
Program, Erase Erase Verify
Parameter Write cycle time Serial clock cycle time setup time hold time Write pulse time Write pulse high time Address setup time Address hold time Data setup time Data hold time Symbol 10.0 20.0 20.0 30.0 Unit Test conditions Note
setup time before command OEWS write setup time before status polling setup time before read Time device busy Auto erase time Auto program time Program(1), Program(2) Program(4), Data recovery write delay time pulse high time pulse width pulse time Data setup time Data hold time setup setup hold time OEPS SCHW
HN29V51211T-50H
Parameter output delay output delay high output float setup time setup time hold time setup time hold time Next cycle ready time hold time output delay output invalid hold time setup time output low-Z output delay output hold RDY/Busy setup Busy time read mode Note: Symbol CDSS CDSH CDOH CDAC RBSY Unit Test conditions Note
time after which pins become open.
HN29V51211T-50H
Timing Waveforms
Power Sequence
tVRS
tCWRS tBSY /Busy Notes: must kept VILR level referred characteristics rising falling edges guarantee data stored chip. must kept VIHR level referred characteristics while I/O7 outputs level status data polling RDY/Busy outputs level. Undefined High-Z Ready tBSY tCES tCEH tCESR tCES tCEH tCESR tCWRH tVRH tDFP
HN29V51211T-50H
Serial Read Timing Waveform
tCPH tCWC tWPH tOER
tCES tOEWS tCDS tCDS tCDH tSCS I/O0 I/O7 /F0H /Busy SA(1) SA(2) tOEL tOES tWSD tSCC tSCC tCWC tWPH
tCOH
tCEH
tCDH
tSOH
tCDS
tSPL tSAC
tSAC
D1out/D2049out
tSAC
tSAC
D0out/D2048out
D2111out/D2111out
tRBSY High-Z
Notes: status returns standby rising edge Output data valid after number pulse exceeds 2112 serial read mode (1)and (2), respectively. After commands written, status return standby after command input turns level.
Serial Read with before Timing Waveform
cycle
tCES
tCOH tCPH tCWC tWPH tCWC tWPH tCWC tWPH tOEWS tOER tSCD tCDH tWSD tOES tSCC tSCS tSAC tSPL tSAC tOEL
D(n)out D(n+1)out
tCEH4
tOEWS
tCWC tWPH
tCWC tWPH tOER
tCDS tCDS
tOES tSCC tSCC tSOH
tCDH
tSCC
tSOH
tCDS
tSAC
CA(2)' tSAC tOEL
tSPL tSAC tSAC D(m)out D(m+1)out
tSAC
I/O0 I/O7
SA(1) SA(2) CA(1) CA(2)
D(n+i)out
CA(1)'
D(m+j)out
/Busy
tRBSY High-Z
Notes:
status returns Standby rising edge Output data valid after number pulse exceeds (2112-n). 2111-n, 2111) Output data valid after number pulse exceeds (2112-m). 2111-m, 2111) After commands written, status return standby after command input turns level. This interval repeated (h-1) cycle. 2048
HN29V51211T-50H
Serial Read with after Timing Waveform
cycle*
tCOH
tCES tCPH tCWC tWPH tOER tOES tCDS tWSD tSCC tSCC tSOH tCDH tCDS tOEWS tCWC tWPH tOER
tCEH*
tOEWS
tCWC tWPH
tOES tSCC tSCC tSOH
tCDH
tCDS
tSCS tOEL tSAC tSAC tSAC tOEL SA(1) SA(2)
D0out D1out D(k)out
tSAC tSPL tSAC D(m)out D(m+1)out D(m+j)out tSAC tSAC
I/O0 I/O7
CA(1) CA(2)
tRBSY
/Busy
High-Z
Notes:
status returns Standby rising edge Output data valid after number pulse exceeds 2112. 2111) Output data valid after number pulse exceeds (2112-m). 2111-m, 2111) After commands written, status return standby after command input turns level. This interval repeated cycle. 2048
Erase Status Data Polling Timing Waveform (Sector Erase)
tCES tOEWS tCDS tCDS tCDH tSCS I/O0 I/O7 /Busy High-Z High-Z SA(1) SA(2) tCDS tCDH tCDH tSCHW tCWC tWPH tCWC tWPH tCWC tWPH tCEH tOEPS tASE tRDY tCDS
Notes: commands,including reset command FFH, cannot input while RDY/Busy outputs VOL. status returns standby status after RDY/Busy returns High-Z.
HN29V51211T-50H
Program Status Data Polling Timing Waveform
tCES tOEWS tCWC tWPH tCDS tCDH tSCS I/O0 I/O7 /Busy High-Z PD2111 I/O7 I/O7 High-Z tSDH tSDS tCDH tSCC tSPL tCDH tSCHW tWPtCDS tCDSS tASP tCWC tWPH tOEPS tRDY tCEH
tCDS
Notes:
programming operation guranteed when number pulse exceeds 2112. commands, including reset command FFH, cannot input while RDY/Busy VOL. status returns standby status after RDY/Busy returns High-Z. using program (1), data programmed additionally each sector before erase.
HN29V51211T-50H
Program with before Status Data Polling Timing Waveform
cycle*6 tCES tOEWS tCWC tCWC tWPH tWPH tCWC tWPH tCWC tWPH tCDS tSCS I/O0 I/O7 /Busy Notes: High-Z programming operation guaranteed when number pulse exceeds (2112 n).(i 2111 2111) programming operation guaranteed when number pulse exceeds (2112 m).(j 2111 2111) commands, including reset command FFH, cannot input while RDY/Busy VOL. status returns standby status after RDY/Busy returns High-Z. using program (1), data programmed additionally each sector before erase. This interval repeated cycle.(1 2048 High-Z*4 SA(1) SA(2) CA(1) CA(2) PD(n) PD(n+1) PD(n+i)*1 CA(1)' CA(2)' PD(m) PD(m+1)PD(m+j)*2 I/O7=VOL I/O7=VOH tDHAS tCDH tCDH tSCC tSPL tCDSH tCDH tSDS tSCC tSPL tSDH tCDSS tCDS tCDSS tCDH tSCHW tASP tCDS tCWC tWPH tCEH
tOEPS
tRDY
tSDS
Program with after Status Data Polling Timing Waveform
cycle*6 tCES tOEWS tCWC tCWC tWPH tWPH tCDS tCDS tSCS I/O0 I/O7 /Busy Notes: High-Z programming operation guaranteed when number pulse exceeds 2112.(0 2111) programming operation guaranteed when number pulse exceeds (2112 m).(j 2111 2111) commands, including reset command FFH, cannot input while RDY/Busy VOL. status returns standby status after RDY/Busy returns High-Z. using program (1), data programmed additionally each sector before erase. This interval repeated cycle.(1 2048 High-Z*4 SA(1) SA(2) PD(k)*1 CA(1) CA(2) PD(m) PD(m+1)PD(m+j)*2 I/O7=VOL I/O7=VOH tDHAS tSDS tCDH tCDH tSCC tSPL tSDH tCDSH tCDH tSCC tSPL tSDH tCDSS tCDS tCDSS tCDH tSCHW tASP tCDS tCWC tWPH tCEH
tOEPS
tRDY
tSDS
HN29V51211T-50H
Program Status Data Polling Timing Waveform
tCES tOEWS tCWC tCWC tWPH tWPH tCEH tOEPS tRDY
tASP
tCDS tCDH tSCS I/O0 I/O7 /Busy High-Z PD2111 I/O7 I/O7 High-Z tSDH tSDS tCDH tSCC tSPL tCDH tSCHW tWPtCDS tCDSS tCDS
Notes:
programming operation guranteed when number pulse exceeds 2112. commands, including reset command FFH, cannot input while RDY/Busy VOL. status returns standby status after RDY/Busy returns High-Z. using program (2), programmed data each sector must erased before programming next data.
HN29V51211T-50H
Program Status Data Polling Timing Waveform
tCES tOEWS tCWC tWPH tCDS tCDH tSCS I/O0 I/O7 /Busy High-Z PD2048 PD2049 PD2111 I/O7 I/O7 High-Z tSDH tSDS tCDH tSCC tSPL tCDH tSCHW tWPtCDS tCDSS tASP tCDS tCWC tOEPS tRDY tCEH
Notes:
programming operation guranteed when number pulse exceeds commands, including reset command FFH, cannot input while RDY/Busy VOL. status returns standby status after RDY/Busy returns High-Z. using program (3), data programmed additionally each sector before erase.
HN29V51211T-50H
Program Status Data Polling Timing Waveform
tCES tOEWS tCWC tWPH tCDS tCDH tSCS I/O0 I/O7 /Busy tRBSY Notes: programming operation guranteed when number pulse exceeds 2112. commands, including reset command FFH, cannot input while RDY/Busy VOL. status returns standby status after RDY/Busy returns High-Z. using program (4), data rewritten each sector. High-Z PD2111 I/O7 I/O7 High-Z tCDH tWSD tSDH tSDS tSCC tSPL tCDH tSCHW tWPtCDS tCDSS tASP tCDS tCWC tWPH tOEPS tRDY tCEH
HN29V51211T-50H
Program with before Status Data Polling Timing Waveform
cycle*6 tCES tOEWS tCWC tCWC tWPH tWPH tCWC tWPH tCWC tWPH tCDS tCDS tSCS I/O0 I/O7 /Busy Notes: tRBSY High-Z programming operation guaranteed when number pulse exceeds (2112 n).(i 2111 2111) programming operation guaranteed when number pulse exceeds (2112 m).(j 2111 2111) commands, including reset command FFH, cannot input while RDY/Busy VOL. status returns standby status after RDY/Busy returns High-Z. using program (4), data rewritten each sector. This interval repeated cycle.(1 2048 High-Z*4 SA(1) SA(2) CA(1) CA(2) PD(n) PD(n+1) PD(n+i)*1 CA(1)' CA(2)' PD(m) PD(m+1)PD(m+j)*2 I/O7=VOL I/O7=VOH tDHAS tCDH tWSD tCDH tSCC tSPL tCDSH tCDH tSDS tSCC tSPL tSDH tCDSS tCDS tCDSS tCDH tSCHW tASP tCDS tCWC tWPH tCEH
tOEPS
tRDY
tSDS
Program with after Status Data Polling Timing Waveform
cycle*6 tCES tOEWS tCWC tCWC tWPH tWPH tCDS tCDS tSCS I/O0 I/O7 /Busy Notes: SA(1) SA(2) PD(k)*1 CA(1) CA(2) PD(m) PD(m+1)PD(m+j)*2 I/O7=VOL I/O7=VOH tDHAS tSDS tCDH tCDH tWSD tSCC tSPL tSDH tCDSH tCDH tSCC tSPL tSDH tCDSS tCDS tCDSS tCDH tSCHW tASP tCDS tCWC tWPH tCEH
tOEPS
tRDY
tSDS
tRBSY High-Z programming operation guaranteed when number pulse exceeds 2112.(0 2111) programming operation guaranteed when number pulse exceeds (2112 m).(j 2111 2111) commands, including reset command FFH, cannot input while RDY/Busy VOL. status returns standby status after RDY/Busy returns High-Z. using program (4), data rewritten each sector. This interval repeated cycle.(1 2048 High-Z*4
HN29V51211T-50H
Status Register Read Timing Waveform
tCES tOEWS tCDS tSCHW tSCS I/O0 I/O7 /Busy Note: status returns standby rising edge High-Z Manufacturer Device Manufacturer code code code Status register tCDF tCDAC tCDF tCDAC tSCS tCDH tCDOH tOEPS tCOH tCOH
HN29V51211T-50H
Data Recovery Read Timing Waveform
tCPH tCES tOEWS tCDS tCDH tOES tSCC tSCS I/O0 I/O7 High-Z /Busy Notes: status returns standby rising edge Output data valid after number pulse exceed 2112 recovery data read mode. After commands written, status turns standby after command input turns level. D0out D1out D2111out High tOEL tSAC tSCC tSOH tCDS tCDH tOER tCOH
tCEH
tSPL
tSAC
HN29V51211T-50H
Data Recovery Write Timing Waveform
tCES tOEWS tCDS tCDS tCDH tSCS I/O0 I/O7 High-Z /Busy High-Z SA(1) High SA(2) tCDS tCDH tCDH tSCHW tASP tCWC tWPH tCWC tWPH tCWC tWPH tCEH tOEPS tRDY tCDS
Notes: commands,including reset command FFH, cannot input while RDY/Busy VOL. status returns standby status after RDY/Busy returns High-Z.
HN29V51211T-50H
Clear Status Register Timing Waveform
tCES tOEWS tCDH tCDS tSCS tSCS tWPH tCDS tCDH tCEH tCPH tCES
tOEWS tCDS tCDH
I/O0 I/O7 High High-Z Next Command Next Command
/Busy
Note status returns standby rising edge
HN29V51211T-50H
Function Description
Status Register: HN29V51211T-50H outputs operation status data follows: I/O7 outputs indicate that memory either erase program operation. level I/O7 turns when operation finishes. I/O5 I/O4 pins output indicate that erase program operations complete finite time, respectively. these pins output VOHs, indicates that these operations have timed out. I/O6 outputs indicates possibility that corrected ECC, choose data correction reading data. When these pins monitor, I/O7 must turn execute other erase program operation, status data must cleared after time occurs. From I/O0 I/O3 pins reserved future use. pins output should masked during status data read mode. function status register summarized following table.
I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0 Flag definition Ready/Busy Definition Ready, Busy
Program/Erase When I/O7 outputs available, available. check Erase check Program check Reserved Reserved Reserved Reserved Fail, Pass Fail, Pass Outputs should masked during status data poling mode.
Applicability
I/O7 I/O6 I/O5 I/O4 Needed needed. Sector replacement Needed needed. Sector replacement System data correction
This device needs corrected failure data system Spare sectors, reading again failure sector data when program/erase error occures.
HN29V51211T-50H
Requirement System
Specifications Program/Erase Endurance: cycles
Item Usable sectors (initially) Spare sectors (Error Correction Code) 32,113 32,768 Unit sector sector bit/sector
HN29V51211T-50H
Unusable Sector Initially, HN29V51211T-50H includes unusable sectors. unusable sectors must distinguished from usable sectors system follows. Check partial invalid sectors devices system. usable sectors were programmed following data. Refer flowchart "Indication unusable sectors". Initial Data Usable Sectors
Column address Data 81FH 820H 821H 822H 823H 824H 825H 826H 83FH
erase program partial invalid sectors
START
Sector number
Read data
Column address 820H 825H
Sector number Sector number
sector*2
Check data*1
Sector number 32,767
Notes: Refer table "Initial data usable sectors". sectors installed system.
system.
Unusable Sector Indication Flow
HN29V51211T-50H
Requirements High System Reliability device fail during program, erase read operation write erase cycles. following architecture will enable high system reliability failure occurs. error read operation: (Error Correction Code) similar function which correct 3-bits each sectors required data reliability. When error occurs, data must corrected replacing spare sector. errors program erase operations: device fail during program erase operation write erase cycles. status register indicates erase program operation complete finite time. When error occured sector, reprogram data into another sector. Avoid further system access sector that error happens. Typically, recommended number spare sectors 1.8% (579 sectors (min)) initial usable 32,113 sectors (min) each device. reprogramming, data from failed sectors, because data from failed sectors fixed. reprogram data must data reloaded from external buffer, Data recovery read mode Data recovery write mode (see "Mode Description" under figure "Spare Sector Replacement Flow after Program Error"). avoid consecutive sector failures, choose addresses spare sectors possible from failed sectors. this case, cycles program/erase endurance guaranteed. Prolongation flash memory life: life memory prolongation, ware leveling about 5000 each. write/erase endurance cycles under condition 3-bit error correction ware leveling 5000 each.
HN29V51211T-50H
START
Program start
usable sector
Program
Check RDY/Busy
Check status
Clear status register
Load data from external buffer
Data recovery read
Data recovery write
Program start
another usable sector
Program
Check RDY/Busy
Check status Check status: Status register read
Spare Sector Replacement Flow after Program Error
HN29V51211T-50H
Errors program erase operations device fail during program erase operation. Failure mode confirmed read status register after complete erase program operations. There failure modes specified each codes: Status register error flag: I/O6 Replace sector under "Spare Sectors Replacement Flow Status Register I/O6 Read". Replacement must applied sector(2k bytes) which contains failure bits. Status register error flag: I/O6 Escape program data temporary under "Replacement Flow Status Register I/O6 Read". failure data corrected ECC, replace spare sector. failure data corrected ECC, replace spare sector. Replacement must applied sector(2k bytes) which contains failure bits.
START
Check status: Status register read Check I/O6: I/O6 output monitor Check ECC: Correct ECC? usable sector
Program start
Program
Check RDY/Busy
Check status
Check I/O6 Sector Replacement
Escape program deta*1
Program
Read error sector
Check status
Check
Sector Replacement
Program
Check status
Note: Refer 'Spare sector replacement flow after program error' escape deta.
Spare Sectors Replacement Flow Status Register I/O6 Read
HN29V51211T-50H
Memory Structure
32,768 sectors
sector
byte bits)
2,112 bytes (16,896 bits)
Bit: Minimum unit data. Byte: Input/output data unit programming reading. byte bits) Sector: Page unit erase, programming reading. sector 2,112 bytes 16,896 bits) Device: device 32,768 sectors.
HN29V51211T-50H
Package Dimensions
HN29V51211T-50H (TFP-48DA)
12.00 12.40
January, 2002
Unit:
0.50 *0.22 0.08 0.08 0.20 0.06 0.45 1.20
*0.17 0.05 0.125 0.04
18.40
0.80 20.00 0.20 0.05 0.05 0.50 0.10
Hitachi Code JEDEC JEITA Mass (reference value) TFP-48DA Conforms Conforms 0.52
0.10
*Dimension including plating thickness Base material dimension
HN29V51211T-50H
Cautions
Hitachi neither warrants grants licenses rights Hitachi's third party's patent, copyright, trademark, other intellectual property rights information contained this document. Hitachi bears responsibility problems that arise with third party's rights, including intellectual property rights, connection with information contained this document. Products product specifications subject change without notice. Confirm that have received latest product standards specifications before final design, purchase use. Hitachi makes every attempt ensure that products high quality reliability. However, contact Hitachi's sales office before using product application that demands especially high quality reliability where failure malfunction directly threaten human life cause risk bodily injury, such aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment medical equipment life support. Design your application that product used within ranges guaranteed Hitachi particularly maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions other characteristics. Hitachi bears responsibility failure damage when used beyond guaranteed ranges. Even within guaranteed ranges, consider normally foreseeable failure rates failure modes semiconductor devices employ systemic measures such fail-safes, that equipment incorporating Hitachi product does cause bodily injury, fire other consequential damage operation Hitachi product. This product designed radiation resistant. permitted reproduce duplicate, form, whole part this document without written approval from Hitachi. Contact Hitachi's sales office questions regarding this document Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor Integrated Circuits Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: (03) 3270-2111 Fax: (03) 3270-5109
further information write
Hitachi Semiconductor (America) Inc. East Tasman Drive Jose,CA 95134 Tel: (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe Ltd. Electronic Components Group Whitebrook Park Lower Cookham Road Maidenhead Berkshire 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 585200 Hitachi Europe GmbH Electronic Components Group Dornacher D-85622 Feldkirchen Postfach 201,D-85619 Feldkirchen Germany Tel: <49> (89) 9180-0 Fax: <49> (89) Hitachi Asia Ltd. Hitachi Tower Collyer Quay #20-00 Singapore 049318 <65>-538-6533/538-8577 <65>-538-6933/538-3877 Hitachi Asia Ltd. (Taipei Branch Office) 4/F, 167, North Road Hung-Kuo Building Taipei (105), Taiwan <886>-(2)-2718-3666 <886>-(2)-2718-8180 Telex 23222 HAS-TP http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Tsui, Kowloon Hong Kong <852>-(2)-735-9218 <852>-(2)-730-0281
Copyright Hitachi, Ltd., 2001. rights reserved. Printed Japan.
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