Description Lucent Technologies Microelectronics Group T7289A Lin

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Description Lucent Technologies Microelectronics Group T7289A Lin

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T7289A Line Interface
Description
Lucent Technologies Microelectronics Group T7289A Line Interface integrated circuit that provides line interface between cross connect (DSX) terminal equipment circuits cable distances 22-gauge, plastic, insulated cable (PIC). T7289A device performs receive-pulse regeneration, timing recovery, transmit-pulse shaping equalization functions. device manufactured using low-power CMOS technology available 28-pin, plastic 28-pin, plastic package. T7289A device functionally compatible with T7289, LC1046A, LC1046C devices 1.544 Mbits/s operation provides improved jitter transfer crosstalk characteristics with selectable single-rail/ dual-rail system interface.
Fully integrated line interface Intended systems that must comply with 43802, CB119, TR-TSY-000170, TRTSY-000499 (Category equipment) power dissipation On-chip transmit equalization Monolithic clock recovery High jitter accommodation Excellent transmit template performance Single-rail/dual-rail interface Pin-selectable B8ZS encoder decoder (during single-rail mode only) Loopback modes fault isolation Multiple link-status alarm features Minimal external circuitry required
T7289A Line Interface
Description (continued)
LINE LENGTH SELECT INSERT BLUE SIGNAL
TRANSMIT LINE
OUTPUT DRIVERS
SELECTABLE PULSE EQUALIZATION
B8ZS ENCODER RAIL CONVERSION
TRANSMIT DATA
LOOPBACKS
TRANSMIT CLOCK
RECEIVE LINE
RECEIVE ANALOG INPUT
CLOCK EXTRACTION RETIMING
B8ZS DECODER DETECTION RAIL CONVERSION
RECEIVED DATA
LOSS SIGNAL
RECEIVED CLOCK SINGLE-RAIL/DUAL-RAIL SELECT BIPOLAR VIOLATION ALARM
5-4348(C)
Figure T7289A Block Diagram
Information
BZSC/TNDATA BPV/RNDATA RCLK RDATA/RPDATA TCLK TDATA/TPDATA ALMT GNDA VDDA DUAL VDDD GNDD BCLK
5-4349(C)
T7289A-PL T7289A-EL
Figure Diagram
Lucent Technologies Inc.
T7289A Line Interface
Information (continued)
Table Descriptions This table refers cleared high (1). Symbol
Type*
BZSC/TNDATA
BPV/RNDATA
RCLK RDATA /RPDATA
TCLK TDATA/TPDATA
ALMT
Name/Function Loss Signal (Active-Low). This cleared upon loss data signal receiver inputs. Loss Clock (Active-Low). This cleared when indicating that loss clock occurred. When transitions occur RCLK RDATA outputs. valid clock must present BCLK this function operate properly. B8ZS Enable/Transmit Data Negative Rail. dual this insert B8ZS substitution code transmit side remove substitution code receive side. dual this used transmit data negative rail. Bipolar Violation/Receive Data Negative Rail. dual this upon detection bipolar violation receive-side input after removal B8ZS substitution code that contains legal violations. dual this used receive data negative rail. Receive Clock. Output receive clock signal terminal equipment. Receive Data (Active-Low)/Receive Data Positive Rail. dual this used 1.544 Mbits/s inverted unipolar output data with 100% duty cycle. dual this used transmit data positive rail. Transmit Clock. input clock signal (1.544 ppm). Transmit Data/Transmit Data Positive Rail. dual this used 1.544 Mbits/s unipolar input data. dual this used transmit data positive rail. Loopback Enable (Active-Low). This cleared full local loopback (transmit converter output receive converter input). Most transmit receive analog circuitry exercised this loopback. Loopback Enable (Active-Low). This cleared remote loopback (DSX DSX). loopback high (pin inserts blue signal transmit side. Loopback Enable (Active-Low). This cleared digital local loopback. Only transmit receive digital sections exercised this loopback. Alarm Test Enable (Active-Low). This cleared, forcing testing without affecting data transmission. Receive Blue Control. This insert blue signal receive side. During single-rail mode, RDATA cleared. During dual-rail mode, RPDATA RNDATA toggle half blue clock rate. Blue clock must present.
input, output, input with pull-up, input with pull-down, output with pull-up. Table
Lucent Technologies Inc.
T7289A Line Interface
Information (continued)
Table Descriptions (continued) Symbol Type Name/Function Transmit Blue Control (AIS). This insert blue signal (all transmit side. This control priority over loopback both operated simultaneously. Blue Clock. blue clock signal (1.544 ppm). This clock independent transmit clock. Equalizer Control three control leads selecting transmit equalizers. Equalizer Control three control leads selecting transmit equalizers. Equalizer Control three control leads selecting transmit equalizers. Digital Ground. Transmit Bipolar Ring. Negative bipolar transmit output. Digital Supply (±10%). Transmit Bipolar Tip. Positive bipolar transmit output. Dual-Rail Mode Select. This cleared single-rail mode dual-rail mode. Analog Supply (±10%). Analog Ground (±10%). Shutdown. This forcing RCLK high, RDATA high, (for single-rail operation) loss signal detected (LOS dual-rail mode, RPDATA RNDATA forced low. Receive Bipolar Ring. Negative bipolar receive input. Receive Bipolar Tip. Positive bipolar receive input.
BCLK GNDD VDDD DUAL VDDA GNDA
input, output, input with pull-up, input with pull-down, output with pull-up. Table
Table Equalizer Control Other combinations represent test modes used normal operation. Distance (Ft.)* (Applies Only 22-gauge [ABAM] Cable) 0-133 133-267 267-400 400-533 533-655 Maximum Cable Loss kHz)
maximum loss figures other cable types.
Lucent Technologies Inc.
T7289A Line Interface
Overview
T7289A device fully integrated line interface that requires only line-interface transformers three input termination resistors provide bidirectional line interface between cross connect (DSX) terminal equipment. typical application diagram shown Figure This device specified with 22-gauge, plastic-insulated ABAM cable, well other cable types. circuit divided into three main blocks: transmit converter, receive converter, logic. transmit receive converters process information signals through device transmit receive directions, respectively; logic control status interface device.
RECEIVED DATA VDDD RECEIVE INPUT GNDD GNDA LOAD TRANSMIT OUTPUT 1.14:1 (DS1)
5-4350(C)
RDATA/RPDATA BPV/RNDATA RCLK
TRANSMITTED DATA
T7289A LINE INTERFACE
VDDA
TDATA/TPDATA BZSC/TNDATA TCLK
Note: Lucent 2745 family pulse transformers through-hole mounting Lucent 2758 family pulse transformers surface mounting recommended.
Figure Typical Application Diagram Bipolar Signal Interfacing
Lucent Technologies Inc.
T7289A Line Interface
output pulse waveform consists four distinct levels: overshoot, pulse, backswing, tail. They produced high-speed converter driven onto line using low-impedance output buffers. There five different pulse shapes, corresponding 133-ft. increments cable, that obtained setting appropriate equalizer control inputs. positive negative pulses meet amplitude, rise fall time, overshoot, undershoot, template, power requirements office cross connect given Compatibility Bulletin (CB119). typical output waveform relative CB119 template shown Figure analog circuitry shown Figure clock multiplier shown Figure produces high-speed timing waveforms needed converter. clock multiplier also eliminates need tightly controlled transmit clock duty cycle usually required discrete implementations. Transmitter specifications given Table
Transmit Converter
line-interface transmission format return-to-zero, bipolar alternate mark inversion (AMI), requiring transmission sensing alternately positive negative pulses. During single-rail operation, transmit converter accepts unipolar data TDATA converts signal balanced bipolar data signal. Binary TDATA data stream become pulses alternating polarity transmitted between output rails, dual-rail operation, binary TPDATA results transmission positive pulse between binary TNDATA results negative pulse. Binary transmitted null pulses. necessary transmit pulse shaping done on-chip, eliminating need external shaping networks. This done shaping pulses bipolar output (T2, according selected equalizer control (EC1-EC3) inputs (see Table
NORMALIZED AMPLITUDE
CB119 TEMPLATE
T7289A OUTPUT PULSE SHAPE 1000 1250
5-4351(C)
-0.5
TIME (ns)
Figure Typical T7289A Output Waveform
Lucent Technologies Inc.
T7289A Line Interface
Transmit Converter (continued)
ANALOG SIGNAL DETECTOR RECEIVER ANALOG INPUT PDATA NDATA RPDATA DATA/CLOCK RNDATA RECOVERY RCLK
DIGITAL SIGNAL DETECTOR
RDATA/RPDATA BPV/RNDATA RCLK TRANSMIT RECEIVE LOGIC TDATA/TPDATA BZSC/TNDATA TCLK
DATA TRANSMIT OUTPUT DRIVERS SELECTABLE PULSE EQUALIZATION DATA
TIMING SIGNALS
CLOCK MULTIPLIER
TCLK
DUAL
5-4352(C)
Figure T7289A Analog Block Diagram
Receive Converter
receive converter accepts bipolar input signals (T1, R1), coupled through receive transformer, from cross connect over maximum 22gauge (ABAM) cable. received signal rectified while amplitude rise time restored. These input signals peak-detected sliced receiver front end, producing digital signals PDATA NDATA (Figure timing extracted means phase-locked loop (PLL) circuitry that locks internal, free-running, current-controlled oscillator (ICO) 1.544 (DS1 signal) component. employs 3-state phase detector lowvoltage/temperature coefficient ICO. freerunning frequency trimmed within ±2.5% data rate wafer probe, with operating conditions (see Operating Conditions section), free-running oscillator frequency deviates from data rate less than ±6%, alleviating problem harmonic lock.
robust operation, augmented with frequency-acquisition capability. frequency acquisition circuitry intended guarantee proper phaselocking during start-up conditions, such powerup data activation. Once T7289A device phaselocked data, frequency-acquisition mode will activated. continuous (i.e., ungapped, unswitched) 1.544 reference clock must present TCLK enable frequency-acquisition circuitry. However, receive will operate even absence TCLK. Because clock output receive converter derived from ICO, free-running clock present output receive converter without data being present input. shutdown (SD) provided block this clock, desired, eliminate free-running clock upon loss input signal.
Lucent Technologies Inc.
T7289A Line Interface
designed accommodate large amounts input jitter with high power supply rejection operation noisy environments. jitter sensitivity power supply noise allows compact line-card layouts that employ many line interfaces board. minimum input jitter tolerance, specified AT&T Publication 43802, measured T7289A device jitter tolerance shown rate Figure data shown typical measurement 10-6. Subtracting approximately 0.02 U.I. from given data yields jitter accommodation error-free operation. Receiver specifications shown Table
Receive Converter (continued)
methods loss-of-signal detection used this chip. analog signal detector shown Figure uses output receiver peak detector determine signal present input amplitude drops below approximately analog detector output becomes active. Hysteresis (250 provided analog detector eliminate chattering. addition, digital signal detector counts recovered data. more than consecutive occur, digital signal detector becomes active. normal operation, detector outputs ORed together form LOS; however, loopback only digital signal detector used monitor looped signal. Table describes operation shutdown, LOS, functions normal operation loopback Table Shutdown, LOS, Truth Table don't care. Inputs ALMT Input Signal Active Signal Active Signal
Loopback Signal Active Signal Active Signal
Outputs Receive Side Normal Free-running Normal output Normal loopback Free-running Normal loopback output Unaffected
Active Detectors Analog digital Analog digital Analog digital Analog digital Digital only Digital only Digital only Digital only
Lucent Technologies Inc.
T7289A Line Interface
Receive Converter (continued)
BELLCORE TR-TSY-00170 43801 SPECIFICATION (1/8 PATTERN) 10.0 43802 SPECIFICATION (220 PATTERN) MEASURED T7289A PERFORMANCE 10-6 (220 PATTERN)
(300,
INPUT JITTER AMPLITUDE (U.I. PEAK-TO-PEAK)
(10,
(500,
MEASURED T7289A PERFORMANCE 10-6 (1/8 PATTERN)
MEASURED DATA POINTS PATTERN PATTERN JITTER JITTER JITTER JITTER FREQUENCY AMPLITUDE FREQUENCY AMPLITUDE (kHz) (U.I.pp) (kHz) (U.I.pp) 0.66 0.52 0.45 0.49 0.45 0.48 0.45 0.48 0.48
(10k, 0.3)
(70k, 0.3)
(8k, 0.1)
(50k, 0.1)
0.01
JITTER FREQUENCY (kHz)
5-4353(C)
Figure Jitter Tolerance
Digital Logic
logic provides alarms, optional B8ZS coding, bluesignal insertion (AIS) circuits, maintenance loopbacks. accepts dual-rail single-rail data patterns.
mode selected, (TDATA/TPDATA) accepts positive rail transmit data, (BZSC/TNDATA) reconfigured accept negative rail transmit data. (RDATA/RPDATA) outputs positive rail receive data, (BPV/RNDATA) reconfigured output negative rail receive data. dual-rail mode, B8ZS bipolar violation functions disabled. single-rail operation, TDATA active-high
RDATA active-low. dual-rail operation, TPDATA,
Single-Rail/Dual-Rail Option
implement rail-select feature, dual (pin cleared single-rail mode dual-rail mode. When single-rail mode selected, (TDATA/ TPDATA) accepts transmit data (RDATA/ RPDATA) outputs inverted receive data. When dual-rail
TNDATA, RPDATA, RNDATA active-high. This interface scheme consistent with dual-rail interfaces other Lucent Line Interface products.
Lucent Technologies Inc.
T7289A Line Interface
output pin(s). bipolar all-1s signal transmitted through into network. Both receive transmit blue signals synchronous with BCLK. Loopback Paths T7289A device three independent loopback paths that activated clearing respective control inputs, LP1, LP2, LP3. Loopback bridges data stream from transmit converter (transmit converter included) input receive converter. maintenance loop includes most internal circuitry. Loopback provides loopback data from bipolar inputs (T1, associated recovered clock bipolar outputs transmit converter (T2, R2). receive front end, receive PLL, transmit driver circuitry exercised. loop used isolate failures between systems. Loopback loops data stream loopback bypasses transmit receive converters. blue signal transmitted towards when this loopback. Loopbacks operated simultaneously provide transmission loops both directions.
Digital Logic (continued)
Single-Rail/Dual-Rail Option (continued)
Alarms independent loss-of-clock (LOC) output provided that loss clock detected when shutdown option effect. wire-ORed produce single alarm. bipolar violation (BPV) output included, giving alarm each time violation (two more successive rail) occurs. violation alarm output held latch cycle internal clock (RCLK). B8ZS mode, bipolar violations within legal substitution code detected and, therefore, produce alarm. bipolar violation function disabled when dual alarm test (ALMT) provided test alarm outputs, LOS, LOC, BPV. Clearing this forces alarm outputs alarm state without affecting data transmission. order meet requirement that system report string <100 consecutive that reported consecutive digital threshold counter 128. However, between consecutive device changes from locking incoming data locking TCLK. phase TCLK sufficiently different from received data, device count both This cause digital counter exceed threshold, even though number consecutive data less than 100. B8ZS Option T7289A device contains B8ZS encoder decoder that selected setting BZSC pin. This allows encoder substitute zero-substitution code eight consecutive detected data stream, illustrated Table represents violation bipolar code, represents bipolar pulse correct polarity. decoder detects zero-substitution code reinserts eight data stream. B8ZS option disabled when dual Table B8ZS Substitution Code Before B8ZS After B8ZS 00000000 000VB0VB
Device Anomaly
T7289A-EL, T7289A-PL, T7289A-EL2, T7289A-PL2
T7289A-EL, T7289A-PL, T7289A-EL2, T7289A-PL2 devices have been found sensitive slow powerup ramp device supply. general, powerup time device operate properly. device must power-cycled with power-ramp interval less than clear condition. This anomaly corrected T7289A-EL4 T7289A-PL4.
T7289A-EL, T7289A-PL, T7289A-EL2, T7289A-PL2, T7289A-EL3, T7289A-PL3
T7289A-EL, T7289A-PL, T7289A-EL2, T7289APL2, T7289A-EL3, T7289A-PL3 devices have been found sensitive voltage surges transmit analog interface leads. device latch-up when excessive voltage surges present line. device must power-cycled clear condition. immunity voltage surges been enhanced T7289A-EL4 T7289A-PL4. Lucent Technologies Inc.
Blue-Signal (AIS) Generators There blue-signal generators this device. all-1s signal output receive data
T7289A Line Interface
Absolute Maximum Ratings
Stresses excess absolute maximum ratings cause permanent damage device. These absolute stress ratings only. Functional operation device implied these other conditions excess those given operational sections data sheet. Exposure absolute maximum ratings extended periods adversely affect device reliability. Parameter Supply Voltage Range Power Dissipation Storage Temperature Range Symbol Pdis Tstg -0.5 Unit
Handling Precautions
Although protection circuitry been designed into this device, proper precautions should taken avoid exposure electrostatic discharge (ESD) during handling mounting. Lucent employs human-body model (HBM) charged-device model (CDM) ESD-susceptibility testing protection design evaluation. voltage thresholds dependent circuit parameters used define model. industry-wide standard been adopted CDM. However, standard (resistance 1500 capacitance widely used therefore used comparison purposes. threshold presented here obtained using these circuit parameters: Human-Body Model Threshold Device Voltage T7289A >2000
Electrical Characteristics
Operating Conditions
Table Power Specifications Parameter Power Dissipation* Symbol Unit
Measurement conditions with transmit side, equalizer settings: (VDD Power supply current varies less than with variations temperature power supply voltage.
Lucent Technologies Inc.
T7289A Line Interface
Electrical Characteristics (continued)
Operating Conditions (continued)
Table Logic Interface Electrical Characteristics Parameter Input Voltage: High Output Voltage (except LOC): High High, CMOS Output Voltage (LOS, LOC): High Input Capacitance Load Capacitance Symbol VOHC Condition -4.9 IOHC -0.49 IOHC GNDD VDDD VDDD VDDD Unit
Internal pull-up devices provided following input leads: LP1, LP2, LP3, ALMT. Internal pull-down devices provided following leads: RBC, BZSC/TNDATA, TBC, DUAL, EC1, EC2, EC3. internal pull-up pull-down devices require input source sink more than Output pull-up provided leads LOC. Table Transmitter Specifications Parameter Output Pulse Amplitude DSX) Pulse Width (50%) Output Power Levels: Band Band 1544 Positive/Negative Pulse Imbalance Rise/Fall Time (20%-80%) Output Termination Output Transformer Turns Ratio PSRR: Frequency Frequency Frequency
Below power kHz. Total power difference.
12.6 1:1.12
16.5 1:1.14
17.9 1:1.16
Unit
Lucent Technologies Inc.
T7289A Line Interface
Electrical Characteristics (continued)
Operating Conditions (continued)
Table Receiver Specifications Parameter Receiver Sensitivity input device) PLL: Bandwidth Peaking Allowed Cable Loss* 10-9 Condition input input Vpp, from Maximum number consecutive Each Input Ground 0.85 Unit
Input Density (1s) Free-running Frequency Error Input Transformer Turns Ratio Input Termination Input Resistance,
12.5 1:1.9
1:2.0
1:2.1
Minimum sensitivity (maximum cable loss limit) occurs when frequency near clock rate.
Timing Characteristics
duty cycle timing relationships referenced threshold level.
Loss-of-Clock Indication Timing
clock must absent 5.18 guarantee loss-of-clock indication. However, possible produce lossof-clock indication clock absent 2.59 depending timing relationship interruption with respect timing cycle. returning clock must present 5.18 guarantee normal condition loss-of-clock (LOC). However, loss-of-clock indication return normal immediately, depending timing relationship signal return with respect timing cycle. Table System Interface Symbol tTCLTCL tTCHTCL tTDVTCL tTCLTDV tRCHRDV tRDVRCH tRCLRDV Description TCLK Clock Period TCLK Duty Cycle Data Setup Time, TDATA TCLCK Data Hold Time, TCLK TDATA Clock Rise Time (10%-90%) Clock Fall Time (10%-90%) Data Hold Time, RCLK RDATA, Data Setup Time, RDATA, RCLK Propagation Delay, RCLK RDATA 647.7 Unit
tolerance ±130 ppm.
Lucent Technologies Inc.
T7289A Line Interface
Timing Characteristics (continued)
Loss-of-Clock Indication Timing (continued)
tTCLTCL TCLK
TDATA TPDATA TNDATA tTDVTCL tTCLTDV
tRCLRDV RCLK
tRDVRCH BPV/RDATA RPDATA RNDATA tRCHRDV
5-4361(C)
Figure Timing Diagram (Single-Rail Dual-Rail)
Lucent Technologies Inc.
T7289A Line Interface
Outline Diagrams
28-Pin, Plastic
Dimensions millimeters.
IDENTIFIER ZONE
SEATING PLANE 0.38 2.54 0.023
5-4410.R1
Number Pins
Package Dimensions (DIP) Maximum Length Including Leads 37.34 Maximum Width Without Leads 13.97 Maximum Width Including Leads 15.49 Maximum Height Above Board 5.59
Lucent Technologies Inc.
T7289A Line Interface
Outline Diagrams (continued)
28-Pin, Plastic
Dimensions millimeters.
IDENTIFIER ZONE
SEATING PLANE 0.10 1.27 0.020 0.64
5-4413.R1
Number Pins
Package Dimensions (SOJ) Maximum Length Including Leads 18.03 Maximum Width Without Leads 7.62 Maximum Width Including Leads 8.81 Maximum Height Above Board 3.18
Ordering Information
Device Code 7289A 7289A Package 28-Pin 28-Pin Temperature Comcode (Ordering Number) 107056699 107056673
Lucent Technologies Inc.
T7289A Line Interface
DS97-196TIC Replaces DS92-072SMOS Catalog CA95-003TIC Version Incorporate Following Updates
Data sheet format. Note: CA95-003TIC version data sheet device advisory AY93-025TCOM incorporated
Lucent Technologies Inc.
T7289A Line Interface Interactive Terminal Transmission Convergence
Preliminary
additional information, contact your Microelectronics Group Account Manager following: INTERNET: http://www.lucent.com/micro U.S.A.: Microelectronics Group, Lucent Technologies Inc., Union Boulevard, Room 30L-15P-BA, Allentown, 18103 1-800-372-2447, 610-712-4106 CANADA: 1-800-553-2448, 610-712-4106), e-mail docmaster@micro.lucent.com ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 8833, (65) 7495 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 5421 1600, (81) 5421 1700 data requests Europe: MICROELECTRONICS GROUP DATALINE: Tel. (44) 1734 299, (44) 1734 technical inquiries Europe: CENTRAL EUROPE: (49) 95086 (Munich), NORTHERN EUROPE: (44) 1344 (Bracknell UK), FRANCE: (33) (Paris), SOUTHERN EUROPE: (39) 6601 1800 (Milan) (34) 1700 (Madrid)
Lucent Technologies Inc. reserves right make changes product(s) information contained herein without notice. liability assumed result their application. rights under patent accompany sale such product(s) information.
Copyright 1997 Lucent Technologies Inc. Rights Reserved Printed U.S.A.
January 1998 DS97-196TIC (Replaces DS92-072SMOS)
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Description Lucent Technologies Microelectronics Group T7289A Lin

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