FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR FEATURES di

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ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
FEATURES
differential 3.3V LVPECL output Crystal oscillator interface designed 25MHz, 18pF parallel resonant crystal Output frequencies: 125MHz 62.5MHz (selectable) phase jitter 125MHz, using 25MHz crystal (12KHz 20MHz): 0.62ps (typical) phase noise 125MHz (typical) Offset Noise Power 100Hz -94.6 dBc/Hz 1KHz -122.8 dBc/Hz 10KHz -132.2 dBc/Hz 100KHz -132.0 dBc/Hz 3.3V operating supply 70°C ambient operating temperature Industrial temperature information available upon request
GENERAL DESCRIPTION
ICS843022 Fibre Channel Clock Generator member HiPerClocksfamily high HiPerClockSperformance devices from ICS. ICS843022 uses 25MHz crystal synthesize 125MHz 62.5MHz. ICS843022 excellent phase jitter performance, over 12KHz 20MHz integration range. ICS843022 packaged small 8-pin TSSOP, making ideal systems with limited board space.
FUNCTION TABLE
Inputs FREQ_SEL Output Frequencies (with 25MHz crystal) 125MHz 62.5MHz
BLOCK DIAGRAM
ASSIGNMENT
VCCA XTAL_OUT XTAL_IN FREQ_SEL
XTAL_IN
XTAL_OUT
Output Divider
ICS843022
8-Lead TSSOP 4.40mm 3.0mm 0.925mm package body Package View
FREQ_SEL
Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice. 843022AG REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
Type Power Power Input Input Description Analog supply pin. Negative supply pin. Crystal oscillator interface. XTAL_in input, XTAL_OUT output. Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. Differential clock outputs. LVPECL interface levels. Core supply pin.
TABLE DESCRIPTIONS
Number Name VCCA XTAL_OUT, XTAL_IN FREQ_SEL nQ0,
Output Power
NOTE: Pulldown refers internal input resistors. Table Characteristics, typical values.
TABLE CHARACTERISTICS
Symbol RPULLDOWN Parameter Input Capacitance Input Pulldown Resistor Test Conditions Minimum Typical Maximum Units
843022AG
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ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
4.6V -0.5V 0.5V 50mA 100mA 101.7°C/W mps) -65°C 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only. Functional operation product these conditions conditions beyond those listed Characteristics Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Inputs, Outputs, Continuous Current Surge Current Package Thermal Impedance, Storage Temperature, TSTG
TABLE POWER SUPPLY CHARACTERISTICS, 3.3V±5%, TA=0°C 70°C
Symbol VCCA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Test Conditions Minimum 3.135 3.135 Typical Maximum 3.465 3.465 Units
TABLE LVCMOS/LVTTL CHARACTERISTICS, 3.3V±5%, TA=0°C 70°C
Symbol Parameter Input High Voltage Input Voltage Input High Current Input Current FREQ_SEL FREQ_SEL 3.465V 3.465V, Test Conditions Minimum -0.3 Typical Maximum Units
TABLE LVPECL CHARACTERISTICS, 3.3V±5%, TA=0°C 70°C
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Peak-to-Peak Output Voltage Swing Test Conditions Minimum Typical Maximum Units
NOTE Outputs terminated with
TABLE CRYSTAL CHARACTERISTICS
Parameter Mode Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Test Conditions Minimum Typical Fundamental Maximum Units
843022AG
REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
Test Conditions Minimum Typical 62.5 125MHz, Integration Range: 12KHz 20MHz 62.5MHz, Integration Range: 12KHz 20MHz 0.62 0.63 Maximum Units
TABLE CHARACTERISTICS, 3.3V±5%, TA=0°C 70°C
Symbol fOUT Parameter Output Frequency
Phase Jitter; NOTE Output Rise/Fall Time
Output Duty Cycle NOTE Please refer Phase Noise Plot.
843022AG
REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
TYPICAL PHASE NOISE 125MHZ
Fibre Channel Filter
125MHz
Phase Jitter (Random) 12KHz 20MHz 0.62ps (typical)
NOISE POWER
-100 -110
Phase Noise Data
-120 -130 -140 -150 -160 -170 -180 -190
Phase Noise Result adding Fibre Channel Filter data
100k
100M
OFFSET FREQUENCY (HZ)
843022AG
REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
Phase Noise Plot
Noise Power
SCOPE
LVPECL
Phase Noise Mask
Offset Frequency
-1.3V 0.165V
Jitter Area Under Masked Phase Noise Plot
3.3V OUTPUT LOAD TEST CIRCUIT
PHASE JITTER
Pulse Width
PERIOD
Clock Outputs
PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
843022AG
REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
high speed analog circuitry, power supply pins vulnerable random noise. ICS843022 provides separate power supplies isolate high switching noise from outputs internal PLL. VCC, VCCA should individually connected power supply plane through vias, bypass capacitors should used each pin. achieve optimum jitter performance, power supply isolation required. Figure illustrates resistor along with 10µF .01µF bypass capacitor should connected each VCCA pin.
3.3V .01µF
.01µF
FIGURE POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
ICS843022 been characterized with 18pF parallel resonant crystals. capacitor values, shown Figure below were determined using 25MHz, 18pF parallel resonant crystal were chosen minimize error. optimum values slightly adjusted different board layouts.
XTAL_OUT 18pF Parallel Crystal XTAL_IN
Figure CRYSTAL INPUt INTERFACE
843022AG
REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
output frequency. 27pF 33pF recommended frequency accuracy. different board layout, values slightly adjusted optimizing frequency accuracy.
APPLICATION SCHEMATIC
Figure shows schematic example ICS843022. example LVEPCL termination shown this schematic. Additional LVPECL termination approaches shown LVPECL Termination Application Note. this example, 18pF parallel resonant 25MHz crystal used generating 125MHz
VCCA
10uF
0.1u
XTAL2 XTAL_OUT
33pF
25MHz 18pF
XTAL_IN XTAL1
VCCA XTAL_OUT XTAL2 XTAL_IN XTAL1
FREQ_SEL
ICS843022
27pF
0.1u
82.5
82.5
FIGURE ICS843022 SCHEMATIC EXAMPLE
BOARD LAYOUT EXAMPLE
Figure shows example P.C. board layout. crystal footprint this example allows either surface mount (HC49S) through hole (HC49) package. 0805.
0402. Other resistors capacitors 0603. This layout assumes that board clean analog power ground planes.
FIGURE ICS843022 BOARD LAYOUT EXAMPLE
843022AG
REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR POWER CONSIDERATIONS
This section provides information power dissipation junction temperature ICS843022. Equations example calculations also provided.
Power Dissipation. total power dissipation ICS843022 core power plus power dissipated load(s). following power dissipation 3.3V 3.465V, which gives worst case results. NOTE: Please refer Section details calculating power dissipated load.
Power (core)MAX VCC_MAX IEE_MAX 3.465V 85mA 294.5mW Power (outputs)MAX 30mW/Loaded Output pair
Total Power_MAX (3.465V, with outputs switching) 294.5mW 30mW 324.5mW
Junction Temperature. Junction temperature, temperature junction bond wire bond directly affects reliability device. maximum recommended junction temperature HiPerClockSdevices 125°C.
equation follows: Pd_total Junction Temperature Junction-to-Ambient Thermal Resistance Pd_total Total Device Power Dissipation (example calculation section above) Ambient Temperature order calculate junction temperature, appropriate junction-to-ambient thermal resistance must used. Assuming moderate flow meter second multi-layer board, appropriate value 90.5°C/W Table below. Therefore, ambient temperature 70°C with outputs switching 70°C 0.325W 90.5°C/W 99.4°C. This well below limit 125°C. This calculation only example. will obviously vary depending number loaded outputs, supply voltage, flow, type board (single layer multi-layer).
TABLE THERMAL RESISTANCE
8-PIN TSSOP, FORCED CONVECTION
Velocity (Meters Second)
Multi-Layer PCB, JEDEC Standard Test Boards 101.7°C/W
90.5°C/W
89.8°C/W
843022AG
REV. NOVEMBER 2004
Calculations Equations. purpose this section derive power dissipated into load. LVPECL output driver circuit termination shown Figure
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
VOUT
FIGURE LVPECL DRIVER CIRCUIT
TERMINATION
calculate worst case power dissipation into load, following equations which assume load, termination voltage
logic high, VOUT
CCO_MAX
OH_MAX
CC_MAX
0.9V
OH_MAX
0.9V 1.7V
logic low, VOUT
CCO_MAX
OL_MAX
CC_MAX
OL_MAX
1.7V
Pd_H power dissipation when output drives high. Pd_L power dissipation when output drives low. Pd_H
OH_MAX
CC_MAX
2V))/R
CC_MAX
OH_MAX
[(2V
CC_MAX
OH_MAX
))/R
CC_MAX
OH_MAX
[(2V 0.9V)/50] 0.9V 19.8mW
Pd_L
OL_MAX
CC_MAX
2V))/R
CC_MAX
OL_MAX
[(2V
CC_MAX
OL_MAX
))/R
CC_MAX
OL_MAX
[(2V 1.7V)/50] 1.7V 10.2mW Total Power Dissipation output pair Pd_H Pd_L 30mW
843022AG
REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR RELIABILITY INFORMATION
TABLE
JAVS. FLOW TABLE LEAD TSSOP
Velocity (Meters Second)
90.5°C/W
89.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
TRANSISTOR COUNT
transistor count ICS843022 1928
843022AG
REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
LEAD TSSOP
PACKAGE OUTLINE SUFFIX
TABLE PACKAGE DIMENSIONS
SYMBOL 0.45 -4.30 0.65 BASIC 0.75 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
Reference Document: JEDEC Publication MO-153
843022AG
REV. NOVEMBER 2004
ICS843022
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
Marking 3022A 3022A Package lead TSSOP lead TSSOP Tape Reel Count tube 2500 Temperature 70°C 70°C
TABLE ORDERING INFORMATION
Part/Order Number ICS843022AG ICS843022AGT
aforementioned trademarks, HiPerClockSand FemtoClocksare trademark Integrated Circuit Systems, Inc. subsidiaries United States and/or other countries. While information presented herein been checked both accuracy reliability, Integrated Circuit Systems, Incorporated (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial applications. other applications such those requiring extended temperature range, high reliability, other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 843022AG
REV. NOVEMBER 2004

FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR FEATURES di

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